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Moved rk322x-dev to rk322x-current (current now is 5.7.y) (#2153)

Browse Source 
Adapted rk322x-dev to kernel 5.8.y
Added ssv6x5x driver to legacy kernel, rk322x-config now allows the user to select which driver load at boot
Added esp8089 kernel module, device tree overlay and detection in rk322x-config script
Fixed some indentation
Added reset button binding
Added sdcard debounce
Fixes indentation, added device tree overlay for high-leakage cpus
Added support for bluetooth device tree overlay and realtek systemd service for rk322x targets
This commit is contained in:
Paolo 2020-08-28 18:48:55 +02:00 committed by GitHub
parent a2cfc820a6
commit 804a6b60d4
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
42 changed files with 266648 additions and 598 deletions
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4
config/boards/rk322x-box.tvb
View File

@ -4,5 +4,5 @@ BOARDFAMILY="rk322x"
BOOTCONFIG="rk322x-box_defconfig"
BOOT_FDT_FILE="rk322x-box.dtb"
MODULES_LEGACY="hci_uart rfcomm hidp"
MODULES_BLACKLIST_LEGACY="ssv6051 8723cs r8188eu"
KERNEL_TARGET="legacy,current"
MODULES_BLACKLIST_LEGACY="ssv6051 8723cs r8188eu ssv6x5x"
KERNEL_TARGET="legacy,current,dev"

161
config/kernel/linux-rk322x-current.config
View File

@ -1,13 +1,14 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 5.6.19 Kernel Configuration
# Linux/arm 5.7.16 Kernel Configuration
#
#
# Compiler: arm-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36)) 8.3.0
# Compiler: arm-none-linux-gnueabihf-gcc (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10)) 9.2.1 20191025
#
CONFIG_CC_IS_GCC=y
CONFIG_GCC_VERSION=80300
CONFIG_GCC_VERSION=90201
CONFIG_LD_VERSION=233010000
CONFIG_CLANG_VERSION=0
CONFIG_CC_CAN_LINK=y
CONFIG_CC_HAS_ASM_GOTO=y
@ -64,7 +65,6 @@ CONFIG_SPARSE_IRQ=y
# end of IRQ subsystem
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_ARCH_HAS_TICK_BROADCAST=y
@ -94,6 +94,7 @@ CONFIG_PREEMPTION=y
CONFIG_TICK_CPU_ACCOUNTING=y
# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set
# CONFIG_IRQ_TIME_ACCOUNTING is not set
# CONFIG_SCHED_THERMAL_PRESSURE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_PSI is not set
@ -604,7 +605,6 @@ CONFIG_CRYPTO_CHACHA20_NEON=m
CONFIG_CRYPTO_POLY1305_ARM=m
CONFIG_CRYPTO_NHPOLY1305_NEON=m
CONFIG_CRYPTO_CURVE25519_NEON=m
# CONFIG_VIRTUALIZATION is not set
#
# General architecture-dependent options
@ -673,7 +673,6 @@ CONFIG_ARCH_HAS_PHYS_TO_DMA=y
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
# end of GCOV-based kernel profiling
CONFIG_PLUGIN_HOSTCC=""
CONFIG_HAVE_GCC_PLUGINS=y
# end of General architecture-dependent options
@ -781,6 +780,7 @@ CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_MEMORY_ISOLATION=y
CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_COMPACTION=y
# CONFIG_PAGE_REPORTING is not set
CONFIG_MIGRATION=y
CONFIG_CONTIG_ALLOC=y
CONFIG_BOUNCE=y
@ -793,6 +793,18 @@ CONFIG_CMA=y
# CONFIG_CMA_DEBUGFS is not set
CONFIG_CMA_AREAS=7
CONFIG_ZSWAP=y
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set
CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO=y
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4 is not set
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4HC is not set
# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD is not set
CONFIG_ZSWAP_COMPRESSOR_DEFAULT="lzo"
CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD=y
# CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD is not set
# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC is not set
CONFIG_ZSWAP_ZPOOL_DEFAULT="zbud"
# CONFIG_ZSWAP_DEFAULT_ON is not set
CONFIG_ZPOOL=y
CONFIG_ZBUD=y
CONFIG_Z3FOLD=y
@ -921,6 +933,7 @@ CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y
CONFIG_IPV6_PIMSM_V2=y
# CONFIG_IPV6_SEG6_LWTUNNEL is not set
# CONFIG_IPV6_SEG6_HMAC is not set
# CONFIG_IPV6_RPL_LWTUNNEL is not set
CONFIG_NETLABEL=y
# CONFIG_MPTCP is not set
CONFIG_NETWORK_SECMARK=y
@ -982,7 +995,6 @@ CONFIG_NF_NAT_REDIRECT=y
CONFIG_NF_NAT_MASQUERADE=y
CONFIG_NETFILTER_SYNPROXY=m
CONFIG_NF_TABLES=m
CONFIG_NF_TABLES_SET=m
CONFIG_NF_TABLES_INET=y
CONFIG_NF_TABLES_NETDEV=y
CONFIG_NFT_NUMGEN=m
@ -1756,6 +1768,7 @@ CONFIG_ARM_CCI=y
# CONFIG_MOXTET is not set
# CONFIG_SIMPLE_PM_BUS is not set
# CONFIG_VEXPRESS_CONFIG is not set
# CONFIG_MHI_BUS is not set
# end of Bus devices
CONFIG_CONNECTOR=y
@ -1862,6 +1875,7 @@ CONFIG_EEPROM_93CX6=m
# CONFIG_ECHO is not set
CONFIG_MISC_RTSX_USB=m
# CONFIG_UACCE is not set
# end of Misc devices
#
@ -1879,7 +1893,6 @@ CONFIG_SCSI_PROC_FS=y
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
CONFIG_BLK_DEV_SR=y
# CONFIG_BLK_DEV_SR_VENDOR is not set
# CONFIG_CHR_DEV_SG is not set
# CONFIG_CHR_DEV_SCH is not set
# CONFIG_SCSI_CONSTANTS is not set
@ -1966,6 +1979,7 @@ CONFIG_IPVLAN=m
CONFIG_IPVTAP=m
CONFIG_VXLAN=m
CONFIG_GENEVE=m
# CONFIG_BAREUDP is not set
CONFIG_GTP=m
CONFIG_MACSEC=m
# CONFIG_NETCONSOLE is not set
@ -2070,6 +2084,7 @@ CONFIG_DWMAC_ROCKCHIP=y
# CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_NET_VENDOR_XILINX=y
# CONFIG_XILINX_AXI_EMAC is not set
# CONFIG_XILINX_LL_TEMAC is not set
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_BCM_UNIMAC=m
@ -2079,7 +2094,10 @@ CONFIG_MDIO_BUS_MUX=m
# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
CONFIG_MDIO_BUS_MUX_MULTIPLEXER=m
# CONFIG_MDIO_HISI_FEMAC is not set
# CONFIG_MDIO_IPQ8064 is not set
CONFIG_MDIO_MSCC_MIIM=m
# CONFIG_MDIO_MVUSB is not set
CONFIG_MDIO_XPCS=y
CONFIG_PHYLINK=y
CONFIG_PHYLIB=y
CONFIG_SWPHY=y
@ -2317,6 +2335,7 @@ CONFIG_RTL8822BU=m
# CONFIG_RTL8188EU is not set
CONFIG_RTL8821CU=m
CONFIG_88XXAU=m
CONFIG_RTL8192EU=m
CONFIG_RTL8189FS=m
CONFIG_RTL8189ES=m
CONFIG_WLAN_VENDOR_ZYDAS=y
@ -2600,13 +2619,7 @@ CONFIG_HW_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_UNIX98_PTYS=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_N_GSM is not set
# CONFIG_TRACE_SINK is not set
CONFIG_NULL_TTY=m
CONFIG_LDISC_AUTOLOAD=y
CONFIG_DEVMEM=y
# CONFIG_DEVKMEM is not set
#
# Serial drivers
@ -2653,14 +2666,19 @@ CONFIG_SERIAL_SIFIVE=m
CONFIG_SERIAL_FSL_LINFLEXUART=m
# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set
# CONFIG_SERIAL_ST_ASC is not set
# CONFIG_SERIAL_SPRD is not set
# end of Serial drivers
CONFIG_SERIAL_MCTRL_GPIO=y
# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_N_GSM is not set
CONFIG_NULL_TTY=m
# CONFIG_TRACE_SINK is not set
CONFIG_HVC_DRIVER=y
# CONFIG_HVC_DCC is not set
CONFIG_SERIAL_DEV_BUS=y
# CONFIG_SERIAL_DEV_CTRL_TTYPORT is not set
# CONFIG_TTY_PRINTK is not set
CONFIG_HVC_DRIVER=y
# CONFIG_HVC_DCC is not set
CONFIG_VIRTIO_CONSOLE=m
# CONFIG_IPMI_HANDLER is not set
# CONFIG_IPMB_DEVICE_INTERFACE is not set
@ -2668,6 +2686,8 @@ CONFIG_HW_RANDOM=y
# CONFIG_HW_RANDOM_TIMERIOMEM is not set
CONFIG_HW_RANDOM_VIRTIO=m
CONFIG_HW_RANDOM_OPTEE=m
CONFIG_DEVMEM=y
# CONFIG_DEVKMEM is not set
# CONFIG_RAW_DRIVER is not set
CONFIG_TCG_TPM=y
CONFIG_HW_RANDOM_TPM=y
@ -2779,6 +2799,11 @@ CONFIG_SPI_ROCKCHIP=y
# CONFIG_SPI_XILINX is not set
# CONFIG_SPI_ZYNQMP_GQSPI is not set
#
# SPI Multiplexer support
#
# CONFIG_SPI_MUX is not set
#
# SPI Protocol Masters
#
@ -2808,6 +2833,7 @@ CONFIG_PPS_CLIENT_GPIO=m
CONFIG_PTP_1588_CLOCK=y
CONFIG_DP83640_PHY=m
# CONFIG_PTP_1588_CLOCK_INES is not set
# CONFIG_PTP_1588_CLOCK_IDT82P33 is not set
# CONFIG_PTP_1588_CLOCK_IDTCM is not set
# end of PTP clock support
@ -3011,6 +3037,7 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_ADT7475 is not set
# CONFIG_SENSORS_AS370 is not set
# CONFIG_SENSORS_ASC7621 is not set
# CONFIG_SENSORS_AXI_FAN_CONTROL is not set
# CONFIG_SENSORS_ASPEED is not set
# CONFIG_SENSORS_ATXP1 is not set
# CONFIG_SENSORS_DS620 is not set
@ -3219,6 +3246,7 @@ CONFIG_MFD_MADERA_I2C=m
# CONFIG_MFD_HI6421_PMIC is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_HTC_I2CPLD is not set
# CONFIG_MFD_IQS62X is not set
# CONFIG_MFD_KEMPLD is not set
# CONFIG_MFD_88PM800 is not set
# CONFIG_MFD_88PM805 is not set
@ -3305,7 +3333,6 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y
# CONFIG_REGULATOR_88PG86X is not set
# CONFIG_REGULATOR_ACT8865 is not set
# CONFIG_REGULATOR_AD5398 is not set
# CONFIG_REGULATOR_ANATOP is not set
# CONFIG_REGULATOR_ARIZONA_LDO1 is not set
# CONFIG_REGULATOR_ARIZONA_MICSUPP is not set
# CONFIG_REGULATOR_BD718XX is not set
@ -3329,7 +3356,9 @@ CONFIG_REGULATOR_GPIO=y
# CONFIG_REGULATOR_MAX8952 is not set
# CONFIG_REGULATOR_MAX8973 is not set
# CONFIG_REGULATOR_MCP16502 is not set
# CONFIG_REGULATOR_MP5416 is not set
# CONFIG_REGULATOR_MP8859 is not set
# CONFIG_REGULATOR_MP886X is not set
# CONFIG_REGULATOR_MPQ7920 is not set
# CONFIG_REGULATOR_MT6311 is not set
# CONFIG_REGULATOR_PFUZE100 is not set
@ -3498,7 +3527,6 @@ CONFIG_VIDEO_PVRUSB2_SYSFS=y
CONFIG_VIDEO_PVRUSB2_DVB=y
# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set
CONFIG_VIDEO_HDPVR=m
CONFIG_VIDEO_USBVISION=m
CONFIG_VIDEO_STK1160_COMMON=m
CONFIG_VIDEO_STK1160=m
# CONFIG_VIDEO_GO7007 is not set
@ -3714,6 +3742,7 @@ CONFIG_VIDEO_CX25840=m
#
# CONFIG_VIDEO_HI556 is not set
# CONFIG_VIDEO_IMX214 is not set
# CONFIG_VIDEO_IMX219 is not set
# CONFIG_VIDEO_IMX258 is not set
# CONFIG_VIDEO_IMX274 is not set
# CONFIG_VIDEO_IMX290 is not set
@ -4063,11 +4092,6 @@ CONFIG_DRM_SCHED=m
# CONFIG_DRM_KOMEDA is not set
# end of ARM devices
#
# ACP (Audio CoProcessor) Configuration
#
# end of ACP (Audio CoProcessor) Configuration
# CONFIG_DRM_VGEM is not set
# CONFIG_DRM_VKMS is not set
# CONFIG_DRM_EXYNOS is not set
@ -4105,6 +4129,7 @@ CONFIG_DRM_PANEL_SIMPLE=m
# CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set
# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set
# CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set
# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set
# CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set
# CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set
# CONFIG_DRM_PANEL_SHARP_LS037V7DW01 is not set
@ -4122,19 +4147,23 @@ CONFIG_DRM_PANEL_BRIDGE=y
# Display Interface Bridges
#
# CONFIG_DRM_CDNS_DSI is not set
# CONFIG_DRM_DUMB_VGA_DAC is not set
CONFIG_DRM_DISPLAY_CONNECTOR=m
# CONFIG_DRM_LVDS_CODEC is not set
# CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW is not set
# CONFIG_DRM_NXP_PTN3460 is not set
# CONFIG_DRM_PARADE_PS8622 is not set
# CONFIG_DRM_PARADE_PS8640 is not set
# CONFIG_DRM_SIL_SII8620 is not set
# CONFIG_DRM_SII902X is not set
# CONFIG_DRM_SII9234 is not set
CONFIG_DRM_SIMPLE_BRIDGE=m
# CONFIG_DRM_THINE_THC63LVD1024 is not set
# CONFIG_DRM_TOSHIBA_TC358764 is not set
# CONFIG_DRM_TOSHIBA_TC358767 is not set
# CONFIG_DRM_TOSHIBA_TC358768 is not set
# CONFIG_DRM_TI_TFP410 is not set
# CONFIG_DRM_TI_SN65DSI86 is not set
# CONFIG_DRM_TI_TPD12S015 is not set
# CONFIG_DRM_ANALOGIX_ANX6345 is not set
# CONFIG_DRM_ANALOGIX_ANX78XX is not set
# CONFIG_DRM_I2C_ADV7511 is not set
@ -4152,6 +4181,7 @@ CONFIG_DRM_DW_HDMI_CEC=y
# CONFIG_TINYDRM_HX8357D is not set
# CONFIG_TINYDRM_ILI9225 is not set
# CONFIG_TINYDRM_ILI9341 is not set
# CONFIG_TINYDRM_ILI9486 is not set
# CONFIG_TINYDRM_MI0283QT is not set
# CONFIG_TINYDRM_REPAPER is not set
# CONFIG_TINYDRM_ST7586 is not set
@ -4161,6 +4191,7 @@ CONFIG_DRM_DW_HDMI_CEC=y
CONFIG_DRM_LIMA=m
# CONFIG_DRM_PANFROST is not set
# CONFIG_DRM_MCDE is not set
# CONFIG_DRM_TIDSS is not set
# CONFIG_DRM_LEGACY is not set
CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y
@ -4299,6 +4330,7 @@ CONFIG_SND_SOC=m
CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
# CONFIG_SND_SOC_AMD_ACP is not set
# CONFIG_SND_ATMEL_SOC is not set
# CONFIG_SND_BCM63XX_I2S_WHISTLER is not set
# CONFIG_SND_DESIGNWARE_I2S is not set
#
@ -4449,6 +4481,7 @@ CONFIG_SND_SOC_TDA7419=m
# CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set
# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set
# CONFIG_SND_SOC_TLV320AIC3X is not set
# CONFIG_SND_SOC_TLV320ADCX140 is not set
CONFIG_SND_SOC_TS3A227E=m
# CONFIG_SND_SOC_TSCS42XX is not set
CONFIG_SND_SOC_TSCS454=m
@ -4534,6 +4567,7 @@ CONFIG_HID_ELO=m
CONFIG_HID_EZKEY=m
CONFIG_HID_GEMBIRD=m
CONFIG_HID_GFRM=m
# CONFIG_HID_GLORIOUS is not set
CONFIG_HID_HOLTEK=m
CONFIG_HOLTEK_FF=y
CONFIG_HID_GT683R=m
@ -4610,6 +4644,7 @@ CONFIG_HID_ZYDACRON=m
CONFIG_HID_SENSOR_HUB=m
CONFIG_HID_SENSOR_CUSTOM_SENSOR=m
CONFIG_HID_ALPS=m
# CONFIG_HID_MCP2221 is not set
# end of Special HID drivers
#
@ -4803,6 +4838,7 @@ CONFIG_USB_LCD=m
# CONFIG_USB_IDMOUSE is not set
# CONFIG_USB_FTDI_ELAN is not set
# CONFIG_USB_APPLEDISPLAY is not set
# CONFIG_APPLE_MFI_FASTCHARGE is not set
# CONFIG_USB_SISUSBVGA is not set
# CONFIG_USB_LD is not set
# CONFIG_USB_TRANCEVIBRATOR is not set
@ -4855,6 +4891,7 @@ CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
# CONFIG_USB_BDC_UDC is not set
# CONFIG_USB_NET2272 is not set
# CONFIG_USB_GADGET_XILINX is not set
# CONFIG_USB_MAX3420_UDC is not set
# CONFIG_USB_DUMMY_HCD is not set
# end of USB Peripheral Controller
@ -4885,6 +4922,10 @@ CONFIG_USB_CONFIGFS_F_FS=y
# CONFIG_USB_CONFIGFS_F_HID is not set
# CONFIG_USB_CONFIGFS_F_UVC is not set
# CONFIG_USB_CONFIGFS_F_PRINTER is not set
#
# USB Gadget precomposed configurations
#
# CONFIG_USB_ZERO is not set
# CONFIG_USB_AUDIO is not set
# CONFIG_USB_ETH is not set
@ -4901,6 +4942,9 @@ CONFIG_USB_G_SERIAL=m
CONFIG_USB_G_HID=m
# CONFIG_USB_G_DBGP is not set
# CONFIG_USB_G_WEBCAM is not set
# CONFIG_USB_RAW_GADGET is not set
# end of USB Gadget precomposed configurations
# CONFIG_TYPEC is not set
CONFIG_USB_ROLE_SWITCH=m
CONFIG_MMC=y
@ -4931,6 +4975,7 @@ CONFIG_MMC_DW_ROCKCHIP=y
# CONFIG_MMC_USDHI6ROL0 is not set
# CONFIG_MMC_REALTEK_USB is not set
# CONFIG_MMC_CQHCI is not set
CONFIG_MMC_HSQ=m
# CONFIG_MMC_MTK is not set
# CONFIG_MEMSTICK is not set
CONFIG_NEW_LEDS=y
@ -5122,7 +5167,6 @@ CONFIG_RTC_DRV_RV3029_HWMON=y
# CONFIG_RTC_DRV_PL031 is not set
CONFIG_RTC_DRV_CADENCE=m
# CONFIG_RTC_DRV_FTRTC010 is not set
# CONFIG_RTC_DRV_SNVS is not set
# CONFIG_RTC_DRV_R7301 is not set
# CONFIG_RTC_DRV_CPCAP is not set
@ -5167,6 +5211,7 @@ CONFIG_DMA_ENGINE_RAID=y
CONFIG_SYNC_FILE=y
# CONFIG_SW_SYNC is not set
# CONFIG_UDMABUF is not set
# CONFIG_DMABUF_MOVE_NOTIFY is not set
CONFIG_DMABUF_SELFTESTS=m
# CONFIG_DMABUF_HEAPS is not set
# end of DMABUF options
@ -5177,6 +5222,11 @@ CONFIG_DMABUF_SELFTESTS=m
# CONFIG_VIRT_DRIVERS is not set
CONFIG_VIRTIO=m
# CONFIG_VIRTIO_MENU is not set
# CONFIG_VDPA is not set
CONFIG_VHOST_DPN=y
CONFIG_VHOST_MENU=y
# CONFIG_VHOST_NET is not set
# CONFIG_VHOST_CROSS_ENDIAN_LEGACY is not set
#
# Microsoft Hyper-V guest support
@ -5209,7 +5259,6 @@ CONFIG_88EU_AP_MODE=y
# Analog to digital converters
#
# CONFIG_AD7816 is not set
# CONFIG_AD7192 is not set
# CONFIG_AD7280 is not set
# end of Analog to digital converters
@ -5267,6 +5316,7 @@ CONFIG_VIDEO_HANTRO_ROCKCHIP=y
#
# CONFIG_PHY_ROCKCHIP_DPHY_RX0 is not set
# CONFIG_VIDEO_ROCKCHIP_ISP1 is not set
CONFIG_VIDEO_USBVISION=m
#
# Android
@ -5315,14 +5365,7 @@ CONFIG_FB_TFT_UPD161704=m
CONFIG_FB_TFT_WATTEROTT=m
# CONFIG_WILC1000_SDIO is not set
# CONFIG_WILC1000_SPI is not set
CONFIG_MOST=m
# CONFIG_MOST_CDEV is not set
# CONFIG_MOST_NET is not set
# CONFIG_MOST_SOUND is not set
# CONFIG_MOST_VIDEO is not set
# CONFIG_MOST_DIM2 is not set
# CONFIG_MOST_I2C is not set
# CONFIG_MOST_USB is not set
# CONFIG_MOST_COMPONENTS is not set
# CONFIG_KS7010 is not set
# CONFIG_PI433 is not set
@ -5336,9 +5379,6 @@ CONFIG_FIELDBUS_DEV=m
CONFIG_HMS_ANYBUSS_BUS=m
CONFIG_ARCX_ANYBUS_CONTROLLER=m
CONFIG_HMS_PROFINET=m
# CONFIG_USB_WUSB_CBAF is not set
# CONFIG_UWB is not set
# CONFIG_STAGING_EXFAT_FS is not set
# CONFIG_WFX is not set
# CONFIG_GOLDFISH is not set
# CONFIG_MFD_CROS_EC is not set
@ -5561,6 +5601,7 @@ CONFIG_HID_SENSOR_ACCEL_3D=m
#
# CONFIG_AD7091R5 is not set
# CONFIG_AD7124 is not set
# CONFIG_AD7192 is not set
# CONFIG_AD7266 is not set
# CONFIG_AD7291 is not set
# CONFIG_AD7292 is not set
@ -5626,6 +5667,7 @@ CONFIG_IIO_RESCALE=m
# Amplifiers
#
# CONFIG_AD8366 is not set
# CONFIG_HMC425 is not set
# end of Amplifiers
#
@ -5669,8 +5711,6 @@ CONFIG_HID_SENSOR_IIO_TRIGGER=m
# CONFIG_AD5593R is not set
# CONFIG_AD5504 is not set
# CONFIG_AD5624R_SPI is not set
# CONFIG_LTC1660 is not set
# CONFIG_LTC2632 is not set
CONFIG_AD5686=m
CONFIG_AD5686_SPI=m
CONFIG_AD5696_I2C=m
@ -5678,11 +5718,14 @@ CONFIG_AD5696_I2C=m
CONFIG_AD5758=m
# CONFIG_AD5761 is not set
# CONFIG_AD5764 is not set
# CONFIG_AD5770R is not set
# CONFIG_AD5791 is not set
# CONFIG_AD7303 is not set
# CONFIG_AD8801 is not set
# CONFIG_DPOT_DAC is not set
# CONFIG_DS4424 is not set
# CONFIG_LTC1660 is not set
# CONFIG_LTC2632 is not set
# CONFIG_M62332 is not set
# CONFIG_MAX517 is not set
# CONFIG_MAX5821 is not set
@ -5787,6 +5830,7 @@ CONFIG_IIO_ADIS_LIB_BUFFER=y
#
# CONFIG_ADJD_S311 is not set
# CONFIG_ADUX1020 is not set
# CONFIG_AL3010 is not set
# CONFIG_AL3320A is not set
# CONFIG_APDS9300 is not set
# CONFIG_APDS9960 is not set
@ -5797,6 +5841,7 @@ CONFIG_IIO_ADIS_LIB_BUFFER=y
# CONFIG_CM3323 is not set
CONFIG_CM3605=m
# CONFIG_CM36651 is not set
# CONFIG_GP2AP002 is not set
# CONFIG_GP2AP020A00F is not set
CONFIG_SENSORS_ISL29018=y
# CONFIG_SENSORS_ISL29028 is not set
@ -5869,6 +5914,11 @@ CONFIG_HID_SENSOR_DEVICE_ROTATION=m
CONFIG_IIO_SYSFS_TRIGGER=y
# end of Triggers - standalone
#
# Linear and angular position sensors
#
# end of Linear and angular position sensors
#
# Digital potentiometers
#
@ -5899,6 +5949,7 @@ CONFIG_MCP4018=m
# CONFIG_DPS310 is not set
CONFIG_HID_SENSOR_PRESS=m
# CONFIG_HP03 is not set
# CONFIG_ICP10100 is not set
# CONFIG_MPL115_I2C is not set
# CONFIG_MPL115_SPI is not set
# CONFIG_MPL3115 is not set
@ -5954,6 +6005,7 @@ CONFIG_MAX31856=m
CONFIG_PWM=y
CONFIG_PWM_SYSFS=y
# CONFIG_PWM_DEBUG is not set
# CONFIG_PWM_FSL_FTM is not set
# CONFIG_PWM_PCA9685 is not set
CONFIG_PWM_ROCKCHIP=y
@ -5980,7 +6032,7 @@ CONFIG_RESET_CONTROLLER=y
#
CONFIG_GENERIC_PHY=y
# CONFIG_BCM_KONA_USB2_PHY is not set
# CONFIG_PHY_CADENCE_DP is not set
# CONFIG_PHY_CADENCE_TORRENT is not set
# CONFIG_PHY_CADENCE_DPHY is not set
# CONFIG_PHY_CADENCE_SIERRA is not set
# CONFIG_PHY_FSL_IMX8MQ_USB is not set
@ -6064,6 +6116,7 @@ CONFIG_PM_OPP=y
# CONFIG_SLIMBUS is not set
CONFIG_INTERCONNECT=m
# CONFIG_COUNTER is not set
CONFIG_MOST=m
# end of Device Drivers
#
@ -6174,7 +6227,7 @@ CONFIG_UDF_FS=m
# end of CD-ROM/DVD Filesystems
#
# DOS/FAT/NT Filesystems
# DOS/FAT/EXFAT/NT Filesystems
#
CONFIG_FAT_FS=y
CONFIG_MSDOS_FS=y
@ -6182,10 +6235,12 @@ CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_FAT_DEFAULT_UTF8 is not set
CONFIG_EXFAT_FS=m
CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8"
CONFIG_NTFS_FS=m
# CONFIG_NTFS_DEBUG is not set
CONFIG_NTFS_RW=y
# end of DOS/FAT/NT Filesystems
# end of DOS/FAT/EXFAT/NT Filesystems
#
# Pseudo filesystems
@ -6255,6 +6310,24 @@ CONFIG_PSTORE_RAM=y
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
# CONFIG_EROFS_FS is not set
CONFIG_AUFS_FS=m
CONFIG_AUFS_BRANCH_MAX_127=y
# CONFIG_AUFS_BRANCH_MAX_511 is not set
# CONFIG_AUFS_BRANCH_MAX_1023 is not set
# CONFIG_AUFS_BRANCH_MAX_32767 is not set
CONFIG_AUFS_SBILIST=y
# CONFIG_AUFS_HNOTIFY is not set
# CONFIG_AUFS_EXPORT is not set
# CONFIG_AUFS_XATTR is not set
# CONFIG_AUFS_FHSM is not set
# CONFIG_AUFS_RDU is not set
# CONFIG_AUFS_DIRREN is not set
# CONFIG_AUFS_SHWH is not set
# CONFIG_AUFS_BR_RAMFS is not set
# CONFIG_AUFS_BR_FUSE is not set
CONFIG_AUFS_BR_HFSPLUS=y
CONFIG_AUFS_BDEV_LOOP=y
# CONFIG_AUFS_DEBUG is not set
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V2=y
@ -6775,7 +6848,6 @@ CONFIG_FRAME_WARN=1024
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_READABLE_ASM is not set
# CONFIG_HEADERS_INSTALL is not set
CONFIG_OPTIMIZE_INLINING=y
# CONFIG_DEBUG_SECTION_MISMATCH is not set
CONFIG_SECTION_MISMATCH_WARN_ONLY=y
CONFIG_ARCH_WANT_FRAME_POINTERS=y
@ -6789,11 +6861,11 @@ CONFIG_FRAME_POINTER=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0
CONFIG_MAGIC_SYSRQ_SERIAL=y
CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE=""
CONFIG_DEBUG_FS=y
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
# CONFIG_UBSAN is not set
CONFIG_UBSAN_ALIGNMENT=y
# end of Generic Kernel Debugging Instruments
CONFIG_DEBUG_KERNEL=y
@ -6839,6 +6911,7 @@ CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y
CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=1
# CONFIG_WQ_WATCHDOG is not set
# CONFIG_TEST_LOCKUP is not set
# end of Debug Oops, Lockups and Hangs
#

7094
config/kernel/linux-rk322x-dev.config Normal file
View File

File diff suppressed because it is too large Load Diff

6
config/kernel/linux-rk322x-legacy.config
View File

@ -1925,9 +1925,6 @@ CONFIG_MVL88W8977=m
#
CONFIG_SSV6051=m
# CONFIG_WL_TI is not set
CONFIG_RTL8822BU=m
# CONFIG_RTL8821CU is not set
CONFIG_88XXAU=m
CONFIG_ZD1211RW=m
# CONFIG_ZD1211RW_DEBUG is not set
CONFIG_MWIFIEX=y
@ -1935,6 +1932,9 @@ CONFIG_MWIFIEX_SDIO=y
# CONFIG_MWIFIEX_USB is not set
# CONFIG_CW1200 is not set
# CONFIG_RSI_91X is not set
CONFIG_ESP8089=m
CONFIG_ESP8089_DEBUG_FS=y
CONFIG_SSV6X5X=m
#
# Enable WiMAX (Networking options) to see the WiMAX drivers

9
config/sources/families/rk322x.conf
View File

@ -19,14 +19,14 @@ case $BRANCH in
current)
KERNELBRANCH='branch:linux-5.6.y'
KERNELBRANCH='branch:linux-5.7.y'
AUFS=no
;;
dev)
KERNELBRANCH='branch:master'
KERNELBRANCH='branch:linux-5.8.y'
;;
@ -90,9 +90,8 @@ family_tweaks_bsp()
cp $SRC/packages/bsp/rockchip/71-i2c.rules $destination/etc/udev/rules.d
# Bluetooth
install -m 755 $SRC/packages/bsp/rockchip/rtk_hciattach $destination/usr/bin
install -m 755 $SRC/packages/bsp/rockchip/start_bt.sh $destination/usr/local/bin
cp $SRC/packages/bsp/rockchip/tinker-bluetooth.service $destination/lib/systemd/system/
install -m 755 $SRC/packages/bsp/rk322x/rtk_hciattach $destination/usr/bin
cp $SRC/packages/bsp/rk322x/rtk-bluetooth.service $destination/lib/systemd/system/
# Sound
cp $SRC/packages/bsp/rockchip/asound.conf $destination/etc/

129
packages/bsp/rk322x/rk322x-config
View File

@ -29,6 +29,7 @@ declare -A WIFI_CHIPS
declare -A DT_FLASH_OVERLAYS
declare -A DT_LED_OVERLAYS
declare -A DT_CPU_OVERLAYS
declare -A DT_WIFI_OVERLAYS
# Declarations for the various SoCs IDs
CHIP_IDS+=(["524b2382"]="RK3228A/B")
@ -38,11 +39,18 @@ CHIP_IDS+=(["524b2392"]="RK3229")
WIFI_NAMES+=(["3030:3030"]="South Silicon Valley 6051p/6256p")
WIFI_NAMES+=(["024c:b703"]="Realtek RTL8703bs")
WIFI_NAMES+=(["024c:8179"]="Realtek RTL8189ES/ETV")
WIFI_NAMES+=(["6666:1111"]="Espressif ESP8089")
# Declarations for the various wifi IDs -> kernel modules
WIFI_CHIPS+=(["3030:3030"]=ssv6051)
WIFI_CHIPS+=(["024c:b703"]=8723cs)
WIFI_CHIPS+=(["024c:8179"]=8189es)
# In case the vendor has the same vendor:device ids for more than one
# device (the infamouse ssv6051p/6256p), modules are separated by comma
# and the user is asked which one she pefers.
# Note: this is only for legacy kernel for rockchip_wlan modules which
# load themselves without declaring their device ids.
WIFI_CHIPS+=(["3030:3030"]="ssv6051 ssv6x5x")
WIFI_CHIPS+=(["024c:b703"]="8723cs")
WIFI_CHIPS+=(["024c:8179"]="8189es")
WIFI_CHIPS+=(["6666:1111"]="")
# Declarations for device tree overlays
DT_FLASH_OVERLAYS+=(["emmc"]="eMMC only flash memory")
@ -54,6 +62,8 @@ DT_LED_OVERLAYS+=(["led-conf2"]="LED configuration #2 (R329q)")
DT_CPU_OVERLAYS+=(["cpu-hs"]="RK3228B or RK3229")
DT_WIFI_OVERLAYS+=(["6666:1111"]="wlan-esp8089")
KERNEL_VERSION=$(uname -r | cut -d "-" -f 1)
if [[ "$KERNEL_VERSION" < "4.5.0" ]]; then
LEGACY_KERNEL=1
@ -142,48 +152,74 @@ function get_internal_flash_type() {
}
function select_wifi_module() {
MODULES=$1
declare -a DIALOG_ENTRIES
declare -a MODULES
IDX=0
for MODULE in $WIFI_MODULE; do
MODULES[$IDX]="$MODULE"
DIALOG_ENTRIES+=("$IDX" "$MODULE")
IDX=$((IDX + 1))
done
MENU_TITLE="${BOARD_INFO}Please choose the wifi module suitable for your configuration\n"
MENU_CMD=(dialog --colors --backtitle "$BACKTITLE" --title "$TITLE" --default-item "0" --menu "$MENU_TITLE" 24 0 20)
SELECTION=$("${MENU_CMD[@]}" "${DIALOG_ENTRIES[@]}" 2>&1 >/dev/tty)
if [[ $? -ne 0 ]]; then
return 1
fi
WIFI_MODULE="${MODULES[$SELECTION]}"
echo $WIFI_MODULE
return 0
}
# Blacklists all the modules buth whitelist only that one
# that has been detected
function apply_wifi_blacklist() {
WIFI_ID=$1
# Detect wifi chip on legacy kernel and unblacklist it
WIFI_MODULE=""
WIFI_MODULE=$1
if [ -n "$WIFI_ID" ]; then
if [ ! -f $BLACKLIST_MODPROBE_CONF ]; then
touch $BLACKLIST_MODPROBE_CONF
fi
# blacklist all the modules and unblacklist only the one which is matching
WIFI_MODULE="${WIFI_CHIPS[$WIFI_ID]}"
if [ -n "$WIFI_MODULE" ]; then
if [ ! -f $BLACKLIST_MODPROBE_CONF ]; then
touch $BLACKLIST_MODPROBE_CONF
fi
if [ -n "$WIFI_MODULE" ]; then
for MODULE in "${WIFI_CHIPS[@]}"; do
for MODULES in "${WIFI_CHIPS[@]}"; do
for MODULE in $MODULES; do
sed -i "/blacklist $MODULE/d" $BLACKLIST_MODPROBE_CONF
done
done
declare -A BLACKLIST_MODULES
declare -A BLACKLIST_MODULES
for VALUE in "${WIFI_CHIPS[@]}"; do
if [ "$VALUE" != "$WIFI_MODULE" ]; then
BLACKLIST_MODULES+=([$VALUE]=1)
for MODULES in "${WIFI_CHIPS[@]}"; do
for MODULE in $MODULES; do
if [ "$MODULE" != "$WIFI_MODULE" ]; then
BLACKLIST_MODULES+=([$MODULE]=1)
fi
done
done
for MODULE in "${!BLACKLIST_MODULES[@]}"; do
echo "blacklist $MODULE" >> $BLACKLIST_MODPROBE_CONF
done
for MODULE in "${!BLACKLIST_MODULES[@]}"; do
echo "blacklist $MODULE" >> $BLACKLIST_MODPROBE_CONF
done
echo "#blacklist $WIFI_MODULE" >> $BLACKLIST_MODPROBE_CONF
fi
echo "#blacklist $WIFI_MODULE" >> $BLACKLIST_MODPROBE_CONF
fi
# unsupported wifi_chip_type: blacklist all known wifi
# modules if the blacklist file exists. If the blacklist file does not exist just skip over
if [ -z $WIFI_MODULE ]; then
@ -198,10 +234,6 @@ function apply_wifi_blacklist() {
fi
echo $WIFI_MODULE
return 0
}
function select_soc() {
@ -363,6 +395,11 @@ DT_OVERLAYS_TO_APPLY+=($SELECTION)
SELECTION=$(select_led_configuration) || exit 1
DT_OVERLAYS_TO_APPLY+=($SELECTION)
# Apply overlays for wifi chips
if [[ -n $WIFI_ID ]] && [[ -n "${DT_WIFI_OVERLAYS[$WIFI_ID]}" ]]; then
DT_OVERLAYS_TO_APPLY+=(${DT_WIFI_OVERLAYS[$WIFI_ID]})
fi
sed -i '/^overlays=/d' $ARMBIAN_ENV_TXT
if [ $? -ne 0 ]; then
@ -378,8 +415,30 @@ if [ $? -ne 0 ]; then
fi
# Apply the wifi blacklist only with legacy kernel
if [[ $LEGACY_KERNEL -eq 1 ]]; then
WIFI_MODULE=$(apply_wifi_blacklist "$WIFI_ID")
if [[ $LEGACY_KERNEL -eq 1 ]] && [[ -n "$WIFI_ID" ]]; then
WIFI_MODULE="${WIFI_CHIPS[$WIFI_ID]}"
if [[ -n $WIFI_MODULE ]]; then
echo "$WIFI_MODULE" | grep " " > /dev/null 2>&1
if [[ $? -eq 0 ]]; then
WIFI_MODULE=$(select_wifi_module "$WIFI_MODULE")
if [[ $? -ne 0 ]]; then
WIFI_MODULE=""
fi
fi
if [[ -n "$WIFI_MODULE" ]]; then
apply_wifi_blacklist "$WIFI_MODULE"
fi
fi
fi
echo ""
@ -390,11 +449,11 @@ echo "Device tree overlays enabled: ${DT_OVERLAYS_TO_APPLY[@]}"
# Mainline kernel is supposed to work ok by itself with hardware recognition
if [[ $LEGACY_KERNEL -eq 1 ]]; then
if [ -n "$WIFI_MODULE" ]; then
echo "Enabled wifi module $WIFI_MODULE"
if [[ -n "$WIFI_MODULE" ]]; then
echo "Forcefully enabled wifi module $WIFI_MODULE"
fi
if [ -n "$WIFI_ID" ] && [ -z "$WIFI_MODULE" ]; then
if [[ -n "$WIFI_ID" ]] && [[ ! -v WIFI_CHIPS[$WIFI_ID] ]]; then
echo "Wifi chip $WIFI_ID has been detected, but currently it is unsupported"
echo "Please report to: https://forum.armbian.com/topic/12656-wip-armbian-for-rk322x-devices/"
fi

11
packages/bsp/rk322x/rtk-bluetooth.service Normal file
View File

@ -0,0 +1,11 @@
[Unit]
Description=Realtek H5 protocol bluetooth support
Before=bluetooth.service
[Service]
Type=forking
RemainAfterExit=Yes
ExecStart=/usr/bin/rtk_hciattach -n -s 115200 /dev/ttyS1 rtk_h5 1500000
[Install]
WantedBy=multi-user.target

BIN
packages/bsp/rk322x/rtk_hciattach Normal file
View File

Binary file not shown.

0
patch/kernel/rk322x-current/01-linux-0003-rockchip-from-list.patch → patch/kernel/rk322x-current/01-linux-0003-rockchip-from-list.patch.disabled
View File

0
patch/kernel/rk322x-current/01-linux-0004-work-in-progress.patch → patch/kernel/rk322x-current/01-linux-0004-work-in-progress.patch.disabled
View File

0
patch/kernel/rk322x-current/01-linux-0005-for-libreelec.patch → patch/kernel/rk322x-current/01-linux-0005-for-libreelec.patch.disabled
View File

0
patch/kernel/rk322x-current/01-linux-0006-experimental.patch → patch/kernel/rk322x-current/01-linux-0006-experimental.patch.disabled
View File

0
patch/kernel/rk322x-current/01-linux-0007-fromlist-drm-lima-and-panfrost-for-5.8-plus.patch → patch/kernel/rk322x-current/01-linux-0007-fromlist-drm-lima-and-panfrost-for-5.8-plus.patch.disabled
View File

0
patch/kernel/rk322x-current/01-linux-0008-fromlist-add-rockchip-nfc-driver.patch → patch/kernel/rk322x-current/01-linux-0008-fromlist-add-rockchip-nfc-driver.patch.disabled
View File

0
patch/kernel/rk322x-current/01-linux-0013-v4l2-from-list.patch → patch/kernel/rk322x-current/01-linux-0013-v4l2-from-list.patch.disabled
View File

0
patch/kernel/rk322x-current/01-linux-0014-v4l2-work-in-progress.patch → patch/kernel/rk322x-current/01-linux-0014-v4l2-work-in-progress.patch.disabled
View File

281
patch/kernel/rk322x-current/01-linux-0015-fromlist-rga-for-rk322x.patch
View File

@ -1,152 +1,3 @@
diff --git a/Documentation/devicetree/bindings/media/rockchip-rga.txt b/Documentation/devicetree/bindings/media/rockchip-rga.txt
index fd5276abf..c53a8e513 100644
--- a/Documentation/devicetree/bindings/media/rockchip-rga.txt
+++ b/Documentation/devicetree/bindings/media/rockchip-rga.txt
@@ -6,8 +6,9 @@ BitBLT, alpha blending and image blur/sharpness.
Required properties:
- compatible: value should be one of the following
- "rockchip,rk3288-rga";
- "rockchip,rk3399-rga";
+ "rockchip,rk3228-rga", "rockchip,rk3288-rga": for Rockchip RK3228
+ "rockchip,rk3288-rga": for Rockchip RK3288
+ "rockchip,rk3399-rga": for Rockchip RK3399
- interrupts: RGA interrupt specifier.
From patchwork Mon Feb 3 22:40:16 2020
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To: Heiko Stuebner <heiko@sntech.de>, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Subject: [PATCH v4 2/3] ARM: dts: rockchip: add rga node for rk322x
Date: Mon, 3 Feb 2020 22:40:16 +0000
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Add a node to define the presence of RGA, a 2D raster
graphic acceleration unit.
@ -178,138 +29,6 @@ index 340ed6ccb..29d50bebc 100644
compatible = "rockchip,iommu";
reg = <0x20070800 0x100>;
From patchwork Mon Feb 3 22:40:17 2020
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To: Heiko Stuebner <heiko@sntech.de>, Rob Herring <robh+dt@kernel.org>,
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Subject: [PATCH v4 3/3] ARM: dts: rockchip: enable rga for rk3229-xms6
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Enable RGA for Mecer Xtreme Mini S6.
Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>

16
patch/kernel/rk322x-current/01-linux-0015-hantro-set-of-small-cleanups-and-fixes.patch
View File

@ -683,21 +683,7 @@ index 000000000000..a0c45e05cf03
+ power-domains = <&power RK3328_PD_VPU>;
+ iommus = <&vpu_mmu>;
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 0bff05c4c96d..ca95e804aae0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -14319,7 +14319,7 @@ M: Ezequiel Garcia <ezequiel@collabora.com>
L: linux-media@vger.kernel.org
S: Maintained
F: drivers/staging/media/hantro/
-F: Documentation/devicetree/bindings/media/rockchip-vpu.txt
+F: Documentation/devicetree/bindings/media/rockchip-vpu.yaml
ROCKER DRIVER
M: Jiri Pirko <jiri@resnulli.us>
--
2.17.1
From 1eba04297572f566a06ab9fe50f901640c77b091 Mon Sep 17 00:00:00 2001

166
patch/kernel/rk322x-current/01-linux-1002-arm-dts-rk322x-dts.patch
View File

@ -1,8 +1,8 @@
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index d6546d2676b9..26fbba6273ed 100644
index e8dd99201..02d9d3ae7 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -938,6 +938,12 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
@@ -952,6 +952,12 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3188-px3-evb.dtb \
rk3188-radxarock.dtb \
rk3228-evb.dtb \
@ -17,7 +17,7 @@ index d6546d2676b9..26fbba6273ed 100644
rk3288-evb-act8846.dtb \
diff --git a/arch/arm/boot/dts/rk3228a-box-h96mini.dts b/arch/arm/boot/dts/rk3228a-box-h96mini.dts
new file mode 100644
index 000000000000..c624500d1470
index 000000000..c624500d1
--- /dev/null
+++ b/arch/arm/boot/dts/rk3228a-box-h96mini.dts
@@ -0,0 +1,106 @@
@ -129,7 +129,7 @@ index 000000000000..c624500d1470
+};
diff --git a/arch/arm/boot/dts/rk3228a-box-nand.dts b/arch/arm/boot/dts/rk3228a-box-nand.dts
new file mode 100644
index 000000000000..f3e5ab89462b
index 000000000..f3e5ab894
--- /dev/null
+++ b/arch/arm/boot/dts/rk3228a-box-nand.dts
@@ -0,0 +1,57 @@
@ -192,7 +192,7 @@ index 000000000000..f3e5ab89462b
+};
diff --git a/arch/arm/boot/dts/rk3228a-box.dts b/arch/arm/boot/dts/rk3228a-box.dts
new file mode 100644
index 000000000000..e68ef44b95c9
index 000000000..e68ef44b9
--- /dev/null
+++ b/arch/arm/boot/dts/rk3228a-box.dts
@@ -0,0 +1,47 @@
@ -245,7 +245,7 @@ index 000000000000..e68ef44b95c9
+};
diff --git a/arch/arm/boot/dts/rk3228a-box.dtsi b/arch/arm/boot/dts/rk3228a-box.dtsi
new file mode 100644
index 000000000000..dbd5c5dc4491
index 000000000..dbd5c5dc4
--- /dev/null
+++ b/arch/arm/boot/dts/rk3228a-box.dtsi
@@ -0,0 +1,12 @@
@ -263,7 +263,7 @@ index 000000000000..dbd5c5dc4491
+};
diff --git a/arch/arm/boot/dts/rk3229-box-a95xr1.dts b/arch/arm/boot/dts/rk3229-box-a95xr1.dts
new file mode 100644
index 000000000000..b3695fb0b255
index 000000000..b3695fb0b
--- /dev/null
+++ b/arch/arm/boot/dts/rk3229-box-a95xr1.dts
@@ -0,0 +1,57 @@
@ -326,7 +326,7 @@ index 000000000000..b3695fb0b255
+};
diff --git a/arch/arm/boot/dts/rk3229-box-nand.dts b/arch/arm/boot/dts/rk3229-box-nand.dts
new file mode 100644
index 000000000000..5eca0f335c55
index 000000000..5eca0f335
--- /dev/null
+++ b/arch/arm/boot/dts/rk3229-box-nand.dts
@@ -0,0 +1,60 @@
@ -392,7 +392,7 @@ index 000000000000..5eca0f335c55
+};
diff --git a/arch/arm/boot/dts/rk3229-box.dts b/arch/arm/boot/dts/rk3229-box.dts
new file mode 100644
index 000000000000..b63e61cda257
index 000000000..b63e61cda
--- /dev/null
+++ b/arch/arm/boot/dts/rk3229-box.dts
@@ -0,0 +1,50 @@
@ -448,7 +448,7 @@ index 000000000000..b63e61cda257
+};
diff --git a/arch/arm/boot/dts/rk3229-box.dtsi b/arch/arm/boot/dts/rk3229-box.dtsi
new file mode 100644
index 000000000000..79e2524e07f2
index 000000000..79e2524e0
--- /dev/null
+++ b/arch/arm/boot/dts/rk3229-box.dtsi
@@ -0,0 +1,21 @@
@ -475,7 +475,7 @@ index 000000000000..79e2524e07f2
+};
diff --git a/arch/arm/boot/dts/rk3229-cpu-opp.dtsi b/arch/arm/boot/dts/rk3229-cpu-opp.dtsi
new file mode 100644
index 000000000000..c1c7613bab11
index 000000000..c1c7613ba
--- /dev/null
+++ b/arch/arm/boot/dts/rk3229-cpu-opp.dtsi
@@ -0,0 +1,50 @@
@ -531,7 +531,7 @@ index 000000000000..c1c7613bab11
+};
diff --git a/arch/arm/boot/dts/rk322x-box.dtsi b/arch/arm/boot/dts/rk322x-box.dtsi
new file mode 100644
index 000000000000..29df40f4fa63
index 000000000..44fb2f4ea
--- /dev/null
+++ b/arch/arm/boot/dts/rk322x-box.dtsi
@@ -0,0 +1,250 @@
@ -787,7 +787,7 @@ index 000000000000..29df40f4fa63
+};
diff --git a/arch/arm/boot/dts/rk322x-dcdc.dtsi b/arch/arm/boot/dts/rk322x-dcdc.dtsi
new file mode 100644
index 000000000000..6076cb1d0d0b
index 000000000..6076cb1d0
--- /dev/null
+++ b/arch/arm/boot/dts/rk322x-dcdc.dtsi
@@ -0,0 +1,164 @@
@ -956,7 +956,7 @@ index 000000000000..6076cb1d0d0b
+ };
+};
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index eef2c44bdf69..f7a50b903a7d 100644
index 5485a9918..c3ca67301 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -5,6 +5,8 @@
@ -968,7 +968,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
#include <dt-bindings/thermal/thermal.h>
/ {
@@ -14,6 +16,7 @@
@@ -14,6 +16,7 @@ / {
interrupt-parent = <&gic>;
aliases {
@ -976,7 +976,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
@@ -73,25 +76,25 @@
@@ -73,25 +76,25 @@ cpu0_opp_table: opp_table0 {
opp-408000000 {
opp-hz = /bits/ 64 <408000000>;
@ -1007,7 +1007,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
};
};
@@ -121,11 +124,52 @@
@@ -121,11 +124,52 @@ arm-pmu {
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
};
@ -1060,7 +1060,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
timer {
compatible = "arm,armv7-timer";
arm,cpu-registers-not-fw-configured;
@@ -143,17 +187,13 @@
@@ -143,15 +187,13 @@ xin24m: oscillator {
#clock-cells = <0>;
};
@ -1073,21 +1073,23 @@ index eef2c44bdf69..f7a50b903a7d 100644
compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s";
reg = <0x100b0000 0x4000>;
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #sound-dai-cells = <0>;
clock-names = "i2s_clk", "i2s_hclk";
clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>;
dmas = <&pdma 14>, <&pdma 15>;
@@ -169,6 +209,7 @@
@@ -165,6 +207,9 @@ i2s0: i2s0@100c0000 {
compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s";
reg = <0x100c0000 0x4000>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #sound-dai-cells = <0>;
clock-names = "i2s_clk", "i2s_hclk";
clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0_8CH>;
dmas = <&pdma 11>, <&pdma 12>;
@@ -186,6 +227,7 @@
@@ -182,6 +227,7 @@ spdif: spdif@100d0000 {
dma-names = "tx";
pinctrl-names = "default";
pinctrl-0 = <&spdif_tx>;
@ -1095,7 +1097,17 @@ index eef2c44bdf69..f7a50b903a7d 100644
status = "disabled";
};
@@ -213,6 +255,43 @@
@@ -189,6 +235,9 @@ i2s2: i2s2@100e0000 {
compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s";
reg = <0x100e0000 0x4000>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #sound-dai-cells = <0>;
clock-names = "i2s_clk", "i2s_hclk";
clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2_2CH>;
dmas = <&pdma 0>, <&pdma 1>;
@@ -207,6 +256,43 @@ io_domains: io-domains {
status = "disabled";
};
@ -1139,7 +1151,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
u2phy0: usb2-phy@760 {
compatible = "rockchip,rk3228-usb2phy";
reg = <0x0760 0x0c>;
@@ -263,6 +342,7 @@
@@ -257,6 +343,7 @@ u2phy1_host: host-port {
status = "disabled";
};
};
@ -1147,7 +1159,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
};
uart0: serial@11010000 {
@@ -301,7 +381,7 @@
@@ -295,7 +382,7 @@ uart2: serial@11030000 {
clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
clock-names = "baudclk", "apb_pclk";
pinctrl-names = "default";
@ -1156,7 +1168,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
reg-shift = <2>;
reg-io-width = <4>;
status = "disabled";
@@ -460,13 +540,13 @@
@@ -454,13 +541,13 @@ cru: clock-controller@110e0000 {
<&cru PLL_CPLL>, <&cru ACLK_PERI>,
<&cru HCLK_PERI>, <&cru PCLK_PERI>,
<&cru ACLK_CPU>, <&cru HCLK_CPU>,
@ -1173,7 +1185,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
};
thermal-zones {
@@ -511,6 +591,12 @@
@@ -505,6 +592,12 @@ map1 {
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
@ -1186,7 +1198,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
};
};
};
@@ -529,8 +615,9 @@
@@ -523,8 +616,9 @@ tsadc: tsadc@11150000 {
pinctrl-0 = <&otp_gpio>;
pinctrl-1 = <&otp_out>;
pinctrl-2 = <&otp_gpio>;
@ -1197,7 +1209,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
status = "disabled";
};
@@ -560,10 +647,33 @@
@@ -554,10 +648,33 @@ gpu: gpu@20000000 {
"ppmmu0",
"pp1",
"ppmmu1";
@ -1232,7 +1244,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
};
vpu_mmu: iommu@20020800 {
@@ -573,8 +683,8 @@
@@ -567,8 +684,8 @@ vpu_mmu: iommu@20020800 {
interrupt-names = "vpu_mmu";
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
clock-names = "aclk", "iface";
@ -1243,7 +1255,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
};
vdec_mmu: iommu@20030480 {
@@ -584,8 +694,8 @@
@@ -578,8 +695,8 @@ vdec_mmu: iommu@20030480 {
interrupt-names = "vdec_mmu";
clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>;
clock-names = "aclk", "iface";
@ -1254,7 +1266,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
};
vop: vop@20050000 {
@@ -639,7 +749,7 @@
@@ -622,7 +739,7 @@ iep_mmu: iommu@20070800 {
interrupt-names = "iep_mmu";
clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
clock-names = "aclk", "iface";
@ -1263,7 +1275,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
status = "disabled";
};
@@ -659,6 +769,7 @@
@@ -642,6 +759,7 @@ hdmi: hdmi@200a0000 {
phys = <&hdmi_phy>;
phy-names = "hdmi";
rockchip,grf = <&grf>;
@ -1271,7 +1283,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
status = "disabled";
ports {
@@ -680,9 +791,13 @@
@@ -663,9 +781,13 @@ sdmmc: mmc@30000000 {
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
@ -1286,7 +1298,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
status = "disabled";
};
@@ -692,10 +807,14 @@
@@ -675,10 +797,14 @@ sdio: mmc@30010000 {
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
@ -1301,23 +1313,17 @@ index eef2c44bdf69..f7a50b903a7d 100644
status = "disabled";
};
@@ -703,14 +822,13 @@
@@ -686,8 +812,7 @@ emmc: mmc@30020000 {
compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x30020000 0x4000>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
- clock-frequency = <37500000>;
- max-frequency = <37500000>;
+ max-frequency = <150000000>;
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
bus-width = <8>;
default-sample-phase = <158>;
fifo-depth = <0x100>;
+ max-frequency = <150000000>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
resets = <&cru SRST_EMMC>;
@@ -718,6 +836,22 @@
@@ -701,6 +826,22 @@ emmc: mmc@30020000 {
status = "disabled";
};
@ -1340,7 +1346,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
usb_otg: usb@30040000 {
compatible = "rockchip,rk3228-usb", "rockchip,rk3066-usb",
"snps,dwc2";
@@ -820,6 +954,26 @@
@@ -796,6 +937,26 @@ gmac: ethernet@30200000 {
status = "disabled";
};
@ -1367,7 +1373,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
gic: interrupt-controller@32010000 {
compatible = "arm,gic-400";
interrupt-controller;
@@ -908,6 +1062,11 @@
@@ -884,6 +1045,11 @@ pcfg_pull_none_drv_12ma: pcfg-pull-none-drv-12ma {
drive-strength = <12>;
};
@ -1379,7 +1385,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
sdmmc {
sdmmc_clk: sdmmc-clk {
rockchip,pins = <1 RK_PC0 1 &pcfg_pull_none_drv_12ma>;
@@ -923,6 +1082,10 @@
@@ -899,6 +1065,10 @@ sdmmc_bus4: sdmmc-bus4 {
<1 RK_PC4 1 &pcfg_pull_none_drv_12ma>,
<1 RK_PC5 1 &pcfg_pull_none_drv_12ma>;
};
@ -1390,7 +1396,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
};
sdio {
@@ -963,6 +1126,55 @@
@@ -939,6 +1109,55 @@ emmc_bus8: emmc-bus8 {
};
};
@ -1446,7 +1452,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
gmac {
rgmii_pins: rgmii-pins {
rockchip,pins = <2 RK_PB6 1 &pcfg_pull_none>,
@@ -1104,12 +1316,20 @@
@@ -1080,12 +1299,20 @@ pwm1 {
pwm1_pin: pwm1-pin {
rockchip,pins = <0 RK_PD6 2 &pcfg_pull_none>;
};
@ -1467,7 +1473,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
};
pwm3 {
@@ -1164,16 +1384,31 @@
@@ -1140,16 +1367,31 @@ uart1_rts: uart1-rts {
};
};
@ -1503,7 +1509,7 @@ index eef2c44bdf69..f7a50b903a7d 100644
uart2_cts: uart2-cts {
rockchip,pins = <0 RK_PD1 1 &pcfg_pull_none>;
@@ -1183,5 +1418,23 @@
@@ -1159,5 +1401,23 @@ uart2_rts: uart2-rts {
rockchip,pins = <0 RK_PD0 1 &pcfg_pull_none>;
};
};
@ -1527,6 +1533,54 @@ index eef2c44bdf69..f7a50b903a7d 100644
+
};
};
--
2.17.1
diff --git a/arch/arm/boot/dts/rk322x.dtsi.rej b/arch/arm/boot/dts/rk322x.dtsi.rej
new file mode 100644
index 000000000..cc36be3e9
--- /dev/null
+++ b/arch/arm/boot/dts/rk322x.dtsi.rej
@@ -0,0 +1,45 @@
+--- arch/arm/boot/dts/rk322x.dtsi
++++ arch/arm/boot/dts/rk322x.dtsi
+@@ -187,17 +231,13 @@
+ #clock-cells = <0>;
+ };
+
+- display_subsystem: display-subsystem {
+- compatible = "rockchip,display-subsystem";
+- ports = <&vop_out>;
+- };
+-
+ i2s1: i2s1@100b0000 {
+ compatible = "rockchip,rk3228-i2s", "rockchip,rk3066-i2s";
+ reg = <0x100b0000 0x4000>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
++ #sound-dai-cells = <0>;
+ clock-names = "i2s_clk", "i2s_hclk";
+ clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>;
+ dmas = <&pdma 14>, <&pdma 15>;
+@@ -213,6 +253,7 @@
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
++ #sound-dai-cells = <0>;
+ clock-names = "i2s_clk", "i2s_hclk";
+ clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0_8CH>;
+ dmas = <&pdma 11>, <&pdma 12>;
+@@ -825,14 +944,13 @@
+ compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc";
+ reg = <0x30020000 0x4000>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+- clock-frequency = <37500000>;
+- max-frequency = <37500000>;
+ clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
+ <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
+ clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+ bus-width = <8>;
+ default-sample-phase = <158>;
+ fifo-depth = <0x100>;
++ max-frequency = <150000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+ resets = <&cru SRST_EMMC>;

1
patch/kernel/rk322x-current/01-linux-1003-rk322x-hantro.patch
View File

@ -64,6 +64,7 @@ index 33c1ce169203..e64369e01a21 100644
extern const struct hantro_variant rk3328_vpu_variant;
extern const struct hantro_variant rk3288_vpu_variant;
+extern const struct hantro_variant rk322x_vpu_variant;
extern const struct hantro_variant imx8mq_vpu_variant;
extern const struct hantro_postproc_regs hantro_g1_postproc_regs;

56
patch/kernel/rk322x-current/01-linux-1004-rockchip-rk322x-enhancements-and-fixes.patch
View File

@ -173,31 +173,6 @@ index 61c984f10d8e..efca853eba6b 100644
--
2.17.1
From ed1bc72e4842eddebd2ee06e984d32990ea54e55 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Fri, 24 Apr 2020 08:05:27 +0200
Subject: [PATCH] drm: rockchip: vop: interlaced modes are not supported by
current driver - reject them
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index b8c0d2fcc52a..d50345bdcadc 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -1063,6 +1063,8 @@ static void vop_crtc_disable_vblank(struct drm_crtc *crtc)
enum drm_mode_status vop_crtc_mode_valid(struct drm_crtc *crtc,
const struct drm_display_mode *mode)
{
+ if (mode->flags & DRM_MODE_FLAG_INTERLACE)
+ return MODE_NO_INTERLACE;
if (mode->hdisplay > 3840)
return MODE_BAD_HVALUE;
--
2.17.1
From 4102c5b07d8610c729d577612c1df52737fb9a0f Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
@ -325,37 +300,6 @@ index bb8bdf5e3301..0c7a97352714 100644
--
2.17.1
From 80891e83d78781a8dddf8a5e50d89ad944d9c55b Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Fri, 24 Apr 2020 14:15:08 +0200
Subject: [PATCH] drm: rockchip: allow ycbcr420 and yuv444 for RK3228 HDMI
---
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index eb405cb3d1f6..cb2d3d6bab95 100644
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -552,6 +552,7 @@ static const struct dw_hdmi_phy_ops rk3228_hdmi_phy_ops = {
static struct rockchip_hdmi_chip_data rk3228_chip_data = {
.lcdsel_grf_reg = -1,
+ .ycbcr_444_allowed = false,
};
static const struct dw_hdmi_plat_data rk3228_hdmi_drv_data = {
@@ -560,6 +561,7 @@ static const struct dw_hdmi_plat_data rk3228_hdmi_drv_data = {
.phy_ops = &rk3228_hdmi_phy_ops,
.phy_name = "inno_dw_hdmi_phy2",
.phy_force_vendor = true,
+ .ycbcr_420_allowed = false,
};
static struct rockchip_hdmi_chip_data rk3288_chip_data = {
--
2.17.1
From fe30b024a7a7d6261dff0b87c2aec270ad530c39 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>

102
patch/kernel/rk322x-current/board-rk322x-box.patch
View File

@ -1,9 +1,9 @@
diff --git a/arch/arm/boot/dts/rk322x-box.dts b/arch/arm/boot/dts/rk322x-box.dts
new file mode 100644
index 000000000..6f2833a50
index 000000000..24590f864
--- /dev/null
+++ b/arch/arm/boot/dts/rk322x-box.dts
@@ -0,0 +1,213 @@
@@ -0,0 +1,239 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
@ -21,8 +21,8 @@ index 000000000..6f2833a50
+ compatible = "gpio-leds";
+
+ /*
+ * Working led, available on all boards
+ */
+ * Working led, available on all boards
+ */
+ working {
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
+ label = "working";
@ -34,6 +34,15 @@ index 000000000..6f2833a50
+
+ };
+
+ gpio_keys: gpio-keys {
+
+ compatible = "gpio-keys";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ };
+
+};
+
+&emmc {
@ -62,7 +71,7 @@ index 000000000..6f2833a50
+};
+
+&usb_otg {
+ dr_mode = "host";
+ dr_mode = "host";
+};
+
+&sdio {
@ -71,6 +80,8 @@ index 000000000..6f2833a50
+};
+
+&sdmmc {
+ cd-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>;
+ cd-debounce-delay-ms = <500>;
+ status = "okay";
+};
+
@ -78,41 +89,56 @@ index 000000000..6f2833a50
+&pinctrl {
+
+ pcfg_pull_up_12ma: pcfg-pull-up-12ma {
+ drive-strength = <12>;
+ bias-pull-up;
+ };
+ drive-strength = <12>;
+ bias-pull-up;
+ };
+
+ pcfg_pull_down_12ma: pcfg-pull-down-12ma {
+ drive-strength = <12>;
+ bias-pull-down;
+ };
+ pcfg_pull_down_12ma: pcfg-pull-down-12ma {
+ drive-strength = <12>;
+ bias-pull-down;
+ };
+
+ pcfg_pull_none_12ma: pcfg-pull-none-12ma {
+ drive-strength = <12>;
+ bias-disable;
+ };
+ pcfg_pull_none_12ma: pcfg-pull-none-12ma {
+ drive-strength = <12>;
+ bias-disable;
+ };
+
+ pcfg_pull_up_8ma: pcfg-pull-up-8ma {
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
+ pcfg_pull_down_8ma: pcfg-pull-down-8ma {
+ drive-strength = <8>;
+ bias-pull-down;
+ };
+
+ pcfg_pull_none_8ma: pcfg-pull-none-8ma {
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ pcfg_pull_up_2ma: pcfg-pull-up-2ma {
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ pcfg_pull_down_2ma: pcfg-pull-down-2ma {
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+ pcfg_pull_down_2ma: pcfg-pull-down-2ma {
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ pcfg_pull_none_2ma: pcfg-pull-none-2ma {
+ drive-strength = <2>;
+ bias-disable;
+ };
+ pcfg_pull_none_2ma: pcfg-pull-none-2ma {
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ /*
+ * Some rk322x electrical schemes report this kind of pull-up/down
+ * pin configurations. We set them here, but we don't use it in this
+ * device tree. These instead are useful for overlays, because they seem
+ * to increase stability on at least one board I got here
+ */
+ * Some rk322x electrical schemes report this kind of pull-up/down
+ * pin configurations. We set them here, but we don't use it in this
+ * device tree. These instead are useful for overlays, because they seem
+ * to increase stability on at least one board I got here
+ */
+ sdmmc {
+ sdmmc_clk: sdmmc-clk {
+ rockchip,pins = <1 16 RK_FUNC_1 &pcfg_pull_down>;
@ -131,9 +157,9 @@ index 000000000..6f2833a50
+ };
+
+ /*
+ * Same as above, decreasing strength of SDIO pins seems to be benefical
+ * to stability
+ */
+ * Same as above, decreasing strength of SDIO pins seems to be benefical
+ * to stability
+ */
+ sdio {
+ sdio_clk: sdio-clk {
+ rockchip,pins = <3 0 RK_FUNC_1 &pcfg_pull_down_2ma>;
@ -152,9 +178,9 @@ index 000000000..6f2833a50
+ };
+
+ /*
+ * Same drill as above, electrical schemes also report this pull-up/down
+ * configurations.
+ */
+ * Same drill as above, electrical schemes also report this pull-up/down
+ * configurations.
+ */
+ emmc {
+ emmc_clk: emmc-clk {
+ rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_up>;

62
patch/kernel/rk322x-current/general-add-overlay-compilation-support.patch
View File

@ -9,41 +9,39 @@ index 3c79f859..4e5c1d59 100644
+*.dtb*
+*.scr
diff --git a/scripts/Makefile.dtbinst b/scripts/Makefile.dtbinst
index 34614a48..8a8313d6 100644
index 50d580d77..94bd15617 100644
--- a/scripts/Makefile.dtbinst
+++ b/scripts/Makefile.dtbinst
@@ -20,6 +20,9 @@ include scripts/Kbuild.include
@@ -18,9 +18,12 @@ include scripts/Kbuild.include
include $(src)/Makefile
dtbinst-files := $(sort $(dtb-y) $(if $(CONFIG_OF_ALL_DTBS), $(dtb-)))
+dtboinst-files := $(dtbo-y)
+script-files := $(scr-y)
+readme-files := $(dtbotxt-y)
dtbinst-dirs := $(subdir-y) $(subdir-m)
# Helper targets for Installing DTBs into the boot directory
@@ -32,10 +35,19 @@ install-dir = $(patsubst $(dtbinst-root)%,$(INSTALL_DTBS_PATH)%,$(obj))
$(dtbinst-files): %.dtb: $(obj)/%.dtb
$(call cmd,dtb_install,$(install-dir))
+$(dtboinst-files): %.dtbo: $(obj)/%.dtbo
+ $(call cmd,dtb_install,$(install-dir))
dtbs := $(addprefix $(dst)/, $(dtb-y) $(if $(CONFIG_OF_ALL_DTBS),$(dtb-)))
+dtbos := $(addprefix $(dst)/, $(dtbo-y))
+scrs := $(addprefix $(dst)/, $(scr-y))
+readmes := $(addprefix $(dst)/, $(dtbotxt-y))
subdirs := $(addprefix $(obj)/, $(subdir-y) $(subdir-m))
-__dtbs_install: $(dtbs) $(subdirs)
+__dtbs_install: $(dtbs) $(dtbos) $(scrs) $(readmes) $(subdirs)
@:
quiet_cmd_dtb_install = INSTALL $@
@@ -29,6 +32,15 @@ quiet_cmd_dtb_install = INSTALL $@
$(dst)/%.dtb: $(obj)/%.dtb
$(call cmd,dtb_install)
+$(dst)/%.dtbo: $(obj)/%.dtbo
+ $(call cmd,dtb_install)
+
+$(script-files): %.scr: $(obj)/%.scr
+ $(call cmd,dtb_install,$(install-dir))
+$(dst)/%.scr: $(obj)/%.scr
+ $(call cmd,dtb_install)
+
+$(readme-files): %: $(src)/%
+ $(call cmd,dtb_install,$(install-dir))
+$(dst)/README.rk322x-overlays: $(src)/README.rk322x-overlays
+ $(call cmd,dtb_install)
+
$(dtbinst-dirs):
$(Q)$(MAKE) $(dtbinst)=$(obj)/$@
-PHONY += $(dtbinst-files) $(dtbinst-dirs)
-__dtbs_install: $(dtbinst-files) $(dtbinst-dirs)
+PHONY += $(dtbinst-files) $(dtboinst-files) $(script-files) $(readme-files) $(dtbinst-dirs)
+__dtbs_install: $(dtbinst-files) $(dtboinst-files) $(script-files) $(readme-files) $(dtbinst-dirs)
.PHONY: $(PHONY)
PHONY += $(subdirs)
$(subdirs):
$(Q)$(MAKE) $(dtbinst)=$@ dst=$(patsubst $(obj)/%,$(dst)/%,$@)
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 58c05e5d..2b95dda9 100644
--- a/scripts/Makefile.lib
@ -83,14 +81,14 @@ index 58c05e5d..2b95dda9 100644
# Bzip2
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 1bd2c74f5..560cf1c7f 100644
index e8dd99201..1e45adf97 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -977,6 +977,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
@@ -977,6 +984,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-veyron-speedy.dtb \
rk3288-veyron-tiger.dtb \
rk3288-vyasa.dtb
+subdir-y := overlay
+subdir-y := overlay
dtb-$(CONFIG_ARCH_S3C24XX) += \
s3c2416-smdk2416.dtb
dtb-$(CONFIG_ARCH_S3C64XX) += \

39
patch/kernel/rk322x-current/general-add-overlays.patch
View File

@ -185,14 +185,15 @@ index 000000000..d4c39e20a
+
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
new file mode 100644
index 000000000..faaee4070
index 000000000..508e477f7
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
@@ -0,0 +1,41 @@
@@ -0,0 +1,57 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
@ -229,17 +230,33 @@ index 000000000..faaee4070
+ };
+ };
+
+ fragment@2 {
+ target = <&gpio_keys>;
+ __overlay__ {
+
+ reset {
+ gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <200>;
+ wakeup-source;
+ };
+
+ };
+ };
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
new file mode 100644
index 000000000..bbf2b0ee0
index 000000000..153f71565
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
@@ -0,0 +1,42 @@
@@ -0,0 +1,57 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
@ -276,6 +293,20 @@ index 000000000..bbf2b0ee0
+ };
+ };
+
+ fragment@2 {
+ target = <&gpio_keys>;
+ __overlay__ {
+
+ reset {
+ gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <200>;
+ wakeup-source;
+ };
+
+ };
+ };
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-nand.dts b/arch/arm/boot/dts/overlay/rk322x-nand.dts

12
patch/kernel/rk322x-current/linux.999.03-arm-vdso-add-vdso_clock_gettime64-phys-timer-syscall.patch
View File

@ -1,12 +0,0 @@
diff --git a/arch/arm/kernel/vdso.c b/arch/arm/kernel/vdso.c
index e0330a25e1..28cfe7bad1 100644
--- a/arch/arm/kernel/vdso.c
+++ b/arch/arm/kernel/vdso.c
@@ -184,6 +184,7 @@ static void __init patch_vdso(void *ehdr)
if (!cntvct_ok) {
vdso_nullpatch_one(&einfo, "__vdso_gettimeofday");
vdso_nullpatch_one(&einfo, "__vdso_clock_gettime");
+ vdso_nullpatch_one(&einfo, "__vdso_clock_gettime64");
}
}

53
patch/kernel/rk322x-dev/01-linux-0015-fromlist-rga-for-rk322x.patch.disabled Normal file
View File

@ -0,0 +1,53 @@
Add a node to define the presence of RGA, a 2D raster
graphic acceleration unit.
Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
---
arch/arm/boot/dts/rk322x.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 340ed6ccb..29d50bebc 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -621,6 +621,17 @@
status = "disabled";
};
+ rga: rga@20060000 {
+ compatible = "rockchip,rk3228-rga", "rockchip,rk3288-rga";
+ reg = <0x20060000 0x1000>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;
+ clock-names = "aclk", "hclk", "sclk";
+ resets = <&cru SRST_RGA>, <&cru SRST_RGA_A>, <&cru SRST_RGA_H>;
+ reset-names = "core", "axi", "ahb";
+ status = "disabled";
+ };
+
iep_mmu: iommu@20070800 {
compatible = "rockchip,iommu";
reg = <0x20070800 0x100>;
Enable RGA for Mecer Xtreme Mini S6.
Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
---
arch/arm/boot/dts/rk3229-xms6.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/rk3229-xms6.dts b/arch/arm/boot/dts/rk3229-xms6.dts
index 679fc2b00..894f64a4a 100644
--- a/arch/arm/boot/dts/rk3229-xms6.dts
+++ b/arch/arm/boot/dts/rk3229-xms6.dts
@@ -202,6 +202,10 @@
status = "okay";
};
+&rga {
+ status = "okay";
+};
+
&sdmmc {
cap-mmc-highspeed;
disable-wp;

98
patch/kernel/rk322x-dev/01-linux-1000-clk-rockchip-rk3228-fixup.patch Normal file
View File

@ -0,0 +1,98 @@
diff --git a/drivers/clk/rockchip/clk-rk3228.c b/drivers/clk/rockchip/clk-rk3228.c
index 0127d702720c..6ef71ec239ae 100644
--- a/drivers/clk/rockchip/clk-rk3228.c
+++ b/drivers/clk/rockchip/clk-rk3228.c
@@ -353,7 +353,7 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
RK2928_CLKGATE_CON(10), 12, GFLAGS),
COMPOSITE(SCLK_WIFI, "sclk_wifi", mux_pll_src_cpll_gpll_usb480m_p, 0,
- RK2928_CLKSEL_CON(23), 5, 2, MFLAGS, 0, 6, DFLAGS,
+ RK2928_CLKSEL_CON(23), 5, 2, MFLAGS, 0, 5, DFLAGS,
RK2928_CLKGATE_CON(2), 15, GFLAGS),
COMPOSITE(SCLK_SDMMC, "sclk_sdmmc", mux_mmc_src_p, 0,
--
2.17.1
From 3acbbe5eb438e8b1061a803881579030d3c2b424 Mon Sep 17 00:00:00 2001
From: Chen Lei <lei.chen@rock-chips.com>
Date: Tue, 25 Dec 2018 18:29:04 +0800
Subject: [PATCH] clk: rockchip: rk322x: fix wrong mmc phase shift for rk3228
mmc sample shift should be 1 for rk3228, or it will fail
if we enable mmc tuning for rk3228.
Change-Id: I301c2a7d33de8d519d7c288aef03a82531016373
Signed-off-by: Chen Lei <lei.chen@rock-chips.com>
---
drivers/clk/rockchip/clk-rk3228.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/rockchip/clk-rk3228.c b/drivers/clk/rockchip/clk-rk3228.c
index 6ef71ec239ae..27adfca1a095 100644
--- a/drivers/clk/rockchip/clk-rk3228.c
+++ b/drivers/clk/rockchip/clk-rk3228.c
@@ -610,13 +610,13 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
/* PD_MMC */
MMC(SCLK_SDMMC_DRV, "sdmmc_drv", "sclk_sdmmc", RK3228_SDMMC_CON0, 1),
- MMC(SCLK_SDMMC_SAMPLE, "sdmmc_sample", "sclk_sdmmc", RK3228_SDMMC_CON1, 0),
+ MMC(SCLK_SDMMC_SAMPLE, "sdmmc_sample", "sclk_sdmmc", RK3228_SDMMC_CON1, 1),
MMC(SCLK_SDIO_DRV, "sdio_drv", "sclk_sdio", RK3228_SDIO_CON0, 1),
- MMC(SCLK_SDIO_SAMPLE, "sdio_sample", "sclk_sdio", RK3228_SDIO_CON1, 0),
+ MMC(SCLK_SDIO_SAMPLE, "sdio_sample", "sclk_sdio", RK3228_SDIO_CON1, 1),
MMC(SCLK_EMMC_DRV, "emmc_drv", "sclk_emmc", RK3228_EMMC_CON0, 1),
- MMC(SCLK_EMMC_SAMPLE, "emmc_sample", "sclk_emmc", RK3228_EMMC_CON1, 0),
+ MMC(SCLK_EMMC_SAMPLE, "emmc_sample", "sclk_emmc", RK3228_EMMC_CON1, 1),
};
static const char *const rk3228_critical_clocks[] __initconst = {
--
2.17.1
From a692001c1249473bdfe975ef53d2bdb8a4df736d Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Mon, 5 Feb 2018 10:04:15 +0800
Subject: [PATCH] clk: rockchip: rk3228: Fix armclk parent
Change-Id: I09830d96b37cca600f1782b9013b25e043467f97
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
drivers/clk/rockchip/clk-rk3228.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk3228.c b/drivers/clk/rockchip/clk-rk3228.c
index 58292f80ad66..fba513de94eb 100644
--- a/drivers/clk/rockchip/clk-rk3228.c
+++ b/drivers/clk/rockchip/clk-rk3228.c
@@ -170,7 +170,7 @@ static struct rockchip_pll_clock rk3228_pll_clks[] __initdata = {
[cpll] = PLL(pll_rk3036, PLL_CPLL, "cpll", mux_pll_p, 0, RK2928_PLL_CON(6),
RK2928_MODE_CON, 8, 8, 0, NULL),
[gpll] = PLL(pll_rk3036, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(9),
- RK2928_MODE_CON, 12, 9, ROCKCHIP_PLL_SYNC_RATE, rk3228_pll_rates),
+ RK2928_MODE_CON, 12, 9, 0, rk3228_pll_rates),
};
#define MFLAGS CLK_MUX_HIWORD_MASK
--
2.17.1
From f57d5061e7357a8f7a181517530658a223ba415b Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Thu, 22 Jun 2017 19:53:46 +0800
Subject: [PATCH] clk: rockchip: rk3228: fix gpu gate-register
Fix a typo making the aclk_gpu and aclk_gpu_noc access a wrong register to
handle its gate.
Change-Id: Ie0bac8014363af7c0409b8a56eacf2e858818843
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
drivers/clk/rockchip/clk-rk3228.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

219
patch/kernel/rk322x-dev/01-linux-1001-clk-rockchip-rk3228-more-fixes.patch Normal file
View File

@ -0,0 +1,219 @@
diff --git a/drivers/clk/rockchip/clk-rk3228.c b/drivers/clk/rockchip/clk-rk3228.c
index 448b202bf4f3..828d0003a18e 100644
--- a/drivers/clk/rockchip/clk-rk3228.c
+++ b/drivers/clk/rockchip/clk-rk3228.c
@@ -510,12 +510,12 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
/* PD_VOP */
GATE(ACLK_RGA, "aclk_rga", "aclk_rga_pre", 0, RK2928_CLKGATE_CON(13), 0, GFLAGS),
- GATE(0, "aclk_rga_noc", "aclk_rga_pre", 0, RK2928_CLKGATE_CON(13), 11, GFLAGS),
+ GATE(0, "aclk_rga_noc", "aclk_rga_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(13), 11, GFLAGS),
GATE(ACLK_IEP, "aclk_iep", "aclk_iep_pre", 0, RK2928_CLKGATE_CON(13), 2, GFLAGS),
- GATE(0, "aclk_iep_noc", "aclk_iep_pre", 0, RK2928_CLKGATE_CON(13), 9, GFLAGS),
+ GATE(0, "aclk_iep_noc", "aclk_iep_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(13), 9, GFLAGS),
GATE(ACLK_VOP, "aclk_vop", "aclk_vop_pre", 0, RK2928_CLKGATE_CON(13), 5, GFLAGS),
- GATE(0, "aclk_vop_noc", "aclk_vop_pre", 0, RK2928_CLKGATE_CON(13), 12, GFLAGS),
+ GATE(0, "aclk_vop_noc", "aclk_vop_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(13), 12, GFLAGS),
GATE(ACLK_HDCP, "aclk_hdcp", "aclk_hdcp_pre", 0, RK2928_CLKGATE_CON(14), 10, GFLAGS),
GATE(0, "aclk_hdcp_noc", "aclk_hdcp_pre", 0, RK2928_CLKGATE_CON(13), 10, GFLAGS),
@@ -523,13 +523,13 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
GATE(HCLK_RGA, "hclk_rga", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(13), 1, GFLAGS),
GATE(HCLK_IEP, "hclk_iep", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(13), 3, GFLAGS),
GATE(HCLK_VOP, "hclk_vop", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(13), 6, GFLAGS),
- GATE(0, "hclk_vio_ahb_arbi", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(13), 7, GFLAGS),
- GATE(0, "hclk_vio_noc", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(13), 8, GFLAGS),
- GATE(0, "hclk_vop_noc", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(13), 13, GFLAGS),
- GATE(HCLK_VIO_H2P, "hclk_vio_h2p", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(14), 7, GFLAGS),
+ GATE(0, "hclk_vio_ahb_arbi", "hclk_vio_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(13), 7, GFLAGS),
+ GATE(0, "hclk_vio_noc", "hclk_vio_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(13), 8, GFLAGS),
+ GATE(0, "hclk_vop_noc", "hclk_vio_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(13), 13, GFLAGS),
+ GATE(HCLK_VIO_H2P, "hclk_vio_h2p", "hclk_vio_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(14), 7, GFLAGS),
GATE(HCLK_HDCP_MMU, "hclk_hdcp_mmu", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(14), 12, GFLAGS),
GATE(PCLK_HDMI_CTRL, "pclk_hdmi_ctrl", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(14), 6, GFLAGS),
- GATE(PCLK_VIO_H2P, "pclk_vio_h2p", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(14), 8, GFLAGS),
+ GATE(PCLK_VIO_H2P, "pclk_vio_h2p", "hclk_vio_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(14), 8, GFLAGS),
GATE(PCLK_HDCP, "pclk_hdcp", "hclk_vio_pre", 0, RK2928_CLKGATE_CON(14), 11, GFLAGS),
/* PD_PERI */
@@ -541,13 +541,13 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
GATE(HCLK_EMMC, "hclk_emmc", "hclk_peri", 0, RK2928_CLKGATE_CON(11), 2, GFLAGS),
GATE(HCLK_NANDC, "hclk_nandc", "hclk_peri", 0, RK2928_CLKGATE_CON(11), 3, GFLAGS),
GATE(HCLK_HOST0, "hclk_host0", "hclk_peri", 0, RK2928_CLKGATE_CON(11), 6, GFLAGS),
- GATE(0, "hclk_host0_arb", "hclk_peri", 0, RK2928_CLKGATE_CON(11), 7, GFLAGS),
+ GATE(0, "hclk_host0_arb", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(11), 7, GFLAGS),
GATE(HCLK_HOST1, "hclk_host1", "hclk_peri", 0, RK2928_CLKGATE_CON(11), 8, GFLAGS),
- GATE(0, "hclk_host1_arb", "hclk_peri", 0, RK2928_CLKGATE_CON(11), 9, GFLAGS),
+ GATE(0, "hclk_host1_arb", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(11), 9, GFLAGS),
GATE(HCLK_HOST2, "hclk_host2", "hclk_peri", 0, RK2928_CLKGATE_CON(11), 10, GFLAGS),
GATE(HCLK_OTG, "hclk_otg", "hclk_peri", 0, RK2928_CLKGATE_CON(11), 12, GFLAGS),
- GATE(0, "hclk_otg_pmu", "hclk_peri", 0, RK2928_CLKGATE_CON(11), 13, GFLAGS),
- GATE(0, "hclk_host2_arb", "hclk_peri", 0, RK2928_CLKGATE_CON(11), 14, GFLAGS),
+ GATE(0, "hclk_otg_pmu", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(11), 13, GFLAGS),
+ GATE(0, "hclk_host2_arb", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(11), 14, GFLAGS),
GATE(0, "hclk_peri_noc", "hclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(12), 1, GFLAGS),
GATE(PCLK_GMAC, "pclk_gmac", "pclk_peri", 0, RK2928_CLKGATE_CON(11), 5, GFLAGS),
@@ -555,15 +555,15 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
/* PD_GPU */
GATE(ACLK_GPU, "aclk_gpu", "aclk_gpu_pre", 0, RK2928_CLKGATE_CON(7), 14, GFLAGS),
- GATE(0, "aclk_gpu_noc", "aclk_gpu_pre", 0, RK2928_CLKGATE_CON(7), 15, GFLAGS),
+ GATE(0, "aclk_gpu_noc", "aclk_gpu_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(7), 15, GFLAGS),
/* PD_BUS */
- GATE(0, "sclk_initmem_mbist", "aclk_cpu", 0, RK2928_CLKGATE_CON(8), 1, GFLAGS),
- GATE(0, "aclk_initmem", "aclk_cpu", 0, RK2928_CLKGATE_CON(8), 0, GFLAGS),
+ GATE(0, "sclk_initmem_mbist", "aclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(8), 1, GFLAGS),
+ GATE(0, "aclk_initmem", "aclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(8), 0, GFLAGS),
GATE(ACLK_DMAC, "aclk_dmac_bus", "aclk_cpu", 0, RK2928_CLKGATE_CON(8), 2, GFLAGS),
GATE(0, "aclk_bus_noc", "aclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(10), 1, GFLAGS),
- GATE(0, "hclk_rom", "hclk_cpu", 0, RK2928_CLKGATE_CON(8), 3, GFLAGS),
+ GATE(0, "hclk_rom", "hclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(8), 3, GFLAGS),
GATE(HCLK_I2S0_8CH, "hclk_i2s0_8ch", "hclk_cpu", 0, RK2928_CLKGATE_CON(8), 7, GFLAGS),
GATE(HCLK_I2S1_8CH, "hclk_i2s1_8ch", "hclk_cpu", 0, RK2928_CLKGATE_CON(8), 8, GFLAGS),
GATE(HCLK_I2S2_2CH, "hclk_i2s2_2ch", "hclk_cpu", 0, RK2928_CLKGATE_CON(8), 9, GFLAGS),
@@ -572,9 +572,9 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
GATE(HCLK_M_CRYPTO, "hclk_crypto_mst", "hclk_cpu", 0, RK2928_CLKGATE_CON(8), 11, GFLAGS),
GATE(HCLK_S_CRYPTO, "hclk_crypto_slv", "hclk_cpu", 0, RK2928_CLKGATE_CON(8), 12, GFLAGS),
- GATE(0, "pclk_ddrupctl", "pclk_ddr_pre", 0, RK2928_CLKGATE_CON(8), 4, GFLAGS),
- GATE(0, "pclk_ddrmon", "pclk_ddr_pre", 0, RK2928_CLKGATE_CON(8), 6, GFLAGS),
- GATE(0, "pclk_msch_noc", "pclk_ddr_pre", 0, RK2928_CLKGATE_CON(10), 2, GFLAGS),
+ GATE(0, "pclk_ddrupctl", "pclk_ddr_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(8), 4, GFLAGS),
+ GATE(0, "pclk_ddrmon", "pclk_ddr_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(8), 6, GFLAGS),
+ GATE(0, "pclk_msch_noc", "pclk_ddr_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(10), 2, GFLAGS),
GATE(PCLK_EFUSE_1024, "pclk_efuse_1024", "pclk_cpu", 0, RK2928_CLKGATE_CON(8), 13, GFLAGS),
GATE(PCLK_EFUSE_256, "pclk_efuse_256", "pclk_cpu", 0, RK2928_CLKGATE_CON(8), 14, GFLAGS),
@@ -583,7 +583,7 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
GATE(PCLK_I2C2, "pclk_i2c2", "pclk_cpu", 0, RK2928_CLKGATE_CON(9), 1, GFLAGS),
GATE(PCLK_I2C3, "pclk_i2c3", "pclk_cpu", 0, RK2928_CLKGATE_CON(9), 2, GFLAGS),
GATE(PCLK_TIMER, "pclk_timer0", "pclk_cpu", 0, RK2928_CLKGATE_CON(9), 4, GFLAGS),
- GATE(0, "pclk_stimer", "pclk_cpu", 0, RK2928_CLKGATE_CON(9), 5, GFLAGS),
+ GATE(0, "pclk_stimer", "pclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(9), 5, GFLAGS),
GATE(PCLK_SPI0, "pclk_spi0", "pclk_cpu", 0, RK2928_CLKGATE_CON(9), 6, GFLAGS),
GATE(PCLK_PWM, "pclk_rk_pwm", "pclk_cpu", 0, RK2928_CLKGATE_CON(9), 7, GFLAGS),
GATE(PCLK_GPIO0, "pclk_gpio0", "pclk_cpu", 0, RK2928_CLKGATE_CON(9), 8, GFLAGS),
@@ -597,22 +597,22 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
GATE(PCLK_GRF, "pclk_grf", "pclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(10), 0, GFLAGS),
GATE(0, "pclk_cru", "pclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(10), 1, GFLAGS),
GATE(0, "pclk_sgrf", "pclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(10), 2, GFLAGS),
- GATE(0, "pclk_sim", "pclk_cpu", 0, RK2928_CLKGATE_CON(10), 3, GFLAGS),
+ GATE(0, "pclk_sim", "pclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(10), 3, GFLAGS),
- GATE(0, "pclk_ddrphy", "pclk_phy_pre", 0, RK2928_CLKGATE_CON(10), 3, GFLAGS),
- GATE(0, "pclk_acodecphy", "pclk_phy_pre", 0, RK2928_CLKGATE_CON(10), 5, GFLAGS),
+ GATE(0, "pclk_ddrphy", "pclk_phy_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(10), 3, GFLAGS),
+ GATE(PCLK_ACODECPHY, "pclk_acodecphy", "pclk_phy_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(10), 5, GFLAGS),
GATE(PCLK_HDMI_PHY, "pclk_hdmiphy", "pclk_phy_pre", 0, RK2928_CLKGATE_CON(10), 7, GFLAGS),
- GATE(0, "pclk_vdacphy", "pclk_phy_pre", 0, RK2928_CLKGATE_CON(10), 8, GFLAGS),
- GATE(0, "pclk_phy_noc", "pclk_phy_pre", 0, RK2928_CLKGATE_CON(10), 9, GFLAGS),
+ GATE(0, "pclk_vdacphy", "pclk_phy_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(10), 8, GFLAGS),
+ GATE(0, "pclk_phy_noc", "pclk_phy_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(10), 9, GFLAGS),
GATE(ACLK_VPU, "aclk_vpu", "aclk_vpu_pre", 0, RK2928_CLKGATE_CON(15), 0, GFLAGS),
- GATE(0, "aclk_vpu_noc", "aclk_vpu_pre", 0, RK2928_CLKGATE_CON(15), 4, GFLAGS),
+ GATE(0, "aclk_vpu_noc", "aclk_vpu_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(15), 4, GFLAGS),
GATE(ACLK_RKVDEC, "aclk_rkvdec", "aclk_rkvdec_pre", 0, RK2928_CLKGATE_CON(15), 2, GFLAGS),
- GATE(0, "aclk_rkvdec_noc", "aclk_rkvdec_pre", 0, RK2928_CLKGATE_CON(15), 6, GFLAGS),
+ GATE(0, "aclk_rkvdec_noc", "aclk_rkvdec_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(15), 6, GFLAGS),
GATE(HCLK_VPU, "hclk_vpu", "hclk_vpu_pre", 0, RK2928_CLKGATE_CON(15), 1, GFLAGS),
- GATE(0, "hclk_vpu_noc", "hclk_vpu_pre", 0, RK2928_CLKGATE_CON(15), 5, GFLAGS),
+ GATE(0, "hclk_vpu_noc", "hclk_vpu_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(15), 5, GFLAGS),
GATE(HCLK_RKVDEC, "hclk_rkvdec", "hclk_rkvdec_pre", 0, RK2928_CLKGATE_CON(15), 3, GFLAGS),
- GATE(0, "hclk_rkvdec_noc", "hclk_rkvdec_pre", 0, RK2928_CLKGATE_CON(15), 7, GFLAGS),
+ GATE(0, "hclk_rkvdec_noc", "hclk_rkvdec_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(15), 7, GFLAGS),
/* PD_MMC */
MMC(SCLK_SDMMC_DRV, "sdmmc_drv", "sclk_sdmmc", RK3228_SDMMC_CON0, 1),
@@ -656,25 +656,34 @@ static const char *const rk3228_critical_clocks[] __initconst = {
"pclk_phy_noc",
"aclk_vpu_noc",
"aclk_rkvdec_noc",
+ "aclk_rkvdec",
"hclk_vpu_noc",
"hclk_rkvdec_noc",
+ "hclk_rkvdec",
};
+static void __iomem *rk3228_cru_base;
+
+static void rk3228_clk_shutdown(void)
+{
+ writel_relaxed(0x11010000, rk3228_cru_base + RK3228_MODE_CON);
+}
+
static void __init rk3228_clk_init(struct device_node *np)
{
struct rockchip_clk_provider *ctx;
- void __iomem *reg_base;
- reg_base = of_iomap(np, 0);
- if (!reg_base) {
+ rk3228_cru_base = of_iomap(np, 0);
+
+ if (!rk3228_cru_base) {
pr_err("%s: could not map cru region\n", __func__);
return;
}
- ctx = rockchip_clk_init(np, reg_base, CLK_NR_CLKS);
+ ctx = rockchip_clk_init(np, rk3228_cru_base, CLK_NR_CLKS);
if (IS_ERR(ctx)) {
pr_err("%s: rockchip clk init failed\n", __func__);
- iounmap(reg_base);
+ iounmap(rk3228_cru_base);
return;
}
@@ -691,10 +700,10 @@ static void __init rk3228_clk_init(struct device_node *np)
&rk3228_cpuclk_data, rk3228_cpuclk_rates,
ARRAY_SIZE(rk3228_cpuclk_rates));
- rockchip_register_softrst(np, 9, reg_base + RK2928_SOFTRST_CON(0),
+ rockchip_register_softrst(np, 9, rk3228_cru_base + RK2928_SOFTRST_CON(0),
ROCKCHIP_SOFTRST_HIWORD_MASK);
- rockchip_register_restart_notifier(ctx, RK3228_GLB_SRST_FST, NULL);
+ rockchip_register_restart_notifier(ctx, RK3228_GLB_SRST_FST, rk3228_clk_shutdown);
rockchip_clk_of_add_provider(np, ctx);
}
diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
index 2271a84124b0..f2f80f224f30 100644
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h
@@ -134,6 +134,7 @@ struct clk;
#define RK3308_EMMC_CON0 0x490
#define RK3308_EMMC_CON1 0x494
+#define RK3228_MODE_CON 0x40
#define RK3328_PLL_CON(x) RK2928_PLL_CON(x)
#define RK3328_CLKSEL_CON(x) ((x) * 0x4 + 0x100)
#define RK3328_CLKGATE_CON(x) ((x) * 0x4 + 0x200)
diff --git a/include/dt-bindings/clock/rk3228-cru.h b/include/dt-bindings/clock/rk3228-cru.h
index de550ea56eeb..16e1feae5ce4 100644
--- a/include/dt-bindings/clock/rk3228-cru.h
+++ b/include/dt-bindings/clock/rk3228-cru.h
@@ -65,6 +65,7 @@
#define SCLK_OTGPHY0 142
#define SCLK_OTGPHY1 143
#define SCLK_HDMI_PHY 144
+#define SCLK_DDRC 145
/* dclk gates */
#define DCLK_VOP 190
@@ -115,6 +116,7 @@
#define PCLK_HDMI_CTRL 364
#define PCLK_HDMI_PHY 365
#define PCLK_GMAC 367
+#define PCLK_ACODECPHY 368
/* hclk gates */
#define HCLK_I2S0_8CH 442
--
2.17.1

1586
patch/kernel/rk322x-dev/01-linux-1002-arm-dts-rk322x-dts.patch Normal file
View File

File diff suppressed because it is too large Load Diff

98
patch/kernel/rk322x-dev/01-linux-1003-rk322x-hantro.patch Normal file
View File

@ -0,0 +1,98 @@
diff --git a/Documentation/devicetree/bindings/media/rockchip-vpu.yaml b/Documentation/devicetree/bindings/media/rockchip-vpu.yaml
index a0c45e05cf03..a20cfaa8973e 100644
--- a/Documentation/devicetree/bindings/media/rockchip-vpu.yaml
+++ b/Documentation/devicetree/bindings/media/rockchip-vpu.yaml
@@ -16,6 +16,7 @@ description:
properties:
compatible:
enum:
+ - rockchip,rk322x-vpu
- rockchip,rk3288-vpu
- rockchip,rk3328-vpu
- rockchip,rk3399-vpu
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index f7a50b903a7d..2ed8aa7ae520 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -676,6 +676,18 @@
};
};
+ vpu: video-codec@20020000 {
+ compatible = "rockchip,rk322x-vpu";
+ reg = <0x20020000 0x800>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "vepu", "vdpu";
+ clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+ clock-names = "aclk", "hclk";
+ iommus = <&vpu_mmu>;
+ power-domains = <&power RK3228_PD_VPU>;
+ };
+
vpu_mmu: iommu@20020800 {
compatible = "rockchip,iommu";
reg = <0x20020800 0x100>;
diff --git a/drivers/staging/media/hantro/Kconfig b/drivers/staging/media/hantro/Kconfig
index de77fe6554e7..9f99d1c9f453 100644
--- a/drivers/staging/media/hantro/Kconfig
+++ b/drivers/staging/media/hantro/Kconfig
@@ -20,4 +20,4 @@ config VIDEO_HANTRO_ROCKCHIP
depends on ARCH_ROCKCHIP || COMPILE_TEST
default y
help
- Enable support for RK3288, RK3328, and RK3399 SoCs.
+ Enable support for RK322x, RK3288, RK3328, and RK3399 SoCs.
diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c
index a732beeb3bb6..fae9555a349b 100644
--- a/drivers/staging/media/hantro/hantro_drv.c
+++ b/drivers/staging/media/hantro/hantro_drv.c
@@ -469,6 +469,7 @@ static const struct of_device_id of_hantro_match[] = {
{ .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, },
{ .compatible = "rockchip,rk3328-vpu", .data = &rk3328_vpu_variant, },
{ .compatible = "rockchip,rk3288-vpu", .data = &rk3288_vpu_variant, },
+ { .compatible = "rockchip,rk322x-vpu", .data = &rk322x_vpu_variant, },
#endif
{ /* sentinel */ }
};
diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
index 33c1ce169203..e64369e01a21 100644
--- a/drivers/staging/media/hantro/hantro_hw.h
+++ b/drivers/staging/media/hantro/hantro_hw.h
@@ -157,6 +157,7 @@ enum hantro_enc_fmt {
extern const struct hantro_variant rk3399_vpu_variant;
extern const struct hantro_variant rk3328_vpu_variant;
extern const struct hantro_variant rk3288_vpu_variant;
+extern const struct hantro_variant rk322x_vpu_variant;
extern const struct hantro_variant imx8mq_vpu_variant;
extern const struct hantro_postproc_regs hantro_g1_postproc_regs;
diff --git a/drivers/staging/media/hantro/rk3399_vpu_hw.c b/drivers/staging/media/hantro/rk3399_vpu_hw.c
index 78f878ca01ff..0a6c021c2332 100644
--- a/drivers/staging/media/hantro/rk3399_vpu_hw.c
+++ b/drivers/staging/media/hantro/rk3399_vpu_hw.c
@@ -241,3 +241,20 @@ const struct hantro_variant rk3328_vpu_variant = {
.clk_names = rk3399_clk_names,
.num_clocks = ARRAY_SIZE(rk3399_clk_names),
};
+
+const struct hantro_variant rk322x_vpu_variant = {
+ .enc_offset = 0x0,
+ .enc_fmts = rk3399_vpu_enc_fmts,
+ .num_enc_fmts = ARRAY_SIZE(rk3399_vpu_enc_fmts),
+ .dec_offset = 0x400,
+ .dec_fmts = rk3399_vpu_dec_fmts,
+ .num_dec_fmts = ARRAY_SIZE(rk3399_vpu_dec_fmts),
+ .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER |
+ HANTRO_H264_DECODER,
+ .codec_ops = rk3399_vpu_codec_ops,
+ .irqs = rk3399_irqs,
+ .num_irqs = ARRAY_SIZE(rk3399_irqs),
+ .init = rk3399_vpu_hw_init,
+ .clk_names = rk3399_clk_names,
+ .num_clocks = ARRAY_SIZE(rk3399_clk_names)
+};
--
2.17.1

383
patch/kernel/rk322x-dev/01-linux-1004-rockchip-rk322x-enhancements-and-fixes.patch Normal file
View File

@ -0,0 +1,383 @@
diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c
index 54eb6cfc5d5b..c6b33f7c43df 100644
--- a/drivers/soc/rockchip/pm_domains.c
+++ b/drivers/soc/rockchip/pm_domains.c
@@ -71,6 +71,7 @@ struct rockchip_pm_domain {
struct regmap **qos_regmap;
u32 *qos_save_regs[MAX_QOS_REGS_NUM];
int num_clks;
+ bool is_ignore_pwr;
struct clk_bulk_data *clks;
};
@@ -330,6 +331,9 @@ static int rockchip_pd_power_on(struct generic_pm_domain *domain)
{
struct rockchip_pm_domain *pd = to_rockchip_pd(domain);
+ if (pd->is_ignore_pwr)
+ return 0;
+
return rockchip_pd_power(pd, true);
}
@@ -337,6 +341,9 @@ static int rockchip_pd_power_off(struct generic_pm_domain *domain)
{
struct rockchip_pm_domain *pd = to_rockchip_pd(domain);
+ if (pd->is_ignore_pwr)
+ return 0;
+
return rockchip_pd_power(pd, false);
}
@@ -416,6 +423,9 @@ static int rockchip_pm_add_one_domain(struct rockchip_pmu *pmu,
pd->info = pd_info;
pd->pmu = pmu;
+ if (!pd_info->pwr_mask)
+ pd->is_ignore_pwr = true;
+
pd->num_clks = of_clk_get_parent_count(node);
if (pd->num_clks > 0) {
pd->clks = devm_kcalloc(pmu->dev, pd->num_clks,
@@ -566,6 +576,7 @@ static int rockchip_pm_add_subdomain(struct rockchip_pmu *pmu,
{
struct device_node *np;
struct generic_pm_domain *child_domain, *parent_domain;
+ struct rockchip_pm_domain *child_pd, *parent_pd;
int error;
for_each_child_of_node(parent, np) {
@@ -606,6 +617,18 @@ static int rockchip_pm_add_subdomain(struct rockchip_pmu *pmu,
parent_domain->name, child_domain->name);
}
+ /*
+ * If child_pd doesn't do idle request or power on/off,
+ * parent_pd may fail to do power on/off, so if parent_pd
+ * need to power on/off, child_pd can't ignore to do idle
+ * request and power on/off.
+ */
+ child_pd = to_rockchip_pd(child_domain);
+ parent_pd = to_rockchip_pd(parent_domain);
+ if (!parent_pd->is_ignore_pwr)
+ child_pd->is_ignore_pwr = false;
+
+
rockchip_pm_add_subdomain(pmu, np);
}
--
2.17.1
From c94b1272290bafced10d79b7da1525466e8c843b Mon Sep 17 00:00:00 2001
From: "Huang, Tao" <huangtao@rock-chips.com>
Date: Thu, 28 Jul 2016 10:59:22 +0800
Subject: [PATCH] power: reset: reboot-mode: fix normal mode setup
If cmd is empty in get_reboot_mode_magic, we should return normal magic.
Change-Id: I10931adc49e33f72ae73d9471159f82cc02ff0c0
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
---
drivers/power/reset/reboot-mode.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/power/reset/reboot-mode.c b/drivers/power/reset/reboot-mode.c
index b4076b10b893..47f9a162807d 100644
--- a/drivers/power/reset/reboot-mode.c
+++ b/drivers/power/reset/reboot-mode.c
@@ -26,7 +26,7 @@ static unsigned int get_reboot_mode_magic(struct reboot_mode_driver *reboot,
int magic = 0;
struct mode_info *info;
- if (!cmd)
+ if (!cmd || !cmd[0])
cmd = normal;
list_for_each_entry(info, &reboot->head, list) {
--
2.17.1
From be9674f270c97399f9f6b1facb11e93eced6ec34 Mon Sep 17 00:00:00 2001
From: Andy Yan <andy.yan@rock-chips.com>
Date: Thu, 8 Dec 2016 16:58:07 +0800
Subject: [PATCH] power: reset: reboot-mode: treat unrecognized reboot mode as
normal mode
Some bootloader will check the reboot mode to take different action, so
we treat unrecognized reboot mode as normal mode to prevent the system
run into abnormal case.
Change-Id: I88063a5b41e4e645443229fa490b2b55db5ccf27
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
---
drivers/power/reset/reboot-mode.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/power/reset/reboot-mode.c b/drivers/power/reset/reboot-mode.c
index 47f9a162807d..99bf938404e3 100644
--- a/drivers/power/reset/reboot-mode.c
+++ b/drivers/power/reset/reboot-mode.c
@@ -47,6 +47,8 @@ static int reboot_mode_notify(struct notifier_block *this,
reboot = container_of(this, struct reboot_mode_driver, reboot_notifier);
magic = get_reboot_mode_magic(reboot, cmd);
+ if (!magic)
+ magic = get_reboot_mode_magic(reboot, NULL);
if (magic)
reboot->write(reboot, magic);
--
2.17.1
From 7c097120eb21a9bd15ab63c0ac60ffd5cba902b2 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Fri, 24 Apr 2020 13:01:07 +0200
Subject: [PATCH] sound: soc: rockchip: use rouned rate for i2s
---
sound/soc/rockchip/rockchip_i2s.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c
index 61c984f10d8e..efca853eba6b 100644
--- a/sound/soc/rockchip/rockchip_i2s.c
+++ b/sound/soc/rockchip/rockchip_i2s.c
@@ -279,10 +279,13 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream,
if (i2s->is_master_mode) {
mclk_rate = clk_get_rate(i2s->mclk);
bclk_rate = 2 * 32 * params_rate(params);
- if (bclk_rate && mclk_rate % bclk_rate)
+ if (!bclk_rate) {
+ dev_err(i2s->dev, "invalid bclk_rate: %d\n",
+ bclk_rate);
return -EINVAL;
+ }
- div_bclk = mclk_rate / bclk_rate;
+ div_bclk = DIV_ROUND_CLOSEST(mclk_rate, bclk_rate);
div_lrck = bclk_rate / params_rate(params);
regmap_update_bits(i2s->regmap, I2S_CKR,
I2S_CKR_MDIV_MASK,
@@ -312,6 +315,8 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream,
val |= I2S_TXCR_VDW(32);
break;
default:
+ dev_err(i2s->dev, "invalid format: %d\n",
+ params_format(params));
return -EINVAL;
}
--
2.17.1
From 4102c5b07d8610c729d577612c1df52737fb9a0f Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Fri, 24 Apr 2020 09:08:44 +0200
Subject: [PATCH] phy: rockchip: hdmi: readout hdmi phy flag for RK3228 HDMI
phys
Some RK3228 HDMI phys only get a stable pll on frequencies higher 337,5 MHz.
This is defined in a flag in efuse of those devices.
---
arch/arm/boot/dts/rk322x.dtsi | 7 ++++
drivers/phy/rockchip/phy-rockchip-inno-hdmi.c | 38 ++++++++++++++++++-
2 files changed, 43 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 2ed8aa7ae520..8c50dcb0e9f1 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -402,6 +402,11 @@
cpu_leakage: cpu_leakage@17 {
reg = <0x17 0x1>;
};
+
+ hdmi_phy_flag: hdmi-phy-flag@1d {
+ reg = <0x1d 0x1>;
+ bits = <1 1>;
+ };
};
i2c0: i2c@11050000 {
@@ -628,6 +633,8 @@
clock-names = "sysclk", "refoclk", "refpclk";
#clock-cells = <0>;
clock-output-names = "hdmiphy_phy";
+ nvmem-cells = <&hdmi_phy_flag>;
+ nvmem-cell-names = "hdmi-phy-flag";
#phy-cells = <0>;
status = "disabled";
};
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
index bb8bdf5e3301..0c7a97352714 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
@@ -237,6 +237,9 @@ struct inno_hdmi_phy {
struct clk *refoclk;
struct clk *refpclk;
+ /* phy_flag flag */
+ bool phy_flag;
+
/* platform data */
const struct inno_hdmi_phy_drv_data *plat_data;
int chip_version;
@@ -347,6 +350,7 @@ static const struct pre_pll_config pre_pll_cfg_table[] = {
static const struct post_pll_config post_pll_cfg_table[] = {
{33750000, 1, 40, 8, 1},
{33750000, 1, 80, 8, 2},
+ {33750000, 1, 10, 2, 4},
{74250000, 1, 40, 8, 1},
{74250000, 18, 80, 8, 2},
{148500000, 2, 40, 4, 3},
@@ -497,8 +501,11 @@ static int inno_hdmi_phy_power_on(struct phy *phy)
return -EINVAL;
for (; cfg->tmdsclock != 0; cfg++)
- if (tmdsclock <= cfg->tmdsclock &&
- cfg->version & inno->chip_version)
+ if (((!inno->phy_flag || tmdsclock > 33750000)
+ && tmdsclock <= cfg->tmdsclock
+ && cfg->version & inno->chip_version) ||
+ (inno->phy_flag && tmdsclock <= 33750000
+ && cfg->version & 4))
break;
for (; phy_cfg->tmdsclock != 0; phy_cfg++)
@@ -909,6 +916,10 @@ static int inno_hdmi_phy_clk_register(struct inno_hdmi_phy *inno)
static int inno_hdmi_phy_rk3228_init(struct inno_hdmi_phy *inno)
{
+ struct nvmem_cell *cell;
+ unsigned char *efuse_buf;
+ size_t len;
+
/*
* Use phy internal register control
* rxsense/poweron/pllpd/pdataen signal.
@@ -923,7 +934,28 @@ static int inno_hdmi_phy_rk3228_init(struct inno_hdmi_phy *inno)
inno_update_bits(inno, 0xaa, RK3228_POST_PLL_CTRL_MANUAL,
RK3228_POST_PLL_CTRL_MANUAL);
+
inno->chip_version = 1;
+ inno->phy_flag = false;
+
+ cell = nvmem_cell_get(inno->dev, "hdmi-phy-flag");
+ if (IS_ERR(cell)) {
+ if (PTR_ERR(cell) == -EPROBE_DEFER)
+ return -EPROBE_DEFER;
+
+ return 0;
+ }
+
+ efuse_buf = nvmem_cell_read(cell, &len);
+ nvmem_cell_put(cell);
+
+ if (IS_ERR(efuse_buf))
+ return 0;
+ if (len == 1)
+ inno->phy_flag = (efuse_buf[0] & BIT(1)) ? true : false;
+ kfree(efuse_buf);
+
+ dev_info(inno->dev, "phy_flag is: %d\n", inno->phy_flag);
return 0;
}
@@ -1023,6 +1055,8 @@ static int inno_hdmi_phy_rk3328_init(struct inno_hdmi_phy *inno)
/* try to read the chip-version */
inno->chip_version = 1;
+ inno->phy_flag = false;
+
cell = nvmem_cell_get(inno->dev, "cpu-version");
if (IS_ERR(cell)) {
if (PTR_ERR(cell) == -EPROBE_DEFER)
--
2.17.1
From fe30b024a7a7d6261dff0b87c2aec270ad530c39 Mon Sep 17 00:00:00 2001
From: Alex Bee <knaerzche@gmail.com>
Date: Fri, 24 Apr 2020 14:23:38 +0200
Subject: [PATCH] drm: rockchip: Use 2nd RK3228 plane as an overlay
As per datasheet the second plane of RK3228 vop is an overlay window. For
the missing implementation of hardware cursor it is missued as such (as
already pointed in comment for RK3288). Furthermore the overlay window
does not support YUV modes with the current implementation - so it
supports only RGB modes for now.
---
drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 44 +++++++++++++++++++--
1 file changed, 41 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index 73d24c6bbf05..d4ac6e161ef2 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -614,6 +614,44 @@ static const struct vop_common rk3288_common = {
.dsp_background = VOP_REG(RK3288_DSP_BG, 0xffffffff, 0),
};
+static const struct vop_win_phy rk3228_win0_data = {
+ .scl = &rk3288_win_full_scl,
+ .data_formats = formats_win_full,
+ .nformats = ARRAY_SIZE(formats_win_full),
+ .enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
+ .format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
+ .rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
+ .act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
+ .dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
+ .dsp_st = VOP_REG(RK3288_WIN0_DSP_ST, 0x1fff1fff, 0),
+ .yrgb_mst = VOP_REG(RK3288_WIN0_YRGB_MST, 0xffffffff, 0),
+ .uv_mst = VOP_REG(RK3288_WIN0_CBR_MST, 0xffffffff, 0),
+ .yrgb_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 0),
+ .uv_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 16),
+ .src_alpha_ctl = VOP_REG(RK3288_WIN0_SRC_ALPHA_CTRL, 0xff, 0),
+ .dst_alpha_ctl = VOP_REG(RK3288_WIN0_DST_ALPHA_CTRL, 0xff, 0),
+ .channel = VOP_REG(RK3288_WIN0_CTRL2, 0xff, 0),
+};
+
+static const struct vop_win_phy rk3228_win1_data = {
+ .scl = &rk3288_win_full_scl,
+ .data_formats = formats_win_lite,
+ .nformats = ARRAY_SIZE(formats_win_lite),
+ .enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
+ .format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
+ .rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
+ .act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
+ .dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
+ .dsp_st = VOP_REG(RK3288_WIN0_DSP_ST, 0x1fff1fff, 0),
+ .yrgb_mst = VOP_REG(RK3288_WIN0_YRGB_MST, 0xffffffff, 0),
+ .uv_mst = VOP_REG(RK3288_WIN0_CBR_MST, 0xffffffff, 0),
+ .yrgb_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 0),
+ .uv_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 16),
+ .src_alpha_ctl = VOP_REG(RK3288_WIN0_SRC_ALPHA_CTRL, 0xff, 0),
+ .dst_alpha_ctl = VOP_REG(RK3288_WIN0_DST_ALPHA_CTRL, 0xff, 0),
+ .channel = VOP_REG(RK3288_WIN0_CTRL2, 0xff, 0),
+};
+
/*
* Note: rk3288 has a dedicated 'cursor' window, however, that window requires
* special support to get alpha blending working. For now, just use overlay
@@ -864,10 +902,10 @@ static const struct vop_data rk3399_vop_lit = {
};
static const struct vop_win_data rk3228_vop_win_data[] = {
- { .base = 0x00, .phy = &rk3288_win01_data,
+ { .base = 0x00, .phy = &rk3228_win0_data,
.type = DRM_PLANE_TYPE_PRIMARY },
- { .base = 0x40, .phy = &rk3288_win01_data,
- .type = DRM_PLANE_TYPE_CURSOR },
+ { .base = 0x40, .phy = &rk3228_win1_data,
+ .type = DRM_PLANE_TYPE_OVERLAY },
};
static const struct vop_data rk3228_vop = {
--
2.17.1

12
patch/kernel/rk322x-dev/02-linux-0001-add-board-makefile.patch Normal file
View File

@ -0,0 +1,12 @@
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 08011dc8c..4bee5c4cd 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -923,6 +923,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3228-evb.dtb \
rk3229-evb.dtb \
rk3229-xms6.dtb \
+ rk322x-box.dtb \
rk3288-evb-act8846.dtb \
rk3288-evb-rk808.dtb \
rk3288-firefly-beta.dtb \

15
patch/kernel/rk322x-dev/02-linux-0003-dtsi-integrate-rk322x-box.patch Normal file
View File

@ -0,0 +1,15 @@
diff --git a/arch/arm/boot/dts/rk322x-box.dtsi b/arch/arm/boot/dts/rk322x-box.dtsi
index 44fb2f4ea..15d07a736 100644
--- a/arch/arm/boot/dts/rk322x-box.dtsi
+++ b/arch/arm/boot/dts/rk322x-box.dtsi
@@ -89,6 +89,10 @@
cap-mmc-highspeed;
keep-power-in-suspend;
non-removable;
+ /delete-property/ pinctrl-names;
+ /delete-property/ pinctrl-0;
+ /delete-property/ default-sample-phase;
+ rockchip,default-sample-phase = <180>;
};
&gmac {

92
patch/kernel/rk322x-dev/02-linux-0004-dtsi-adjust-nand-pinctrls.patch Normal file
View File

@ -0,0 +1,92 @@
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index b2fcf0e75..25051c03f 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -1149,51 +1149,71 @@
flash_cs0: flash-cs0 {
rockchip,pins =
- <2 RK_PA6 1 &pcfg_pull_none>;
+ <2 RK_PA6 1 &pcfg_pull_up>;
};
flash_cs1: flash-cs1 {
rockchip,pins =
- <0 RK_PC7 1 &pcfg_pull_none>;
+ <0 RK_PC7 1 &pcfg_pull_up>;
+ };
+
+ flash_cs2: flash-cs2 {
+ rockchip,pins =
+ <1 RK_PC6 1 &pcfg_pull_up>;
+ };
+
+ flash_cs3: flash-cs3 {
+ rockchip,pins =
+ <1 RK_PC7 1 &pcfg_pull_up>;
};
flash_rdy: flash-rdy {
rockchip,pins =
- <2 RK_PA4 1 &pcfg_pull_none>;
+ <2 RK_PA4 1 &pcfg_pull_up>;
};
flash_ale: flash-ale {
rockchip,pins =
- <2 RK_PA0 1 &pcfg_pull_none>;
+ <2 RK_PA0 1 &pcfg_pull_down>;
};
flash_cle: flash-cle {
rockchip,pins =
- <2 RK_PA1 1 &pcfg_pull_none>;
+ <2 RK_PA1 1 &pcfg_pull_down>;
};
flash_wrn: flash-wrn {
- rockchip,pins =
- <2 RK_PA2 1 &pcfg_pull_none>;
+ rockchip,pins =
+ <2 RK_PA2 1 &pcfg_pull_up>;
};
flash_rdn: flash-rdn {
rockchip,pins =
- <2 RK_PA3 1 &pcfg_pull_none>;
+ <2 RK_PA3 1 &pcfg_pull_up>;
};
flash_bus8: flash-bus8 {
- rockchip,pins = <1 RK_PD0 1 &pcfg_pull_none>,
- <1 RK_PD1 1 &pcfg_pull_none>,
- <1 RK_PD2 1 &pcfg_pull_none>,
- <1 RK_PD3 1 &pcfg_pull_none>,
- <1 RK_PD4 1 &pcfg_pull_none>,
- <1 RK_PD5 1 &pcfg_pull_none>,
- <1 RK_PD6 1 &pcfg_pull_none>,
- <1 RK_PD7 1 &pcfg_pull_none>;
+ rockchip,pins = <1 RK_PD0 1 &pcfg_pull_up>,
+ <1 RK_PD1 1 &pcfg_pull_up>,
+ <1 RK_PD2 1 &pcfg_pull_up>,
+ <1 RK_PD3 1 &pcfg_pull_up>,
+ <1 RK_PD4 1 &pcfg_pull_up>,
+ <1 RK_PD5 1 &pcfg_pull_up>,
+ <1 RK_PD6 1 &pcfg_pull_up>,
+ <1 RK_PD7 1 &pcfg_pull_up>;
};
+
+ flash_dqs: flash-dqs {
+ rockchip,pins = <2 RK_PA7 1 &pcfg_pull_up>;
+ };
+
+ flash_wp: flash-wp {
+ rockchip,pins = <2 RK_PA5 1 &pcfg_pull_down>;
+ };
+
};
+
gmac {
rgmii_pins: rgmii-pins {
rockchip,pins = <2 RK_PB6 1 &pcfg_pull_none>,

245
patch/kernel/rk322x-dev/board-rk322x-box.patch Normal file
View File

@ -0,0 +1,245 @@
diff --git a/arch/arm/boot/dts/rk322x-box.dts b/arch/arm/boot/dts/rk322x-box.dts
new file mode 100644
index 000000000..24590f864
--- /dev/null
+++ b/arch/arm/boot/dts/rk322x-box.dts
@@ -0,0 +1,239 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "rk3228a-box.dtsi"
+
+/ {
+
+ model = "Generic RK322x Tv Box board";
+
+ /delete-node/ leds;
+
+ gpio_leds: gpio-leds {
+
+ compatible = "gpio-leds";
+
+ /*
+ * Working led, available on all boards
+ */
+ working {
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
+ label = "working";
+ default-state = "on";
+ linux,default-trigger = "timer";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio_led_working>;
+ };
+
+ };
+
+ gpio_keys: gpio-keys {
+
+ compatible = "gpio-keys";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ };
+
+};
+
+&emmc {
+ status = "okay";
+ /delete-property/ mmc-ddr-1_8v;
+ /delete-property/ pinctrl-names;
+ /delete-property/ pinctrl-0;
+ rockchip,default-sample-phase = <180>;
+};
+
+&nfc {
+ status = "okay";
+};
+
+&gmac {
+ tx_delay = <0x26>;
+ rx_delay = <0x11>;
+};
+
+&ir_receiver {
+ status = "okay";
+};
+
+&power_key {
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "host";
+};
+
+&sdio {
+ mmc-pwrseq = <&sdio_pwrseq>;
+ status = "okay";
+};
+
+&sdmmc {
+ cd-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>;
+ cd-debounce-delay-ms = <500>;
+ status = "okay";
+};
+
+/** Integration to pin controller */
+&pinctrl {
+
+ pcfg_pull_up_12ma: pcfg-pull-up-12ma {
+ drive-strength = <12>;
+ bias-pull-up;
+ };
+
+ pcfg_pull_down_12ma: pcfg-pull-down-12ma {
+ drive-strength = <12>;
+ bias-pull-down;
+ };
+
+ pcfg_pull_none_12ma: pcfg-pull-none-12ma {
+ drive-strength = <12>;
+ bias-disable;
+ };
+
+ pcfg_pull_up_8ma: pcfg-pull-up-8ma {
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
+ pcfg_pull_down_8ma: pcfg-pull-down-8ma {
+ drive-strength = <8>;
+ bias-pull-down;
+ };
+
+ pcfg_pull_none_8ma: pcfg-pull-none-8ma {
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ pcfg_pull_up_2ma: pcfg-pull-up-2ma {
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ pcfg_pull_down_2ma: pcfg-pull-down-2ma {
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ pcfg_pull_none_2ma: pcfg-pull-none-2ma {
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ /*
+ * Some rk322x electrical schemes report this kind of pull-up/down
+ * pin configurations. We set them here, but we don't use it in this
+ * device tree. These instead are useful for overlays, because they seem
+ * to increase stability on at least one board I got here
+ */
+ sdmmc {
+ sdmmc_clk: sdmmc-clk {
+ rockchip,pins = <1 16 1 &pcfg_pull_down>;
+ };
+
+ sdmmc_cmd: sdmmc-cmd {
+ rockchip,pins = <1 15 1 &pcfg_pull_up>;
+ };
+
+ sdmmc_bus4: sdmmc-bus4 {
+ rockchip,pins = <1 18 1 &pcfg_pull_up>,
+ <1 19 1 &pcfg_pull_up>,
+ <1 20 1 &pcfg_pull_up>,
+ <1 21 1 &pcfg_pull_up>;
+ };
+ };
+
+ /*
+ * Same as above, decreasing strength of SDIO pins seems to be benefical
+ * to stability
+ */
+ sdio {
+ sdio_clk: sdio-clk {
+ rockchip,pins = <3 0 1 &pcfg_pull_down_2ma>;
+ };
+
+ sdio_cmd: sdio-cmd {
+ rockchip,pins = <3 1 1 &pcfg_pull_up_2ma>;
+ };
+
+ sdio_bus4: sdio-bus4 {
+ rockchip,pins = <3 2 1 &pcfg_pull_up_2ma>,
+ <3 3 1 &pcfg_pull_up_2ma>,
+ <3 4 1 &pcfg_pull_up_2ma>,
+ <3 5 1 &pcfg_pull_up_2ma>;
+ };
+ };
+
+ /*
+ * Same drill as above, electrical schemes also report this pull-up/down
+ * configurations.
+ */
+ emmc {
+ emmc_clk: emmc-clk {
+ rockchip,pins = <2 7 2 &pcfg_pull_up>;
+ };
+
+ emmc_cmd: emmc-cmd {
+ rockchip,pins = <1 22 2 &pcfg_pull_up>;
+ };
+
+ emmc_bus8: emmc-bus8 {
+ rockchip,pins = <1 24 2 &pcfg_pull_up>,
+ <1 25 2 &pcfg_pull_up>,
+ <1 26 2 &pcfg_pull_up>,
+ <1 27 2 &pcfg_pull_up>,
+ <1 28 2 &pcfg_pull_up>,
+ <1 29 2 &pcfg_pull_up>,
+ <1 30 2 &pcfg_pull_up>,
+ <1 31 2 &pcfg_pull_up>;
+ };
+
+ emmc_pwr: emmc-pwr {
+ rockchip,pins = <2 RK_PA5 2 &pcfg_pull_down>;
+ };
+
+ emmc_rst: emmc-rst {
+ rockchip,pins = <1 RK_PC7 2 &pcfg_pull_up>;
+ };
+
+ };
+
+
+ gpio {
+ gpio_led_working: gpio-led-working {
+ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ ir {
+ ir_int: ir-int {
+ rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ keys {
+ pwr_key: pwr-key {
+ rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ gpio {
+ gpio_led_working: gpio-led-working {
+ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+};

94
patch/kernel/rk322x-dev/general-add-overlay-compilation-support.patch Normal file
View File

@ -0,0 +1,94 @@
diff --git a/arch/arm/boot/.gitignore b/arch/arm/boot/.gitignore
index 3c79f859..4e5c1d59 100644
--- a/arch/arm/boot/.gitignore
+++ b/arch/arm/boot/.gitignore
@@ -3,3 +3,5 @@ zImage
xipImage
bootpImage
uImage
+*.dtb*
+*.scr
diff --git a/scripts/Makefile.dtbinst b/scripts/Makefile.dtbinst
index 50d580d77..94bd15617 100644
--- a/scripts/Makefile.dtbinst
+++ b/scripts/Makefile.dtbinst
@@ -18,9 +18,12 @@ include scripts/Kbuild.include
include $(src)/Makefile
dtbs := $(addprefix $(dst)/, $(dtb-y) $(if $(CONFIG_OF_ALL_DTBS),$(dtb-)))
+dtbos := $(addprefix $(dst)/, $(dtbo-y))
+scrs := $(addprefix $(dst)/, $(scr-y))
+readmes := $(addprefix $(dst)/, $(dtbotxt-y))
subdirs := $(addprefix $(obj)/, $(subdir-y) $(subdir-m))
-__dtbs_install: $(dtbs) $(subdirs)
+__dtbs_install: $(dtbs) $(dtbos) $(scrs) $(readmes) $(subdirs)
@:
quiet_cmd_dtb_install = INSTALL $@
@@ -29,6 +32,15 @@ quiet_cmd_dtb_install = INSTALL $@
$(dst)/%.dtb: $(obj)/%.dtb
$(call cmd,dtb_install)
+$(dst)/%.dtbo: $(obj)/%.dtbo
+ $(call cmd,dtb_install)
+
+$(dst)/%.scr: $(obj)/%.scr
+ $(call cmd,dtb_install)
+
+$(dst)/README.rk322x-overlays: $(src)/README.rk322x-overlays
+ $(call cmd,dtb_install)
+
PHONY += $(subdirs)
$(subdirs):
$(Q)$(MAKE) $(dtbinst)=$@ dst=$(patsubst $(obj)/%,$(dst)/%,$@)
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 58c05e5d..2b95dda9 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -278,6 +278,9 @@ cmd_gzip = (cat $(filter-out FORCE,$^) | gzip -n -f -9 > $@) || \
# ---------------------------------------------------------------------------
DTC ?= $(objtree)/scripts/dtc/dtc
+# Overlay support
+DTC_FLAGS += -@ -Wno-unit_address_format -Wno-simple_bus_reg
+
# Disable noisy checks by default
ifeq ($(KBUILD_ENABLE_EXTRA_GCC_CHECKS),)
DTC_FLAGS += -Wno-unit_address_vs_reg \
@@ -324,6 +327,23 @@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \
$(obj)/%.dtb: $(src)/%.dts FORCE
$(call if_changed_dep,dtc)
+quiet_cmd_dtco = DTCO $@
+cmd_dtco = mkdir -p $(dir ${dtc-tmp}) ; \
+ $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \
+ $(DTC) -O dtb -o $@ -b 0 \
+ -i $(dir $<) $(DTC_FLAGS) \
+ -d $(depfile).dtc.tmp $(dtc-tmp) ; \
+ cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile)
+
+$(obj)/%.dtbo: $(src)/%.dts FORCE
+ $(call if_changed_dep,dtco)
+
+quiet_cmd_scr = MKIMAGE $@
+cmd_scr = mkimage -C none -A $(ARCH) -T script -d $< $@
+
+$(obj)/%.scr: $(src)/%.scr-cmd FORCE
+ $(call if_changed,scr)
+
dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp)
# Bzip2
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index e8dd99201..1e45adf97 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -977,6 +984,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-veyron-speedy.dtb \
rk3288-veyron-tiger.dtb \
rk3288-vyasa.dtb
+subdir-y := overlay
dtb-$(CONFIG_ARCH_S3C24XX) += \
s3c2416-smdk2416.dtb
dtb-$(CONFIG_ARCH_S3C64XX) += \

358
patch/kernel/rk322x-dev/general-add-overlay-configfs.patch Normal file
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@ -0,0 +1,358 @@
--- /dev/null
+++ b/Documentation/devicetree/configfs-overlays.txt
@@ -0,0 +1,31 @@
+Howto use the configfs overlay interface.
+
+A device-tree configfs entry is created in /config/device-tree/overlays
+and and it is manipulated using standard file system I/O.
+Note that this is a debug level interface, for use by developers and
+not necessarily something accessed by normal users due to the
+security implications of having direct access to the kernel's device tree.
+
+* To create an overlay you mkdir the directory:
+
+ # mkdir /config/device-tree/overlays/foo
+
+* Either you echo the overlay firmware file to the path property file.
+
+ # echo foo.dtbo >/config/device-tree/overlays/foo/path
+
+* Or you cat the contents of the overlay to the dtbo file
+
+ # cat foo.dtbo >/config/device-tree/overlays/foo/dtbo
+
+The overlay file will be applied, and devices will be created/destroyed
+as required.
+
+To remove it simply rmdir the directory.
+
+ # rmdir /config/device-tree/overlays/foo
+
+The rationalle of the dual interface (firmware & direct copy) is that each is
+better suited to different use patterns. The firmware interface is what's
+intended to be used by hardware managers in the kernel, while the copy interface
+make sense for developers (since it avoids problems with namespaces).
diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig
index 37c2ccbefecdc..d3fc81a40c0e7 100644
--- a/drivers/of/Kconfig
+++ b/drivers/of/Kconfig
@@ -103,4 +103,11 @@ config OF_OVERLAY
config OF_NUMA
bool
+config OF_CONFIGFS
+ bool "Device Tree Overlay ConfigFS interface"
+ select CONFIGFS_FS
+ select OF_OVERLAY
+ help
+ Enable a simple user-space driven DT overlay interface.
+
endif # OF
diff --git a/drivers/of/Makefile b/drivers/of/Makefile
index 663a4af0cccd5..b00a95adf5199 100644
--- a/drivers/of/Makefile
+++ b/drivers/of/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
obj-y = base.o device.o platform.o property.o
obj-$(CONFIG_OF_KOBJ) += kobj.o
+obj-$(CONFIG_OF_CONFIGFS) += configfs.o
obj-$(CONFIG_OF_DYNAMIC) += dynamic.o
obj-$(CONFIG_OF_FLATTREE) += fdt.o
obj-$(CONFIG_OF_EARLY_FLATTREE) += fdt_address.o
diff --git a/drivers/of/configfs.c b/drivers/of/configfs.c
new file mode 100644
index 000000000..5dd509e8f
--- /dev/null
+++ b/drivers/of/configfs.c
@@ -0,0 +1,290 @@
+/*
+ * Configfs entries for device-tree
+ *
+ * Copyright (C) 2013 - Pantelis Antoniou <panto@antoniou-consulting.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/ctype.h>
+#include <linux/cpu.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_fdt.h>
+#include <linux/spinlock.h>
+#include <linux/slab.h>
+#include <linux/proc_fs.h>
+#include <linux/configfs.h>
+#include <linux/types.h>
+#include <linux/stat.h>
+#include <linux/limits.h>
+#include <linux/file.h>
+#include <linux/vmalloc.h>
+#include <linux/firmware.h>
+#include <linux/sizes.h>
+
+#include "of_private.h"
+
+struct cfs_overlay_item {
+ struct config_item item;
+
+ char path[PATH_MAX];
+
+ const struct firmware *fw;
+ struct device_node *overlay;
+ int ov_id;
+
+ void *dtbo;
+ int dtbo_size;
+};
+
+static int create_overlay(struct cfs_overlay_item *overlay, void *blob, u32 blob_size)
+{
+ int err;
+
+ err = of_overlay_fdt_apply(blob, blob_size, &overlay->ov_id);
+ if (err < 0) {
+ pr_err("%s: Failed to create overlay (err=%d)\n",
+ __func__, err);
+ goto out_err;
+ }
+
+out_err:
+ return err;
+}
+
+static inline struct cfs_overlay_item *to_cfs_overlay_item(
+ struct config_item *item)
+{
+ return item ? container_of(item, struct cfs_overlay_item, item) : NULL;
+}
+
+static ssize_t cfs_overlay_item_path_show(struct config_item *item,
+ char *page)
+{
+ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item);
+ return sprintf(page, "%s\n", overlay->path);
+}
+
+static ssize_t cfs_overlay_item_path_store(struct config_item *item,
+ const char *page, size_t count)
+{
+ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item);
+ const char *p = page;
+ char *s;
+ int err;
+
+ /* if it's set do not allow changes */
+ if (overlay->path[0] != '\0' || overlay->dtbo_size > 0)
+ return -EPERM;
+
+ /* copy to path buffer (and make sure it's always zero terminated */
+ count = snprintf(overlay->path, sizeof(overlay->path) - 1, "%s", p);
+ overlay->path[sizeof(overlay->path) - 1] = '\0';
+
+ /* strip trailing newlines */
+ s = overlay->path + strlen(overlay->path);
+ while (s > overlay->path && *--s == '\n')
+ *s = '\0';
+
+ pr_debug("%s: path is '%s'\n", __func__, overlay->path);
+
+ err = request_firmware(&overlay->fw, overlay->path, NULL);
+ if (err != 0)
+ goto out_err;
+
+ err = create_overlay(overlay, (void *)overlay->fw->data, overlay->fw->size);
+ if (err != 0)
+ goto out_err;
+
+ return count;
+
+out_err:
+
+ release_firmware(overlay->fw);
+ overlay->fw = NULL;
+
+ overlay->path[0] = '\0';
+ return err;
+}
+
+static ssize_t cfs_overlay_item_status_show(struct config_item *item,
+ char *page)
+{
+ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item);
+
+ return sprintf(page, "%s\n",
+ overlay->ov_id >= 0 ? "applied" : "unapplied");
+}
+
+CONFIGFS_ATTR(cfs_overlay_item_, path);
+CONFIGFS_ATTR_RO(cfs_overlay_item_, status);
+
+static struct configfs_attribute *cfs_overlay_attrs[] = {
+ &cfs_overlay_item_attr_path,
+ &cfs_overlay_item_attr_status,
+ NULL,
+};
+
+ssize_t cfs_overlay_item_dtbo_read(struct config_item *item,
+ void *buf, size_t max_count)
+{
+ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item);
+
+ pr_debug("%s: buf=%p max_count=%zu\n", __func__,
+ buf, max_count);
+
+ if (overlay->dtbo == NULL)
+ return 0;
+
+ /* copy if buffer provided */
+ if (buf != NULL) {
+ /* the buffer must be large enough */
+ if (overlay->dtbo_size > max_count)
+ return -ENOSPC;
+
+ memcpy(buf, overlay->dtbo, overlay->dtbo_size);
+ }
+
+ return overlay->dtbo_size;
+}
+
+ssize_t cfs_overlay_item_dtbo_write(struct config_item *item,
+ const void *buf, size_t count)
+{
+ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item);
+ int err;
+
+ /* if it's set do not allow changes */
+ if (overlay->path[0] != '\0' || overlay->dtbo_size > 0)
+ return -EPERM;
+
+ /* copy the contents */
+ overlay->dtbo = kmemdup(buf, count, GFP_KERNEL);
+ if (overlay->dtbo == NULL)
+ return -ENOMEM;
+
+ overlay->dtbo_size = count;
+
+ err = create_overlay(overlay, overlay->dtbo, overlay->dtbo_size);
+ if (err != 0)
+ goto out_err;
+
+ return count;
+
+out_err:
+ kfree(overlay->dtbo);
+ overlay->dtbo = NULL;
+ overlay->dtbo_size = 0;
+
+ return err;
+}
+
+CONFIGFS_BIN_ATTR(cfs_overlay_item_, dtbo, NULL, SZ_1M);
+
+static struct configfs_bin_attribute *cfs_overlay_bin_attrs[] = {
+ &cfs_overlay_item_attr_dtbo,
+ NULL,
+};
+
+static void cfs_overlay_release(struct config_item *item)
+{
+ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item);
+
+ if (overlay->ov_id >= 0)
+ of_overlay_remove(&overlay->ov_id);
+ if (overlay->fw)
+ release_firmware(overlay->fw);
+ /* kfree with NULL is safe */
+ kfree(overlay->dtbo);
+ kfree(overlay);
+}
+
+static struct configfs_item_operations cfs_overlay_item_ops = {
+ .release = cfs_overlay_release,
+};
+
+static struct config_item_type cfs_overlay_type = {
+ .ct_item_ops = &cfs_overlay_item_ops,
+ .ct_attrs = cfs_overlay_attrs,
+ .ct_bin_attrs = cfs_overlay_bin_attrs,
+ .ct_owner = THIS_MODULE,
+};
+
+static struct config_item *cfs_overlay_group_make_item(
+ struct config_group *group, const char *name)
+{
+ struct cfs_overlay_item *overlay;
+
+ overlay = kzalloc(sizeof(*overlay), GFP_KERNEL);
+ if (!overlay)
+ return ERR_PTR(-ENOMEM);
+ overlay->ov_id = -1;
+
+ config_item_init_type_name(&overlay->item, name, &cfs_overlay_type);
+ return &overlay->item;
+}
+
+static void cfs_overlay_group_drop_item(struct config_group *group,
+ struct config_item *item)
+{
+ struct cfs_overlay_item *overlay = to_cfs_overlay_item(item);
+
+ config_item_put(&overlay->item);
+}
+
+static struct configfs_group_operations overlays_ops = {
+ .make_item = cfs_overlay_group_make_item,
+ .drop_item = cfs_overlay_group_drop_item,
+};
+
+static struct config_item_type overlays_type = {
+ .ct_group_ops = &overlays_ops,
+ .ct_owner = THIS_MODULE,
+};
+
+static struct configfs_group_operations of_cfs_ops = {
+ /* empty - we don't allow anything to be created */
+};
+
+static struct config_item_type of_cfs_type = {
+ .ct_group_ops = &of_cfs_ops,
+ .ct_owner = THIS_MODULE,
+};
+
+struct config_group of_cfs_overlay_group;
+
+static struct configfs_subsystem of_cfs_subsys = {
+ .su_group = {
+ .cg_item = {
+ .ci_namebuf = "device-tree",
+ .ci_type = &of_cfs_type,
+ },
+ },
+ .su_mutex = __MUTEX_INITIALIZER(of_cfs_subsys.su_mutex),
+};
+
+static int __init of_cfs_init(void)
+{
+ int ret;
+
+ pr_info("%s\n", __func__);
+
+ config_group_init(&of_cfs_subsys.su_group);
+ config_group_init_type_name(&of_cfs_overlay_group, "overlays",
+ &overlays_type);
+ configfs_add_default_group(&of_cfs_overlay_group,
+ &of_cfs_subsys.su_group);
+
+ ret = configfs_register_subsystem(&of_cfs_subsys);
+ if (ret != 0) {
+ pr_err("%s: failed to register subsys\n", __func__);
+ goto out;
+ }
+ pr_info("%s: OK\n", __func__);
+out:
+ return ret;
+}
+late_initcall(of_cfs_init);

339
patch/kernel/rk322x-dev/general-add-overlays.patch Normal file
View File

@ -0,0 +1,339 @@
diff --git a/arch/arm/boot/dts/overlay/Makefile b/arch/arm/boot/dts/overlay/Makefile
new file mode 100644
index 000000000..f024e8db0
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/Makefile
@@ -0,0 +1,20 @@
+# SPDX-License-Identifier: GPL-2.0
+dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
+ rk322x-emmc.dtbo \
+ rk322x-nand.dtbo \
+ rk322x-emmc-nand.dtbo \
+ rk322x-led-conf1.dtbo \
+ rk322x-led-conf2.dtbo \
+ rk322x-cpu-hs.dtbo
+
+scr-$(CONFIG_ARCH_ROCKCHIP) += \
+ rk322x-fixup.scr
+
+dtbotxt-$(CONFIG_ARCH_ROCKCHIP) += \
+ README.rk322x-overlays
+
+targets += $(dtbo-y) $(scr-y) $(dtbotxt-y)
+
+always := $(dtbo-y) $(scr-y) $(dtbotxt-y)
+clean-files := *.dtbo *.scr
+
diff --git a/arch/arm/boot/dts/overlay/README.rk322x-overlays b/arch/arm/boot/dts/overlay/README.rk322x-overlays
new file mode 100644
index 000000000..d5bc7f3d5
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/README.rk322x-overlays
@@ -0,0 +1,51 @@
+This document describes overlays provided in the kernel packages
+For generic Armbian overlays documentation please see
+https://docs.armbian.com/User-Guide_Allwinner_overlays/
+
+### Platform:
+
+rk322x (Rockchip)
+
+### Provided overlays:
+
+- rk322x-cpu-hs
+- rk322x-emmc
+- rk322x-nand
+- rk322x-emmc-nand
+- rk322x-led1-low
+- rk322x-led1-high
+- rk322x-led2-low
+- rk322x-led2-high
+
+### Overlay details:
+
+### rk322x-cpu-hs
+
+Activates higher CPU speed (up to 1.4ghz) for rk3228b/rk3229 boxes
+
+### emmc
+
+Activates onboard emmc device node and deactivates the nand controller.
+Also sets up the pin controller default pull up/down configuration
+
+### nand
+
+Activates onboard nand device node and deactivates the emmc controller.
+Also sets up the pin controller default pull up/down configuration
+
+### emmc-nand
+
+Activates onboard nand and emmc devices. Usually they are alternative
+because manufacturers share the same pads so emmc and nand cannot be
+mixed together. Usually this works because the emmc and nand drivers
+can automatically guess what's in the pads, but may bring instabilities
+or misdetections. Also does not set up the pin controller default
+configuration, which in turn can be detrimental of stability and
+performance
+
+### rk322x-led-conf*
+
+Each device tree of this kind provides a different known wiring configuration
+(ie: gpio and active low/high) of the onboard leds. Each board manufacturer
+usually choose a different GPIO for the auxiliary led, but the main "working"
+led is always wired to the same gpio (although it may be active high or low)
diff --git a/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts b/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts
new file mode 100644
index 000000000..1c2fc79e1
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts
@@ -0,0 +1,28 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+
+ fragment@0 {
+ target = <&cpu0_opp_table>;
+ __overlay__ {
+
+ opp-1296000000 {
+ opp-hz = /bits/ 64 <1296000000>;
+ opp-microvolt = <1325000 1325000 1400000>;
+ };
+ opp-1392000000 {
+ opp-hz = /bits/ 64 <1392000000>;
+ opp-microvolt = <1350000 1350000 1400000>;
+ };
+ /*
+ opp-1464000000 {
+ opp-hz = /bits/ 64 <1464000000>;
+ opp-microvolt = <1400000 1400000 1400000>;
+ };
+ */
+
+ };
+ };
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc-nand.dts b/arch/arm/boot/dts/overlay/rk322x-emmc-nand.dts
new file mode 100644
index 000000000..9b273bf75
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-emmc-nand.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+
+ fragment@0 {
+ target = <&emmc>;
+ __overlay__ {
+ status = "okay";
+ mmc-ddr-1_8v;
+ rockchip,default-sample-phase = <180>;
+ };
+ };
+
+ fragment@1 {
+ target = <&nfc>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc.dts b/arch/arm/boot/dts/overlay/rk322x-emmc.dts
new file mode 100644
index 000000000..10b2f0f0d
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-emmc.dts
@@ -0,0 +1,24 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+
+ fragment@0 {
+ target = <&emmc>;
+ __overlay__ {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8 &emmc_pwr &emmc_rst>;
+ mmc-ddr-1_8v;
+ rockchip,default-sample-phase = <180>;
+ };
+ };
+
+ fragment@1 {
+ target = <&nfc>;
+ __overlay__ {
+ status = "disabled";
+ };
+ };
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd b/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd
new file mode 100644
index 000000000..d4c39e20a
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd
@@ -0,0 +1,4 @@
+# overlays fixup script
+# implements (or rather substitutes) overlay arguments functionality
+# using u-boot scripting, environment variables and "fdt" command
+
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
new file mode 100644
index 000000000..508e477f7
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
@@ -0,0 +1,57 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+
+ fragment@0 {
+ target-path = "/gpio-leds";
+ __overlay__ {
+
+ working {
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "none";
+ };
+
+ auxiliary {
+ gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
+ label = "auxiliary";
+ linux,default-trigger = "mmc2";
+ default-state = "off";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio_led_aux>;
+ };
+
+ };
+ };
+
+ fragment@1 {
+ target-path = "/pinctrl/gpio";
+ __overlay__ {
+
+ gpio_led_aux: gpio-led-aux {
+ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ };
+ };
+
+ fragment@2 {
+ target = <&gpio_keys>;
+ __overlay__ {
+
+ reset {
+ gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <200>;
+ wakeup-source;
+ };
+
+ };
+ };
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
new file mode 100644
index 000000000..153f71565
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
@@ -0,0 +1,57 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+
+ fragment@0 {
+ target-path = "/gpio-leds";
+ __overlay__ {
+
+ working {
+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "none";
+ };
+
+ auxiliary {
+ gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>;
+ label = "auxiliary";
+ linux,default-trigger = "mmc2";
+ default-state = "off";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio_led_aux>;
+ };
+
+ };
+ };
+
+ fragment@1 {
+ target-path = "/pinctrl/gpio";
+ __overlay__ {
+
+ gpio_led_aux: gpio-led-aux {
+ rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ };
+ };
+
+ fragment@2 {
+ target = <&gpio_keys>;
+ __overlay__ {
+
+ reset {
+ gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <200>;
+ wakeup-source;
+ };
+
+ };
+ };
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-nand.dts b/arch/arm/boot/dts/overlay/rk322x-nand.dts
new file mode 100644
index 000000000..2a939ab49
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-nand.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+
+ fragment@0 {
+ target = <&nfc>;
+ __overlay__ {
+ status = "okay";
+ pinctrl-0 = <&flash_cs0 &flash_cs1 &flash_cs2 &flash_cs3 &flash_rdy &flash_ale &flash_cle &flash_wrn &flash_bus8 &flash_dqs &flash_wp>;
+ pinctrl-names = "default";
+ };
+ };
+
+ fragment@1 {
+ target = <&emmc>;
+ __overlay__ {
+ status = "disabled";
+ };
+ };
+
+};

11062
patch/kernel/rk322x-legacy/03-001-wifi-esp8089-driver.patch Normal file
View File

File diff suppressed because it is too large Load Diff

244091
patch/kernel/rk322x-legacy/03-002-wifi-ssv6x5x-driver.patch Normal file
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File diff suppressed because it is too large Load Diff

30
patch/kernel/rk322x-legacy/board-rk322x-box.patch
View File

@ -1,9 +1,9 @@
diff --git a/arch/arm/boot/dts/rk322x-box.dts b/arch/arm/boot/dts/rk322x-box.dts
new file mode 100644
index 000000000..e5f09873c
index 000000000..54bbe900b
--- /dev/null
+++ b/arch/arm/boot/dts/rk322x-box.dts
@@ -0,0 +1,215 @@
@@ -0,0 +1,241 @@
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ *
@ -69,6 +69,16 @@ index 000000000..e5f09873c
+
+ };
+
+ gpio_keys: gpio-keys {
+
+ compatible = "gpio-keys";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
@ -96,6 +106,21 @@ index 000000000..e5f09873c
+ bias-disable;
+ };
+
+ pcfg_pull_up_8ma: pcfg-pull-up-8ma {
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
+ pcfg_pull_down_8ma: pcfg-pull-down-8ma {
+ drive-strength = <8>;
+ bias-pull-down;
+ };
+
+ pcfg_pull_none_8ma: pcfg-pull-none-8ma {
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ pcfg_pull_up_2ma: pcfg-pull-up-2ma {
+ drive-strength = <2>;
+ bias-pull-up;
@ -209,6 +234,7 @@ index 000000000..e5f09873c
+};
+
+&sdmmc {
+ cd-debounce-delay-ms = <500>;
+ status = "okay";
+};
+

322
patch/kernel/rk322x-legacy/general-add-overlays.patch
View File

@ -1,9 +1,9 @@
diff --git a/arch/arm/boot/dts/overlay/Makefile b/arch/arm/boot/dts/overlay/Makefile
new file mode 100644
index 000000000..f024e8db0
index 000000000..78a81340d
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/Makefile
@@ -0,0 +1,20 @@
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: GPL-2.0
+dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
+ rk322x-emmc.dtbo \
@ -11,7 +11,11 @@ index 000000000..f024e8db0
+ rk322x-emmc-nand.dtbo \
+ rk322x-led-conf1.dtbo \
+ rk322x-led-conf2.dtbo \
+ rk322x-cpu-hs.dtbo
+ rk322x-cpu-hs.dtbo \
+ rk322x-bluetooth.dtbo \
+ rk322x-wlan-ssv6051.dtbo \
+ rk322x-cpu-hs-lv.dtbo \
+ rk322x-wlan-esp8089.dtbo
+
+scr-$(CONFIG_ARCH_ROCKCHIP) += \
+ rk322x-fixup.scr
@ -26,10 +30,10 @@ index 000000000..f024e8db0
+
diff --git a/arch/arm/boot/dts/overlay/README.rk322x-overlays b/arch/arm/boot/dts/overlay/README.rk322x-overlays
new file mode 100644
index 000000000..d5bc7f3d5
index 000000000..4cdaad5e3
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/README.rk322x-overlays
@@ -0,0 +1,51 @@
@@ -0,0 +1,73 @@
+This document describes overlays provided in the kernel packages
+For generic Armbian overlays documentation please see
+https://docs.armbian.com/User-Guide_Allwinner_overlays/
@ -44,10 +48,10 @@ index 000000000..d5bc7f3d5
+- rk322x-emmc
+- rk322x-nand
+- rk322x-emmc-nand
+- rk322x-led1-low
+- rk322x-led1-high
+- rk322x-led2-low
+- rk322x-led2-high
+- rk322x-led-conf*
+- rk322x-bluetooth
+- rk322x-wlan-*
+- rk322x-cpu-hs-lv
+
+### Overlay details:
+
@ -81,6 +85,192 @@ index 000000000..d5bc7f3d5
+(ie: gpio and active low/high) of the onboard leds. Each board manufacturer
+usually choose a different GPIO for the auxiliary led, but the main "working"
+led is always wired to the same gpio (although it may be active high or low)
+led-conf1 is commonly found in boards made by Chiptrip manufacturer
+led-conf2 is found in other boards with R329Q marking
+
+### rk322x-bluetooth
+
+Enables the bluetooth power gpio for initialization, wakeup and rfkill
+functionalities. The overlay also enables uart named serial1 and changes the
+default pin controller gpio configuration to match those used with uart
+based bluetooth modules
+
+### rk322x-wlan*
+
+Enables various wlan rkfill platform data. Actually they are not really
+needed, but provided for completeness. Wifi should work farily well
+because power handling is done mmc-pwrseq
+
+### rk322x-cpu-hs-lv
+
+Enables high cpu speed for high leakage cpus, thus reducing cpu core
+and logic voltages. May work on non-high leakage cpus, providing significant
+power consumption saving and less heat production, but may reduce stability.
+
diff --git a/arch/arm/boot/dts/overlay/rk322x-bluetooth.dts b/arch/arm/boot/dts/overlay/rk322x-bluetooth.dts
new file mode 100644
index 000000000..5698b14ba
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-bluetooth.dts
@@ -0,0 +1,39 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+
+ fragment@0 {
+ target-path = "/";
+ __overlay__ {
+ wireless_bluetooth: wireless-bluetooth {
+ compatible = "bluetooth-platdata";
+ uart_rts_gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
+ BT,power_gpio = <&gpio2 RK_PD5 GPIO_ACTIVE_LOW>;
+ BT,wake_gpio = <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>;
+ BT,wake_host_irq = <&gpio3 RK_PD2 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default", "rts_gpio";
+ pinctrl-0 = <&uart11_rts>;
+ pinctrl-1 = <&uart11_rts_gpio>;
+ status = "okay";
+ };
+ };
+ };
+
+ fragment@1 {
+ target = <&uart1>;
+ __overlay__ {
+ dma-names = "!tx", "!rx";
+ dmas = <&pdma 0x04 &pdma 0x05>;
+ #dma-cells = <0x02>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart11_xfer &uart11_cts>;
+ status = "okay";
+ };
+
+ };
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-cpu-hs-lv.dts b/arch/arm/boot/dts/overlay/rk322x-cpu-hs-lv.dts
new file mode 100644
index 000000000..4cde11782
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-cpu-hs-lv.dts
@@ -0,0 +1,113 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+
+ fragment@0 {
+ target = <&cpu0_opp_table>;
+ __overlay__ {
+
+ opp-408000000 {
+ opp-microvolt = <850000 850000 1275000>;
+ opp-microvolt-L0 = <850000 850000 1275000>;
+ opp-microvolt-L1 = <850000 850000 1275000>;
+ };
+ opp-600000000 {
+ opp-microvolt = <875000 875000 1275000>;
+ opp-microvolt-L0 = <875000 875000 1275000>;
+ opp-microvolt-L1 = <875000 875000 1275000>;
+ };
+ opp-816000000 {
+ opp-microvolt = <900000 900000 1275000>;
+ opp-microvolt-L0 = <900000 900000 1275000>;
+ opp-microvolt-L1 = <900000 900000 1275000>;
+ };
+ opp-1008000000 {
+ opp-microvolt = <1075000 1075000 1275000>;
+ opp-microvolt-L0 = <1075000 1075000 1275000>;
+ opp-microvolt-L1 = <1025000 1025000 1275000>;
+ };
+ opp-1200000000 {
+ opp-microvolt = <1175000 1175000 1275000>;
+ opp-microvolt-L0 = <1175000 1175000 1275000>;
+ opp-microvolt-L1 = <1125000 1125000 1275000>;
+ };
+ opp-1296000000 {
+ opp-hz = /bits/ 64 <1296000000>;
+ opp-microvolt = <1225000 1225000 1400000>;
+ opp-microvolt-L0 = <1225000 1225000 1400000>;
+ opp-microvolt-L1 = <1225000 1225000 1400000>;
+ };
+ opp-1392000000 {
+ opp-hz = /bits/ 64 <1392000000>;
+ opp-microvolt = <1250000 1250000 1400000>;
+ opp-microvolt-L0 = <1250000 1250000 1400000>;
+ opp-microvolt-L1 = <1250000 1250000 1400000>;
+ };
+
+ };
+ };
+
+ fragment@1 {
+ target = <&vdd_arm>;
+ __overlay__ {
+ regulator-min-microvolt = <850000>;
+ };
+ };
+
+ fragment@2 {
+ target = <&gpu_opp_table>;
+ __overlay__ {
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <950000>;
+ opp-microvolt-L0 = <950000>;
+ opp-microvolt-L1 = <900000>;
+ };
+ opp-300000000 {
+ opp-hz = /bits/ 64 <300000000>;
+ opp-microvolt = <950000>;
+ opp-microvolt-L0 = <950000>;
+ opp-microvolt-L1 = <900000>;
+ };
+ opp-500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <1050000>;
+ opp-microvolt-L0 = <1050000>;
+ opp-microvolt-L1 = <1000000>;
+ };
+ };
+ };
+
+ fragment@3 {
+ target = <&vdd_log>;
+ __overlay__ {
+ regulator-min-microvolt = <900000>;
+ };
+ };
+
+ fragment@4 {
+ target = <&rkvdec_opp_table>;
+ __overlay__ {
+ opp-100000000 {
+ opp-hz = /bits/ 64 <100000000>;
+ opp-microvolt = <950000>;
+ opp-microvolt-L0 = <950000>;
+ opp-microvolt-L1 = <900000>;
+ };
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <950000>;
+ opp-microvolt-L0 = <950000>;
+ opp-microvolt-L1 = <900000>;
+ };
+ opp-500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <950000>;
+ opp-microvolt-L0 = <950000>;
+ opp-microvolt-L1 = <900000>;
+ };
+ };
+ };
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts b/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts
new file mode 100644
index 000000000..1c2fc79e1
@ -185,14 +375,15 @@ index 000000000..d4c39e20a
+
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
new file mode 100644
index 000000000..053947ce8
index 000000000..f30f21a8f
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
@@ -0,0 +1,41 @@
@@ -0,0 +1,57 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/rk-input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
@ -229,17 +420,33 @@ index 000000000..053947ce8
+ };
+ };
+
+ fragment@2 {
+ target = <&gpio_keys>;
+ __overlay__ {
+
+ reset {
+ gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <200>;
+ wakeup-source;
+ };
+
+ };
+ };
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
new file mode 100644
index 000000000..a3b0bfcee
index 000000000..153f71565
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
@@ -0,0 +1,41 @@
@@ -0,0 +1,57 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
@ -276,6 +483,21 @@ index 000000000..a3b0bfcee
+ };
+ };
+
+ fragment@2 {
+ target = <&gpio_keys>;
+ __overlay__ {
+
+ reset {
+ gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <200>;
+ wakeup-source;
+ };
+
+ };
+ };
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-nand.dts b/arch/arm/boot/dts/overlay/rk322x-nand.dts
new file mode 100644
@ -305,3 +527,77 @@ index 000000000..5675f5b3d
+ };
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-wlan-esp8089.dts b/arch/arm/boot/dts/overlay/rk322x-wlan-esp8089.dts
new file mode 100644
index 000000000..76c13a6b1
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-wlan-esp8089.dts
@@ -0,0 +1,38 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+
+ fragment@0 {
+ target-path = "/";
+ __overlay__ {
+ wireless_wlan: wireless-wlan {
+ compatible = "wlan-platdata";
+ rockchip,grf = <&grf>;
+ wifi_chip_type = "esp8089";
+ sdio_vref = <1800>;
+ //WIFI,poweren_gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
+ WIFI,host_wake_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_LOW>;
+ status = "okay";
+ };
+ };
+ };
+
+ fragment@1 {
+ target = <&sdio_pwrseq>;
+ __overlay__ {
+ reset-gpios = <&gpio2 27 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ fragment@2 {
+ target = <&wifi_enable_h>;
+ __overlay__ {
+ rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-wlan-ssv6051.dts b/arch/arm/boot/dts/overlay/rk322x-wlan-ssv6051.dts
new file mode 100644
index 000000000..47644f6e8
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-wlan-ssv6051.dts
@@ -0,0 +1,24 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+
+ fragment@0 {
+ target-path = "/";
+ __overlay__ {
+ wireless_wlan: wireless-wlan {
+ compatible = "wlan-platdata";
+ rockchip,grf = <&grf>;
+ wifi_chip_type = "ssv6051";
+ sdio_vref = <1800>;
+ //WIFI,poweren_gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_LOW>;
+ WIFI,host_wake_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_LOW>;
+ status = "okay";
+ };
+ };
+ };
+
+};