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rk3588: edge: Update patch Add HDMI0 node to latest submitted

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Source: https://lore.kernel.org/linux-rockchip/20241019-rk3588-hdmi0-dt-v1-0-bd8f299feacd@collabora.com/T/#m009c1b70ba8dc287084b3b08ff415fc391ebbde7
This commit is contained in:
ColorfulRhino 2024-10-20 21:09:46 +02:00
parent d5ed3de06f
commit 71aef28568
1 changed files with 7 additions and 34 deletions
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41
patch/kernel/archive/rockchip-rk3588-6.12/0135-arm64-dts-rockchip-Add-HDMI0-bridge-CLK-to-rk3588.patch → patch/kernel/archive/rockchip-rk3588-6.12/0135-arm64-dts-rockchip-Add-HDMI0-node-to-rk3588.patch
View File

@ -1,20 +1,20 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Mon, 15 Jan 2024 22:47:41 +0200
Subject: arm64: dts: rockchip: Add HDMI0 bridge to rk3588
Date: Sat, 19 Oct 2024 13:12:10 +0300
Subject: arm64: dts: rockchip: Add HDMI0 node to rk3588
Add DT node for the HDMI0 bridge found on RK3588 SoC.
Add support for the HDMI0 output port found on RK3588 SoC.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
---
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 42 ++++++++++
1 file changed, 42 insertions(+)
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 41 ++++++++++
1 file changed, 41 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
index 111111111111..222222222222 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
@@ -1404,6 +1404,48 @@ i2s9_8ch: i2s@fddfc000 {
@@ -1404,6 +1404,47 @@ i2s9_8ch: i2s@fddfc000 {
status = "disabled";
};
@ -35,7 +35,6 @@ index 111111111111..222222222222 100644
+ <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "avp", "cec", "earc", "main", "hpd";
+ phys = <&hdptxphy_hdmi0>;
+ phy-names = "hdmi";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
+ &hdmim0_tx0_scl &hdmim0_tx0_sda>;
@ -43,7 +42,7 @@ index 111111111111..222222222222 100644
+ resets = <&cru SRST_HDMITX0_REF>, <&cru SRST_HDMIHDP0>;
+ reset-names = "ref", "hdp";
+ rockchip,grf = <&sys_grf>;
+ rockchip,vo1_grf = <&vo1_grf>;
+ rockchip,vo-grf = <&vo1_grf>;
+ status = "disabled";
+
+ ports {
@ -66,29 +65,3 @@ index 111111111111..222222222222 100644
--
Armbian
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Date: Tue, 16 Jan 2024 03:13:38 +0200
Subject: [WIP] arm64: dts: rockchip: Enable HDMI0 PHY clk provider on rk3588
The HDMI0 PHY can be used as a clock provider on RK3588, hence add the
missing #clock-cells property.
---
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
index 111111111111..222222222222 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
@@ -2867,6 +2867,7 @@ hdptxphy_hdmi0: phy@fed60000 {
reg = <0x0 0xfed60000 0x0 0x2000>;
clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>, <&cru PCLK_HDPTX0>;
clock-names = "ref", "apb";
+ #clock-cells = <0>;
#phy-cells = <0>;
resets = <&cru SRST_HDPTX0>, <&cru SRST_P_HDPTX0>,
<&cru SRST_HDPTX0_INIT>, <&cru SRST_HDPTX0_CMN>,
--
Armbian