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Initial support for A20-SOM-EVB (#817)

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Stefan Mavrodiev 2017-11-07 12:38:51 +02:00 committed by Mikhail
parent 0ca62c3c0c
commit 7051559bcd
3 changed files with 1180 additions and 0 deletions
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20
config/boards/olimex-som-a20.csc Normal file
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@ -0,0 +1,20 @@
# A20 dual core 1Gb SoC
BOARD_NAME="SOM-A20"
LINUXFAMILY="sun7i"
BOOTCONFIG="A20-Olimex-SOM-EVB_defconfig"
MODULES="hci_uart gpio_sunxi rfcomm hidp bonding spi_sun7i 8021q a20_tp sun4i_csi0"
MODULES_NEXT="bonding"
#
KERNEL_TARGET="default,next,dev"
CLI_TARGET="jessie,xenial:next"
DESKTOP_TARGET="xenial:default,next"
CLI_BETA_TARGET=""
DESKTOP_BETA_TARGET=""
#
RECOMMENDED="Ubuntu_xenial_default_desktop:90,Debian_jessie_next:100"
#
BOARDRATING=""
CHIP="http://docs.armbian.com/Hardware_Allwinner-A20/"
HARDWARE="https://www.olimex.com/Products/SOM/A20/A20-SOM-EVB/open-source-hardware"
FORUMS="http://forum.armbian.com/index.php/forum/7-allwinner-a10a20/"

1088
config/fex/olimex-som-a20.fex Normal file
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72
patch/u-boot/u-boot-sunxi/board_olimex-som-a20/GMAC_TX_DELAY_autocorrection.patch Normal file
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@ -0,0 +1,72 @@
diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig
index 6f57c3a..a4a8b32 100644
--- a/configs/A20-Olimex-SOM-EVB_defconfig
+++ b/configs/A20-Olimex-SOM-EVB_defconfig
@@ -28,3 +28,5 @@ CONFIG_AXP_ALDO4_VOLT=2800
CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
diff --git a/drivers/net/phy/micrel_ksz90x1.c b/drivers/net/phy/micrel_ksz90x1.c
index 0bb99e6..ce35daf 100644
--- a/drivers/net/phy/micrel_ksz90x1.c
+++ b/drivers/net/phy/micrel_ksz90x1.c
@@ -16,6 +16,8 @@
#include <fdtdec.h>
#include <micrel.h>
#include <phy.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -335,6 +337,10 @@ static int ksz9031_phy_extwrite(struct phy_device *phydev, int addr,
static int ksz9031_config(struct phy_device *phydev)
{
int ret;
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_DELAY(4));
ret = ksz9031_of_config(phydev);
if (ret)
diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index 6d917f8..87956c0 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -11,6 +11,8 @@
#include <common.h>
#include <linux/bitops.h>
#include <phy.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
#define PHY_RTL8211x_FORCE_MASTER BIT(1)
@@ -63,6 +65,9 @@ static int rtl8211b_probe(struct phy_device *phydev)
/* RealTek RTL8211x */
static int rtl8211x_config(struct phy_device *phydev)
{
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET);
/* mask interrupt at init; if the interrupt is
@@ -71,6 +76,14 @@ static int rtl8211x_config(struct phy_device *phydev)
phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_INER,
MIIM_RTL8211x_PHY_INTR_DIS);
+ if(phydev->drv->uid == 0x1cc912) {
+ /* With RTL8211C Force Master must be enabled */
+ phydev->flags |= PHY_RTL8211x_FORCE_MASTER;
+ } else if(phydev->drv->uid == 0x1cc915) {
+ /* RTL8211E has different GMAC_TX_DELAY requirements */
+ setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_DELAY(2));
+ }
+
if (phydev->flags & PHY_RTL8211x_FORCE_MASTER) {
unsigned int reg;