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[WIP] Add USB3 and SPI flash support in clearfog-dev u-boot

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zador-blood-stained 2017-12-03 22:58:38 +03:00
parent 7317d3f5bb
commit 5f9f1344a6
5 changed files with 295 additions and 0 deletions
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79
patch/u-boot/u-boot-mvebu-next/01-a38x-xhci-support.patch Normal file
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@ -0,0 +1,79 @@
From d3d036af8c0ee848c4113dc609bbd6ab26ebc6cb Mon Sep 17 00:00:00 2001
From: Jon Nettleton <jon@solid-run.com>
Date: Mon, 6 Nov 2017 10:33:19 +0200
Subject: [PATCH] mvebu: usb: xhci: a38x support
This makes the initial changes need to support the
a38x series of SOCs. It adds the device-tree identifier
as well as changing the board_support function to take
the IO address designated by device-tree.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: use fdt_addr_t; update 37xx and 8K implementations]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
---
board/Marvell/mvebu_armada-37xx/board.c | 2 +-
board/Marvell/mvebu_armada-8k/board.c | 2 +-
drivers/usb/host/xhci-mvebu.c | 5 +++--
3 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/board/Marvell/mvebu_armada-37xx/board.c b/board/Marvell/mvebu_armada-37xx/board.c
index 8dc1f46..ac3e3a3 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -123,7 +123,7 @@ int board_ahci_enable(void)
}
/* Board specific xHCI enable code */
-int board_xhci_enable(void)
+int board_xhci_enable(fdt_addr_t base)
{
struct udevice *dev;
int ret;
diff --git a/board/Marvell/mvebu_armada-8k/board.c b/board/Marvell/mvebu_armada-8k/board.c
index 7d1b5d9..f4eabfb 100644
--- a/board/Marvell/mvebu_armada-8k/board.c
+++ b/board/Marvell/mvebu_armada-8k/board.c
@@ -95,7 +95,7 @@ int board_xhci_config(void)
return 0;
}
-int board_xhci_enable(void)
+int board_xhci_enable(fdt_addr_t base)
{
struct udevice *dev;
int ret;
diff --git a/drivers/usb/host/xhci-mvebu.c b/drivers/usb/host/xhci-mvebu.c
index b9201a5..dbdfce3 100644
--- a/drivers/usb/host/xhci-mvebu.c
+++ b/drivers/usb/host/xhci-mvebu.c
@@ -35,7 +35,7 @@ struct mvebu_xhci {
* Dummy implementation that can be overwritten by a board
* specific function
*/
-__weak int board_xhci_enable(void)
+__weak int board_xhci_enable(fdt_addr_t base)
{
return 0;
}
@@ -62,7 +62,7 @@ static int xhci_usb_probe(struct udevice *dev)
}
/* Enable USB xHCI (VBUS, reset etc) in board specific code */
- board_xhci_enable();
+ board_xhci_enable(devfdt_get_addr_index(dev, 1));
return xhci_register(dev, ctx->hcd, hcor);
}
@@ -85,6 +85,7 @@ static int xhci_usb_ofdata_to_platdata(struct udevice *dev)
static const struct udevice_id xhci_usb_ids[] = {
{ .compatible = "marvell,armada3700-xhci" },
+ { .compatible = "marvell,armada-380-xhci" },
{ .compatible = "marvell,armada-8k-xhci" },
{ }
};
--
1.7.10.4

70
patch/u-boot/u-boot-mvebu-next/02-mvebu-xhci-add-board-setup.patch Normal file
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@ -0,0 +1,70 @@
From 78aa018f079598082087a3b7a319a82d486982fb Mon Sep 17 00:00:00 2001
From: Jon Nettleton <jon@solid-run.com>
Date: Mon, 6 Nov 2017 10:33:20 +0200
Subject: [PATCH] arm: mvebu: Add board_setup for xhci hardware
This fixes the USB 3.0 support for the a38x SOC.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: use fdt_addr_t]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
---
arch/arm/mach-mvebu/cpu.c | 41 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 74a63dd..7c64a68 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -554,6 +554,47 @@ void scsi_init(void)
}
#endif
+#ifdef CONFIG_USB_XHCI_MVEBU
+#define USB3_MAX_WINDOWS 4
+#define USB3_WIN_CTRL(w) (0x0 + ((w) * 8))
+#define USB3_WIN_BASE(w) (0x4 + ((w) * 8))
+
+static void xhci_mvebu_mbus_config(void __iomem *base,
+ const struct mbus_dram_target_info *dram)
+{
+ int i;
+
+ for (i = 0; i < USB3_MAX_WINDOWS; i++) {
+ writel(0, base + USB3_WIN_CTRL(i));
+ writel(0, base + USB3_WIN_BASE(i));
+ }
+
+ for (i = 0; i < dram->num_cs; i++) {
+ const struct mbus_dram_window *cs = dram->cs + i;
+
+ /* Write size, attributes and target id to control register */
+ writel(((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) |
+ (dram->mbus_dram_target_id << 4) | 1,
+ base + USB3_WIN_CTRL(i));
+
+ /* Write base address to base register */
+ writel((cs->base & 0xffff0000), base + USB3_WIN_BASE(i));
+ }
+}
+
+int board_xhci_enable(fdt_addr_t base)
+{
+ const struct mbus_dram_target_info *dram;
+
+ printf("MVEBU XHCI INIT controller @ 0x%lx\n", base);
+
+ dram = mvebu_mbus_dram_info();
+ xhci_mvebu_mbus_config((void __iomem *)base, dram);
+
+ return 0;
+}
+#endif
+
void enable_caches(void)
{
/* Avoid problem with e.g. neta ethernet driver */
--
1.7.10.4

31
patch/u-boot/u-boot-mvebu-next/03-clearfog-enable-xhci.patch Normal file
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@ -0,0 +1,31 @@
From b4b06ac6f767b833acf7cf6e7533ead2f4425378 Mon Sep 17 00:00:00 2001
From: Jon Nettleton <jon@solid-run.com>
Date: Mon, 6 Nov 2017 10:33:21 +0200
Subject: [PATCH] arm: mvebu: clearfog: enable XHCI USB
Enable the driver by default for the clearfog boards since the external
port is configured for XHCI.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: split from the SoC setup patch]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
---
configs/clearfog_defconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig
index fa9f04a..3de2043 100644
--- a/configs/clearfog_defconfig
+++ b/configs/clearfog_defconfig
@@ -43,5 +43,6 @@ CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_DM_USB=y
-CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_MVEBU=y
CONFIG_USB_STORAGE=y
--
1.7.10.4

53
patch/u-boot/u-boot-mvebu-next/04-clearfog-fix-spi-flash-access.patch Normal file
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@ -0,0 +1,53 @@
From 962b8fef91fbfa58c1045bee4d9a73c72b46c829 Mon Sep 17 00:00:00 2001
From: Jon Nettleton <jon@solid-run.com>
Date: Mon, 13 Nov 2017 07:04:30 +0200
Subject: [PATCH] arm: mvebu: clearfog: Fix SPI-NOR flash access
The production variant of the SPI flash used by the clearfog
devices are based on winbond chips. Additionally enable
SPI_FLASH_BAR since some variants will have 16MB of flash
that requires this to be enabled.
Remove the default speed and mode; these values are taken from the
device tree when CONFIG_DM_SPI_FLASH is enabled.
Add default bus, so that 'sf' detects the SPI flash by default.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: remove speed/mode; add bus; move winbond to defconfig]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
---
configs/clearfog_defconfig | 3 +++
include/configs/clearfog.h | 4 +---
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig
index 3de2043..5fa645a 100644
--- a/configs/clearfog_defconfig
+++ b/configs/clearfog_defconfig
@@ -46,3 +46,6 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_MVEBU=y
CONFIG_USB_STORAGE=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_MTD=y
diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h
index 5061f6c..bf87bac 100644
--- a/include/configs/clearfog.h
+++ b/include/configs/clearfog.h
@@ -33,9 +33,7 @@
#define CONFIG_SYS_I2C_SPEED 100000
/* SPI NOR flash default params, used by sf commands */
-#define CONFIG_SF_DEFAULT_SPEED 1000000
-#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
-#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SF_DEFAULT_BUS 1
/*
* SDIO/MMC Card Configuration
--
1.7.10.4

62
patch/u-boot/u-boot-mvebu-next/05-clearfog-add-spi-flash-DT.patch Normal file
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@ -0,0 +1,62 @@
From 8c1ce928f498774a3e2c3aa03534b6e6ca6d4759 Mon Sep 17 00:00:00 2001
From: Baruch Siach <baruch@tkos.co.il>
Date: Mon, 13 Nov 2017 07:04:31 +0200
Subject: [PATCH] arm: mvebu: clearfog: update SPI flash DT description
All current ClearFog SOMs have the SPI flash populated. Enable SPI flash in
the device tree.
Add an alias to the SPI bus so that the 'sf' command can probe the flash on
bus 1.
Add the "spi-flash" compatible string to make the standard SPI flash driver
probe the device.
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
---
arch/arm/dts/armada-388-clearfog.dts | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/arch/arm/dts/armada-388-clearfog.dts b/arch/arm/dts/armada-388-clearfog.dts
index b2dfd56..bc52bc0 100644
--- a/arch/arm/dts/armada-388-clearfog.dts
+++ b/arch/arm/dts/armada-388-clearfog.dts
@@ -61,6 +61,7 @@
ethernet1 = &eth0;
ethernet2 = &eth1;
ethernet3 = &eth2;
+ spi1 = &spi1;
};
chosen {
@@ -330,11 +331,9 @@
status = "okay";
};
- spi@10680 {
+ spi1: spi@10680 {
/*
- * We don't seem to have the W25Q32 on the
- * A1 Rev 2.0 boards, so disable SPI.
- * CS0: W25Q32 (doesn't appear to be present)
+ * CS0: W25Q32
* CS1:
* CS2: mikrobus
*/
@@ -345,10 +344,9 @@
spi-flash@0 {
#address-cells = <1>;
#size-cells = <0>;
- compatible = "w25q32", "jedec,spi-nor";
+ compatible = "w25q32", "jedec,spi-nor", "spi-flash";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <3000000>;
- status = "disabled";
};
};
--
1.7.10.4