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Switch sunxi and sunxi64 to u-boot v2020.04 (#1894)

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* Disable DE2 in u-boot to improve EDID detection
* Remove deprecated patches
* Define BOOTBRANCH in top level

Signed-off-by: Igor Pecovnik <igor.pecovnik@gmail.com>
This commit is contained in:
Igor Pečovnik 2020-04-17 23:44:35 +02:00 committed by GitHub
parent d6d6d9ae5e
commit 5e8cbd8e6a
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
40 changed files with 400 additions and 1123 deletions
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2
config/sources/arm64.conf
View File

@ -15,7 +15,7 @@ ATF_COMPILER="aarch64-linux-gnu-"
[[ -z $UBOOT_USE_GCC ]] && UBOOT_USE_GCC='> 8.0'
[[ -z $BOOTSOURCE ]] && BOOTSOURCE=$MAINLINE_UBOOT_SOURCE
[[ -z $BOOTDIR ]] && BOOTDIR=$MAINLINE_UBOOT_DIR
[[ -z $BOOTBRANCH ]] && BOOTBRANCH='tag:v2019.10'
[[ -z $BOOTBRANCH ]] && BOOTBRANCH='tag:v2020.04'
[[ -z $KERNEL_COMPILER ]] && KERNEL_COMPILER="aarch64-linux-gnu-"
[[ -z $KERNEL_USE_GCC ]] && KERNEL_USE_GCC='> 8.0'

2
config/sources/armhf.conf
View File

@ -8,7 +8,7 @@ CAN_BUILD_STRETCH=yes
[[ -z $UBOOT_USE_GCC ]] && UBOOT_USE_GCC='> 8.0'
[[ -z $BOOTSOURCE ]] && BOOTSOURCE=$MAINLINE_UBOOT_SOURCE
[[ -z $BOOTDIR ]] && BOOTDIR=$MAINLINE_UBOOT_DIR
[[ -z $BOOTBRANCH ]] && BOOTBRANCH='tag:v2019.10'
[[ -z $BOOTBRANCH ]] && BOOTBRANCH='tag:v2020.04'
[[ -z $KERNEL_COMPILER ]] && KERNEL_COMPILER="arm-linux-gnueabihf-"
[[ -z $KERNEL_USE_GCC ]] && KERNEL_USE_GCC='> 8.0'

1
config/sources/families/include/meson64_common.inc
View File

@ -1,4 +1,3 @@
BOOTBRANCH='tag:v2020.04'
UBOOT_TARGET_MAP="u-boot-dtb.img;;u-boot.bin.sd.bin:u-boot.bin u-boot-dtb.img"
BOOTSCRIPT="boot-meson64.cmd:boot.cmd"
BOOTENV_FILE='meson64-next.txt'

1
config/sources/families/rk3399.conf
View File

@ -1,6 +1,5 @@
source "${BASH_SOURCE%/*}/include/rockchip64_common.inc"
BOOTBRANCH='tag:v2020.04'
BOOTPATCHDIR="u-boot-rk3399"
case $BRANCH in

5
config/sources/families/sun50iw1.conf
View File

@ -16,8 +16,3 @@ family_tweaks_s()
echo "kernel.sysrq = 0" >> $SDCARD/etc/sysctl.d/sysrq.conf
fi
}
if [[ $BOARD == teres-a64 ]]; then
BOOTBRANCH='tag:v2020.01'
BOOTPATCHDIR='u-boot-sunxi-dev'
fi

1
config/sources/families/sun50iw6.conf
View File

@ -10,4 +10,3 @@ BOOTENV_FILE='sun50iw2-next.txt'
GOVERNOR=ondemand
ASOUND_STATE='asound.state.sun50iw2-dev'
BOOTPATCHDIR='u-boot-sun50iw6'

21
patch/u-boot/u-boot-sun50iw2/add-a64-olinuxino-emmc-support.patch
View File

@ -1,21 +0,0 @@
diff --git a/arch/arm/dts/sun50i-a64-olinuxino.dts b/arch/arm/dts/sun50i-a64-olinuxino.dts
index f7a4bcc..9d77afb 100644
--- a/arch/arm/dts/sun50i-a64-olinuxino.dts
+++ b/arch/arm/dts/sun50i-a64-olinuxino.dts
@@ -155,6 +155,16 @@
};
};
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <&reg_dcdc1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
&ohci0 {
status = "okay";
};

13
patch/u-boot/u-boot-sun50iw2/add-a64-olinuxino-spl-spi.patch
View File

@ -1,13 +0,0 @@
diff --git a/configs/a64-olinuxino_defconfig b/configs/a64-olinuxino_defconfig
index 01fcb86..528fe16 100644
--- a/configs/a64-olinuxino_defconfig
+++ b/configs/a64-olinuxino_defconfig
@@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SPL=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUNXI=y
CONFIG_MACH_SUN50I=y
CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
CONFIG_MMC_SUNXI_SLOT_EXTRA=2

186
patch/u-boot/u-boot-sun50iw2/add-teres.patch
View File

@ -1,186 +0,0 @@
From 960ae79950a2b0a8d2e62bb3dfb5727764512a8b Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Mon, 22 Jan 2018 00:49:10 +0800
Subject: [PATCH] test
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
arch/arm/dts/sun50i-a64-teres-i.dts | 114 ++++++++++++++++++++++++++++++++++++
configs/teres_i_defconfig | 35 +++++++++++
2 files changed, 149 insertions(+)
create mode 100644 arch/arm/dts/sun50i-a64-teres-i.dts
create mode 100644 configs/teres_i_defconfig
diff --git a/arch/arm/dts/sun50i-a64-teres-i.dts b/arch/arm/dts/sun50i-a64-teres-i.dts
new file mode 100644
index 0000000000..1b836c1f49
--- /dev/null
+++ b/arch/arm/dts/sun50i-a64-teres-i.dts
@@ -0,0 +1,114 @@
+/*
+ * Copyright (c) 2018 Icenowy Zheng <icenowy@aosc.io>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/pwm/pwm.h>
+#include "sun50i-a64-pine64.dts"
+
+/ {
+ model = "TERES I";
+ compatible = "olimex,teres-i", "allwinner,sun50i-a64";
+
+ aliases {
+ serial0 = &uart0;
+ i2c0 = "/i2c_gpio@0";
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
+ brightness-levels = <0 10 20 30 40 50 60 70 100>;
+ default-brightness-level = <3>;
+ enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ reg = <0x40000000 0x40000000>;
+ };
+
+ soc {
+ i2c_gpio@0 {
+ compatible = "i2c-gpio";
+ gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>, /* sda - PL9 */
+ <&pio 7 0 GPIO_ACTIVE_HIGH>; /* scl - PL8 */
+ i2c-gpio,sda-open-drain;
+ i2c-gpio,scl-open-drain;
+ i2c-gpio,delay-us = <2>; /* ~100 kHz */
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ anx6345: edp-bridge@38 {
+ compatible = "analogix,anx6345";
+ reg = <0x38>;
+ sleep-gpios = <&pio 7 8 GPIO_ACTIVE_LOW>; /* PH8 dummy */
+ reset-gpios = <&pio 3 24 GPIO_ACTIVE_LOW>; /* PD24 */
+ status = "okay";
+
+ /*
+ ports {
+ port@0 {
+ bridge_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+
+ port@1 {
+ bridge_in: endpoint {
+ remote-endpoint = <&rgb_out>;
+ };
+ };
+ };
+ */
+ };
+ };
+ };
+};
+
+&pwm {
+ status = "okay";
+};
diff --git a/configs/teres_i_defconfig b/configs/teres_i_defconfig
new file mode 100644
index 0000000000..da33b4131d
--- /dev/null
+++ b/configs/teres_i_defconfig
@@ -0,0 +1,35 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN50I=y
+CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
+CONFIG_DRAM_CLK=552
+CONFIG_DRAM_ZQ=3881949
+CONFIG_DRAM_ODT_EN=y
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-teres-i"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_ATF_SUPPORT=y
+CONFIG_SPL_ATF_TEXT_BASE=0x44000
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_DM_I2C_GPIO=y
+# CONFIG_SPL_SPI_SUNXI is not set
+CONFIG_DM_REGULATOR=y
+CONFIG_AXP_DLDO2_VOLT=2500
+CONFIG_AXP_DLDO3_VOLT=1200
+CONFIG_AXP_SW_ON=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_SUNXI=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
+CONFIG_VIDEO_BRIDGE=y
+CONFIG_VIDEO_BRIDGE_ANALOGIX_ANX6345=y
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -406,7 +406,8 @@ dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-pine64-plus.dtb \
sun50i-a64-pine64.dtb \
sun50i-a64-pinebook.dtb \
- sun50i-a64-sopine-baseboard.dtb
+ sun50i-a64-sopine-baseboard.dtb \
+ sun50i-a64-teres-i.dtb
dtb-$(CONFIG_MACH_SUN9I) += \
sun9i-a80-optimus.dtb \
sun9i-a80-cubieboard4.dtb \

343
patch/u-boot/u-boot-sun50iw2/board_pine64so/fix-sopine-spi-clusterboad.patch
View File

@ -1,343 +0,0 @@
diff --git a/arch/arm/cpu/armv8/generic_timer.c b/arch/arm/cpu/armv8/generic_timer.c
index c1706dcec1..2e06ee4ed2 100644
--- a/arch/arm/cpu/armv8/generic_timer.c
+++ b/arch/arm/cpu/armv8/generic_timer.c
@@ -66,7 +66,7 @@ unsigned long timer_read_counter(void)
isb();
do {
asm volatile("mrs %0, cntpct_el0" : "=r" (cntpct));
- } while (((cntpct + 1) & GENMASK(10, 0)) <= 1);
+ } while (((cntpct + 1) & GENMASK(9, 0)) <= 1);
return cntpct;
}
diff --git a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
index 53fcc9098d..8dac3f135b 100644
--- a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
@@ -55,6 +55,7 @@
aliases {
ethernet0 = &emac;
serial0 = &uart0;
+ spi0 = &spi0;
};
chosen {
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
index ee387127f3..4aaa0932d7 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
@@ -321,6 +321,7 @@ struct sunxi_ccm_reg {
#define AHB_GATE_OFFSET_MMC(n) (AHB_GATE_OFFSET_MMC0 + (n))
#define AHB_GATE_OFFSET_DMA 6
#define AHB_GATE_OFFSET_SS 5
+#define AHB_GATE_OFFSET_SPI0 20
/* ahb_gate1 offsets */
#define AHB_GATE_OFFSET_DRC0 25
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun9i.h b/arch/arm/include/asm/arch-sunxi/clock_sun9i.h
index 530e0dd73b..9bbd4d319e 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun9i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun9i.h
@@ -194,6 +194,7 @@ struct sunxi_ccm_reg {
/* ahb gate1 field */
#define AHB_GATE_OFFSET_DMA 24
+#define AHB_GATE_OFFSET_SPI0 20
/* apb1_gate fields */
#define APB1_GATE_UART_SHIFT 16
diff --git a/configs/sopine_baseboard_defconfig b/configs/sopine_baseboard_defconfig
index 9ede081c08..af690c11c5 100644
--- a/configs/sopine_baseboard_defconfig
+++ b/configs/sopine_baseboard_defconfig
@@ -18,3 +18,20 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-sopine-baseboard"
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI=y
+CONFIG_SUN4I_SPI=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
\ No newline at end of file
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index a7bb5b35c2..88e772cb1a 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -219,9 +219,9 @@ config STM32_QSPI
this ST IP core.
config SUN4I_SPI
- bool "Allwinner A10 SoCs SPI controller"
+ bool "Allwinner SoCs SPI driver"
help
- SPI driver for Allwinner sun4i, sun5i and sun7i SoCs
+ SPI driver for Allwinner SoCs
config TEGRA114_SPI
bool "nVidia Tegra114 SPI driver"
diff --git a/drivers/spi/sun4i_spi.c b/drivers/spi/sun4i_spi.c
index 38cc743c61..7af8be15cf 100644
--- a/drivers/spi/sun4i_spi.c
+++ b/drivers/spi/sun4i_spi.c
@@ -37,6 +37,30 @@
#define SUN4I_TXDATA_REG 0x04
+#ifdef CONFIG_SUNXI_GEN_SUN6I
+#define SUN4I_CTL_REG 0x04
+#define SUN4I_CTL_ENABLE BIT(0)
+#define SUN4I_CTL_MASTER BIT(1)
+#define SUN4I_CTL_TP BIT(7)
+#define SUN4I_CTL_SRST BIT(31)
+
+#define SUN4I_CTL_CPHA BIT(0)
+#define SUN4I_CTL_CPOL BIT(1)
+#define SUN4I_CTL_CS_ACTIVE_LOW BIT(2)
+#define SUN4I_CTL_CS_MASK 0x30
+#define SUN4I_CTL_CS(cs) (((cs) << 4) & SUN4I_CTL_CS_MASK)
+#define SUN4I_CTL_CS_MANUAL BIT(6)
+#define SUN4I_CTL_CS_LEVEL BIT(7)
+#define SUN4I_CTL_DHB BIT(8)
+#define SUN4I_CTL_XCH_MASK 0x80000000
+#define SUN4I_CTL_XCH BIT(31)
+
+#define SUN4I_CTL_RF_RST BIT(15)
+#define SUN4I_CTL_TF_RST BIT(31)
+
+#else
+#define SUN4I_CTL_SRST 0
+
#define SUN4I_CTL_REG 0x08
#define SUN4I_CTL_ENABLE BIT(0)
#define SUN4I_CTL_MASTER BIT(1)
@@ -54,6 +78,7 @@
#define SUN4I_CTL_CS_MANUAL BIT(16)
#define SUN4I_CTL_CS_LEVEL BIT(17)
#define SUN4I_CTL_TP BIT(18)
+#endif
#define SUN4I_INT_CTL_REG 0x0c
#define SUN4I_INT_CTL_RF_F34 BIT(4)
@@ -92,11 +117,39 @@
#define SUN4I_SPI_DEFAULT_RATE 1000000
#define SUN4I_SPI_TIMEOUT_US 1000000
+#ifdef CONFIG_SUNXI_GEN_SUN6I
+/* sun6i spi register set */
+struct sun4i_spi_regs {
+ u32 res0;
+ u32 ctl; /* 0x04 */
+ u32 tctl; /* 0x08 */
+ u32 res1;
+ u32 intctl; /* 0x10 */
+ u32 st; /* 0x14 */
+ u32 fifo_ctl; /* 0x18 */
+ u32 fifo_sta; /* 0x1c */
+ u32 wait; /* 0x20 */
+ u32 cctl; /* 0x24 */
+ u32 res2[2];
+ u32 bc; /* 0x30 */
+ u32 tc; /* 0x34 */
+ u32 bctl; /* 0x38 */
+ u32 res3[113];
+ u32 txdata; /* 0x200 */
+ u32 res4[63];
+ u32 rxdata; /* 0x300 */
+};
+#else
/* sun4i spi register set */
struct sun4i_spi_regs {
u32 rxdata;
u32 txdata;
- u32 ctl;
+ union {
+ u32 ctl;
+ u32 tctl;
+ u32 fifo_ctl;
+ u32 bctl;
+ };
u32 intctl;
u32 st;
u32 dmactl;
@@ -106,6 +159,7 @@ struct sun4i_spi_regs {
u32 tc;
u32 fifo_sta;
};
+#endif
struct sun4i_spi_platdata {
u32 base_addr;
@@ -149,7 +203,7 @@ static void sun4i_spi_set_cs(struct udevice *bus, u8 cs, bool enable)
struct sun4i_spi_priv *priv = dev_get_priv(bus);
u32 reg;
- reg = readl(&priv->regs->ctl);
+ reg = readl(&priv->regs->tctl);
reg &= ~SUN4I_CTL_CS_MASK;
reg |= SUN4I_CTL_CS(cs);
@@ -159,7 +213,7 @@ static void sun4i_spi_set_cs(struct udevice *bus, u8 cs, bool enable)
else
reg |= SUN4I_CTL_CS_LEVEL;
- writel(reg, &priv->regs->ctl);
+ writel(reg, &priv->regs->tctl);
}
static int sun4i_spi_parse_pins(struct udevice *dev)
@@ -231,7 +285,10 @@ static int sun4i_spi_parse_pins(struct udevice *dev)
if (pin < 0)
break;
- sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SPI0);
+ if (IS_ENABLED(CONFIG_MACH_SUN50I))
+ sunxi_gpio_set_cfgpin(pin, SUN50I_GPC_SPI0);
+ else
+ sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SPI0);
sunxi_gpio_set_drv(pin, drive);
sunxi_gpio_set_pull(pin, pull);
}
@@ -244,10 +301,27 @@ static inline void sun4i_spi_enable_clock(void)
struct sunxi_ccm_reg *const ccm =
(struct sunxi_ccm_reg *const)SUNXI_CCM_BASE;
+#ifdef CONFIG_SUNXI_GEN_SUN6I
+ setbits_le32(&ccm->ahb_reset0_cfg, (1 << AHB_GATE_OFFSET_SPI0));
+#endif
+
setbits_le32(&ccm->ahb_gate0, (1 << AHB_GATE_OFFSET_SPI0));
writel((1 << 31), &ccm->spi0_clk_cfg);
}
+static inline void sun4i_spi_disable_clock(void)
+{
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *const)SUNXI_CCM_BASE;
+
+ writel(0, &ccm->spi0_clk_cfg);
+ clrbits_le32(&ccm->ahb_gate0, (1 << AHB_GATE_OFFSET_SPI0));
+
+#ifdef CONFIG_SUNXI_GEN_SUN6I
+ clrbits_le32(&ccm->ahb_reset0_cfg, (1 << AHB_GATE_OFFSET_SPI0));
+#endif
+}
+
static int sun4i_spi_ofdata_to_platdata(struct udevice *bus)
{
struct sun4i_spi_platdata *plat = dev_get_platdata(bus);
@@ -269,7 +343,6 @@ static int sun4i_spi_probe(struct udevice *bus)
struct sun4i_spi_platdata *plat = dev_get_platdata(bus);
struct sun4i_spi_priv *priv = dev_get_priv(bus);
- sun4i_spi_enable_clock();
sun4i_spi_parse_pins(bus);
priv->regs = (struct sun4i_spi_regs *)(uintptr_t)plat->base_addr;
@@ -282,9 +355,17 @@ static int sun4i_spi_claim_bus(struct udevice *dev)
{
struct sun4i_spi_priv *priv = dev_get_priv(dev->parent);
+ sun4i_spi_enable_clock();
writel(SUN4I_CTL_ENABLE | SUN4I_CTL_MASTER | SUN4I_CTL_TP |
- SUN4I_CTL_CS_MANUAL | SUN4I_CTL_CS_ACTIVE_LOW,
+ SUN4I_CTL_SRST,
&priv->regs->ctl);
+
+ if (IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I))
+ while (readl(&priv->regs->ctl) & SUN4I_CTL_SRST)
+ ;
+
+ setbits_le32(&priv->regs->tctl, SUN4I_CTL_CS_MANUAL |
+ SUN4I_CTL_CS_ACTIVE_LOW);
return 0;
}
@@ -296,6 +377,7 @@ static int sun4i_spi_release_bus(struct udevice *dev)
reg = readl(&priv->regs->ctl);
reg &= ~SUN4I_CTL_ENABLE;
writel(reg, &priv->regs->ctl);
+ sun4i_spi_disable_clock();
return 0;
}
@@ -323,10 +405,10 @@ static int sun4i_spi_xfer(struct udevice *dev, unsigned int bitlen,
if (flags & SPI_XFER_BEGIN)
sun4i_spi_set_cs(bus, slave_plat->cs, true);
- reg = readl(&priv->regs->ctl);
+ reg = readl(&priv->regs->fifo_ctl);
/* Reset FIFOs */
- writel(reg | SUN4I_CTL_RF_RST | SUN4I_CTL_TF_RST, &priv->regs->ctl);
+ writel(reg | SUN4I_CTL_RF_RST | SUN4I_CTL_TF_RST, &priv->regs->fifo_ctl);
while (len) {
/* Setup the transfer now... */
@@ -335,16 +417,18 @@ static int sun4i_spi_xfer(struct udevice *dev, unsigned int bitlen,
/* Setup the counters */
writel(SUN4I_BURST_CNT(nbytes), &priv->regs->bc);
writel(SUN4I_XMIT_CNT(nbytes), &priv->regs->tc);
+ if (IS_ENABLED(CONFIG_SUNXI_GEN_SUN6I))
+ writel(SUN4I_BURST_CNT(nbytes), &priv->regs->bctl);
/* Fill the TX FIFO */
sun4i_spi_fill_fifo(priv, nbytes);
/* Start the transfer */
- reg = readl(&priv->regs->ctl);
- writel(reg | SUN4I_CTL_XCH, &priv->regs->ctl);
+ reg = readl(&priv->regs->tctl);
+ writel(reg | SUN4I_CTL_XCH, &priv->regs->tctl);
/* Wait transfer to complete */
- ret = wait_for_bit_le32(&priv->regs->ctl, SUN4I_CTL_XCH_MASK,
+ ret = wait_for_bit_le32(&priv->regs->tctl, SUN4I_CTL_XCH_MASK,
false, SUN4I_SPI_TIMEOUT_US, false);
if (ret) {
printf("ERROR: sun4i_spi: Timeout transferring data\n");
@@ -417,7 +501,7 @@ static int sun4i_spi_set_mode(struct udevice *dev, uint mode)
struct sun4i_spi_priv *priv = dev_get_priv(dev);
u32 reg;
- reg = readl(&priv->regs->ctl);
+ reg = readl(&priv->regs->tctl);
reg &= ~(SUN4I_CTL_CPOL | SUN4I_CTL_CPHA);
if (mode & SPI_CPOL)
@@ -427,7 +511,7 @@ static int sun4i_spi_set_mode(struct udevice *dev, uint mode)
reg |= SUN4I_CTL_CPHA;
priv->mode = mode;
- writel(reg, &priv->regs->ctl);
+ writel(reg, &priv->regs->tctl);
return 0;
}
@@ -441,7 +525,13 @@ static const struct dm_spi_ops sun4i_spi_ops = {
};
static const struct udevice_id sun4i_spi_ids[] = {
+#ifndef CONFIG_SUNXI_GEN_SUN6I
{ .compatible = "allwinner,sun4i-a10-spi" },
+#else
+ { .compatible = "allwinner,sun6i-a31-spi" },
+ { .compatible = "allwinner,sun8i-h3-spi" },
+ { .compatible = "allwinner,sun50i-a64-spi" },
+#endif
{ }
};

34
patch/u-boot/u-boot-sun50iw2/enable-autoboot-keyed.patch
View File

@ -1,34 +0,0 @@
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 53eae8953e..1e931a0eb0 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -843,6 +843,8 @@ config ARCH_SUNXI
select USB_KEYBOARD if DISTRO_DEFAULTS
select USB_STORAGE if DISTRO_DEFAULTS
select USE_TINY_PRINTF
+ imply AUTOBOOT_KEYED
+ imply AUTOBOOT_KEYED_CTRLC
imply CMD_DM
imply CMD_GPT
imply CMD_UBI if NAND
diff --git a/cmd/Kconfig b/cmd/Kconfig
index d6d130edfa..46ed3a9d76 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -51,7 +51,7 @@ config AUTOBOOT_KEYED
config AUTOBOOT_PROMPT
string "Autoboot stop prompt"
depends on AUTOBOOT_KEYED
- default "Autoboot in %d seconds\\n"
+ default "Autoboot in %d seconds, press <Space> to stop\\n"
help
This string is displayed before the boot delay selected by
CONFIG_BOOTDELAY starts. If it is not defined there is no
@@ -84,6 +84,7 @@ config AUTOBOOT_DELAY_STR
config AUTOBOOT_STOP_STR
string "Stop autobooting via specific input key / string"
depends on AUTOBOOT_KEYED && !AUTOBOOT_ENCRYPTION
+ default " "
help
This option enables stopping (aborting) of the automatic
boot feature only by issuing a specific input key or

65
patch/u-boot/u-boot-sun50iw2/sunxi-boot-splash.patch
View File

@ -1,65 +0,0 @@
diff --git a/cmd/Kconfig b/cmd/Kconfig
index d6d130edfa..92795119ea 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1029,6 +1029,7 @@ menu "Misc commands"
config CMD_BMP
bool "Enable 'bmp' command"
depends on LCD || DM_VIDEO || VIDEO
+ default y
help
This provides a way to obtain information about a BMP-format iamge
and to display it. BMP (which presumably stands for BitMaP) is a
diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
index 9ed6b9892c..75d5176edf 100644
--- a/include/config_distro_bootcmd.h
+++ b/include/config_distro_bootcmd.h
@@ -323,6 +323,15 @@
BOOTENV_SHARED_UBIFS \
BOOTENV_SHARED_EFI \
"boot_prefixes=/ /boot/\0" \
+ "splashpos=m,m\0" \
+ "splashimage=66000000\0" \
+ "loadsplash= " \
+ "for prefix in ${boot_prefixes}; do " \
+ "if test -e mmc 0 ${prefix}boot.bmp; then " \
+ "load mmc 0 ${splashimage} ${prefix}boot.bmp; " \
+ "bmp d ${splashimage}; " \
+ "fi; " \
+ "done\0" \
"boot_scripts=boot.scr.uimg boot.scr\0" \
"boot_script_dhcp=boot.scr.uimg\0" \
BOOTENV_BOOT_TARGETS \
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 02d7be0849..cbdea20d08 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -284,6 +284,16 @@ extern int soft_i2c_gpio_scl;
#endif /* CONFIG_VIDEO */
+#if defined CONFIG_VIDEO || defined CONFIG_DM_VIDEO
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_SPLASH_SCREEN_ALIGN
+#define CONFIG_BMP_16BPP
+#define CONFIG_BMP_24BPP
+#define CONFIG_BMP_32BPP
+#define CONFIG_VIDEO_BMP_RLE8
+#endif
+
/* Ethernet support */
#ifdef CONFIG_SUNXI_EMAC
#define CONFIG_PHY_ADDR 1
@@ -442,6 +442,11 @@ extern int soft_i2c_gpio_scl;
#define CONSOLE_STDIN_SETTINGS \
"preboot=usb start\0" \
"stdin=serial,usbkbd\0"
+#if defined CONFIG_VIDEO || defined CONFIG_DM_VIDEO
+#define CONSOLE_STDIN_SETTINGS \
+ "preboot=run loadsplash; usb start\0" \
+ "stdin=serial,usbkbd\0"
+#endif
#else
#define CONSOLE_STDIN_SETTINGS \
"stdin=serial\0"

32
patch/u-boot/u-boot-sun50iw6/add-emac-opioneplus.patch
View File

@ -1,32 +0,0 @@
diff --git a/arch/arm/dts/sun50i-h6-orangepi-one-plus.dts b/arch/arm/dts/sun50i-h6-orangepi-one-plus.dts
index 12e1756..05b4875 100644
--- a/arch/arm/dts/sun50i-h6-orangepi-one-plus.dts
+++ b/arch/arm/dts/sun50i-h6-orangepi-one-plus.dts
@@ -9,4 +9,27 @@
/ {
model = "OrangePi One Plus";
compatible = "xunlong,orangepi-one-plus", "allwinner,sun50i-h6";
+
+ aliases {
+ serial0 = &uart0;
+ ethernet0 = &emac;
+ };
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ext_rgmii_pins>;
+ phy-mode = "rgmii";
+ phy-handle = <&ext_rgmii_phy>;
+ phy-supply = <&reg_aldo2>;
+ allwinner,rx-delay-ps = <200>;
+ allwinner,tx-delay-ps = <200>;
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
};

37
patch/u-boot/u-boot-sun50iw6/add-emac-pineh64.patch-disabled
View File

@ -1,37 +0,0 @@
diff --git a/arch/arm/dts/sun50i-h6-pine-h64.dts b/arch/arm/dts/sun50i-h6-pine-h64.dts
index ceffc40..00d5a2f 100644
--- a/arch/arm/dts/sun50i-h6-pine-h64.dts
+++ b/arch/arm/dts/sun50i-h6-pine-h64.dts
@@ -15,6 +15,7 @@
aliases {
serial0 = &uart0;
+ ethernet0 = &emac;
};
chosen {
@@ -41,6 +42,24 @@
};
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ext_rgmii_pins>;
+ phy-mode = "rgmii";
+ phy-handle = <&ext_rgmii_phy>;
+ phy-supply = <&reg_aldo2>;
+ allwinner,rx-delay-ps = <200>;
+ allwinner,tx-delay-ps = <200>;
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;

90
patch/u-boot/u-boot-sun50iw6/add-h6-syscon+emac.patch-disabled
View File

@ -1,90 +0,0 @@
diff --git a/arch/arm/dts/sun50i-h6.dtsi b/arch/arm/dts/sun50i-h6.dtsi
index cfa5fff..c4c7f07 100644
--- a/arch/arm/dts/sun50i-h6.dtsi
+++ b/arch/arm/dts/sun50i-h6.dtsi
@@ -92,6 +92,43 @@
#size-cells = <1>;
ranges;
+ syscon: syscon@3000000 {
+ compatible = "allwinner,sun50i-h6-system-control",
+ "allwinner,sun50i-a64-system-control";
+ reg = <0x03000000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ sram_c: sram@28000 {
+ compatible = "mmio-sram";
+ reg = <0x00028000 0x1e000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x00028000 0x1e000>;
+
+ de2_sram: sram-section@0 {
+ compatible = "allwinner,sun50i-h6-sram-c",
+ "allwinner,sun50i-a64-sram-c";
+ reg = <0x0000 0x1e000>;
+ };
+ };
+
+ sram_c1: sram@1a00000 {
+ compatible = "mmio-sram";
+ reg = <0x01a00000 0x200000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x01a00000 0x200000>;
+
+ ve_sram: sram-section@0 {
+ compatible = "allwinner,sun50i-h6-sram-c1",
+ "allwinner,sun4i-a10-sram-c1";
+ reg = <0x000000 0x200000>;
+ };
+ };
+ };
+
ccu: clock@3001000 {
compatible = "allwinner,sun50i-h6-ccu";
reg = <0x03001000 0x1000>;
@@ -101,6 +138,26 @@
#reset-cells = <1>;
};
+ emac: ethernet@5020000 {
+ compatible = "allwinner,sun50i-h6-emac",
+ "allwinner,sun50i-a64-emac";
+ syscon = <&syscon>;
+ reg = <0x05020000 0x10000>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ resets = <&ccu RST_BUS_EMAC>;
+ reset-names = "stmmaceth";
+ clocks = <&ccu CLK_BUS_EMAC>;
+ clock-names = "stmmaceth";
+ status = "disabled";
+
+ mdio: mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
gic: interrupt-controller@3021000 {
compatible = "arm,gic-400";
reg = <0x03021000 0x1000>,
@@ -126,6 +183,14 @@
interrupt-controller;
#interrupt-cells = <3>;
+ ext_rgmii_pins: rgmii_pins {
+ pins = "PD0", "PD1", "PD2", "PD3", "PD4",
+ "PD5", "PD7", "PD8", "PD9", "PD10",
+ "PD11", "PD12", "PD13", "PD19", "PD20";
+ function = "emac";
+ drive-strength = <40>;
+ };
+
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";

190
patch/u-boot/u-boot-sun50iw6/add-orangepilite_2.patch
View File

@ -1,190 +0,0 @@
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 89032bb..2309a6d 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -392,6 +392,7 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-orangepi-zero-plus2.dtb
dtb-$(CONFIG_MACH_SUN50I_H6) += \
sun50i-h6-orangepi-one-plus.dtb \
+ sun50i-h6-orangepi-lite2.dtb \
sun50i-h6-pine-h64.dtb
dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-amarula-relic.dtb \
diff --git a/arch/arm/dts/sun50i-h6-orangepi-lite2.dts b/arch/arm/dts/sun50i-h6-orangepi-lite2.dts
new file mode 100644
index 0000000..a1fa1a7
--- /dev/null
+++ b/arch/arm/dts/sun50i-h6-orangepi-lite2.dts
@@ -0,0 +1,150 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2018 Amarula Solutions
+ * Author: Jagan Teki <jagan@amarulasolutions.com>
+ */
+
+/dts-v1/;
+
+#include "sun50i-h6.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "OrangePi Lite 2";
+ compatible = "xunlong,orangepi-lite2", "allwinner,sun50i-h6";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ vmmc-supply = <&reg_cldo1>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
+ bus-width = <4>;
+ status = "okay";
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp805: pmic@36 {
+ compatible = "x-powers,axp805", "x-powers,axp806";
+ reg = <0x36>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ x-powers,self-working-mode;
+
+ regulators {
+ reg_aldo1: aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pl";
+ };
+
+ reg_aldo2: aldo2 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-ac200";
+ };
+
+ reg_aldo3: aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc25-dram";
+ };
+
+ reg_bldo1: bldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-bias-pll";
+ };
+
+ reg_bldo2: bldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-efuse-pcie-hdmi-io";
+ };
+
+ reg_bldo3: bldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-dcxoio";
+ };
+
+ bldo4 {
+ /* unused */
+ };
+
+ reg_cldo1: cldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+ };
+
+ reg_cldo2: cldo2 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-1";
+ };
+
+ reg_cldo3: cldo3 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-2";
+ };
+
+ reg_dcdca: dcdca {
+ regulator-always-on;
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <1080000>;
+ regulator-name = "vdd-cpu";
+ };
+
+ reg_dcdcc: dcdcc {
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <1080000>;
+ regulator-name = "vdd-gpu";
+ };
+
+ reg_dcdcd: dcdcd {
+ regulator-always-on;
+ regulator-min-microvolt = <960000>;
+ regulator-max-microvolt = <960000>;
+ regulator-name = "vdd-sys";
+ };
+
+ reg_dcdce: dcdce {
+ regulator-always-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vcc-dram";
+ };
+
+ sw {
+ /* unused */
+ };
+ };
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_ph_pins>;
+ status = "okay";
+};
diff --git a/configs/orangepi_lite2_defconfig b/configs/orangepi_lite2_defconfig
index 13db9a7..030e865 100644
--- /dev/null
+++ b/configs/orangepi_lite2_defconfig
@@ -0,0 +1,17 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN50I_H6=y
+CONFIG_SUNXI_DRAM_H6_LPDDR3=y
+CONFIG_SUNXI_DRAM_DDR3=n
+CONFIG_DRAM_ODT_EN=y
+CONFIG_MMC0_CD_PIN="PF6"
+CONFIG_HDMI_DDC_EN="PH2"
+# CONFIG_PSCI_RESET is not set
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-lite2"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set

4
patch/u-boot/u-boot-sunxi/add-a20-optional-eMMC.patch
View File

@ -5,14 +5,14 @@ index ef95ac6a5e..7565786648 100644
@@ -19,3 +19,4 @@ CONFIG_SUN7I_GMAC=y
CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig
index f9f73fdb23..ecb4f2f24e 100644
--- a/configs/Cubietruck_defconfig
+++ b/configs/Cubietruck_defconfig
@@ -30,3 +30,4 @@ CONFIG_SCSI=y
CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2

4
patch/u-boot/u-boot-sunxi/add-a64-orangepiwinplus-emmc-support.patch
View File

@ -59,9 +59,9 @@ index 2839503..5b0780d 100644
@@ -1,6 +1,8 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL=y
+CONFIG_MMC0_CD_PIN="PH13"
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_SPL=y
CONFIG_MACH_SUN50I=y
CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
CONFIG_MACPWR="PD14"

8
patch/u-boot/u-boot-sunxi/add-emmc_support_to_neo1_and_2.patch
View File

@ -1,24 +1,20 @@
diff --git a/configs/nanopi_neo2_defconfig b/configs/nanopi_neo2_defconfig
old mode 100644
new mode 100644
index fc3465a..a885a85
--- a/configs/nanopi_neo2_defconfig
+++ b/configs/nanopi_neo2_defconfig
@@ -14,3 +14,4 @@ CONFIG_SPL=y
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
\ No newline at end of file
diff --git a/configs/nanopi_neo_defconfig b/configs/nanopi_neo_defconfig
old mode 100644
new mode 100644
index f87148c..9c8689b
--- a/configs/nanopi_neo_defconfig
+++ b/configs/nanopi_neo_defconfig
@@ -18,3 +18,4 @@ CONFIG_SYS_CLK_FREQ=480000000
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
\ No newline at end of file

6
patch/u-boot/u-boot-sunxi/add-nanopi-air-emmc.patch
View File

@ -30,8 +30,8 @@ diff --git a/configs/nanopi_neo_air_defconfig b/configs/nanopi_neo_air_defconfig
index 11eb3ab13b..9f83068dd7 100644
--- a/configs/nanopi_neo_air_defconfig
+++ b/configs/nanopi_neo_air_defconfig
@@ -16,3 +16,4 @@ CONFIG_SPL=y
# CONFIG_SPL_EFI_PARTITION is not set
@@ -16,3 +16,4 @@ CONFIG_CONSOLE_MUX=y
CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-neo-air"
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2

2
patch/u-boot/u-boot-sunxi/add-nanopi-duo.patch
View File

@ -133,7 +133,7 @@ index 0000000..6280346
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+

6
patch/u-boot/u-boot-sunxi/add-nanopi-m1-plus2-emmc.patch
View File

@ -123,7 +123,7 @@ index 0000000..fdf2c87
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
@ -163,9 +163,9 @@ index d36447d..49a94d7 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -388,6 +389,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
sun8i-v3s-licheepi-zero.dtb
dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-libretech-all-h3-cc.dtb \
sun50i-h5-libretech-all-h3-it.dtb \
sun50i-h5-libretech-all-h5-cc.dtb \
+ sun50i-h5-nanopi-m1-plus2.dtb \
sun50i-h5-nanopi-neo2.dtb \
sun50i-h5-nanopi-neo-plus2.dtb \

2
patch/u-boot/u-boot-sunxi/add-nanopi-r1-and-duo2.patch
View File

@ -269,7 +269,7 @@ index 0000000..b6afe20
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+

2
patch/u-boot/u-boot-sunxi/add-orangepi-plus2-emmc.patch
View File

@ -5,5 +5,5 @@ index 7c9cc454c3..2642239c6a 100644
@@ -20,3 +20,4 @@ CONFIG_SUN8I_EMAC=y
CONFIG_SY8106A_POWER=y
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2

2
patch/u-boot/u-boot-sunxi/add-orangepi-zeroplus2_h3.patch
View File

@ -182,7 +182,7 @@ index 0000000000..b03e3a51a2
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+

0
patch/u-boot/u-boot-sun50iw6/add-orangepi3.patch → patch/u-boot/u-boot-sunxi/add-orangepi3.patch
View File

2
patch/u-boot/u-boot-sun50iw6/add-pineh64-model-b.patch → patch/u-boot/u-boot-sunxi/add-pineh64-model-b.patch
View File

@ -35,9 +35,9 @@ index 7a791cba..e74adc94 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -525,7 +525,8 @@ dtb-$(CONFIG_MACH_SUN50I_H6) += \
sun50i-h6-beelink-gs1.dtb \
sun50i-h6-orangepi-lite2.dtb \
sun50i-h6-orangepi-one-plus.dtb \
sun50i-h6-orangepi-lite2.dtb \
- sun50i-h6-pine-h64.dtb
+ sun50i-h6-pine-h64.dtb \
+ sun50i-h6-pine-h64-model-b.dtb

2
patch/u-boot/u-boot-sunxi/add-sunvell-r69.patch
View File

@ -232,7 +232,7 @@ index 0000000..4c5ba85
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+

41
patch/u-boot/u-boot-sunxi/add-teres.patch
View File

@ -1,41 +0,0 @@
diff --git a/configs/teres_i_defconfig b/configs/teres_i_defconfig
new file mode 100644
index 0000000000..da33b4131d
--- /dev/null
+++ b/configs/teres_i_defconfig
@@ -0,0 +1,35 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN50I=y
+CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
+CONFIG_DRAM_CLK=552
+CONFIG_DRAM_ZQ=3881949
+CONFIG_DRAM_ODT_EN=y
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-teres-i"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
+CONFIG_SPL_ATF_SUPPORT=y
+CONFIG_SPL_ATF_TEXT_BASE=0x44000
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+CONFIG_CMD_I2C=y
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_DM_I2C_GPIO=y
+# CONFIG_SPL_SPI_SUNXI is not set
+CONFIG_DM_REGULATOR=y
+CONFIG_AXP_DLDO2_VOLT=2500
+CONFIG_AXP_DLDO3_VOLT=1200
+CONFIG_AXP_SW_ON=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_SUNXI=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
+CONFIG_VIDEO_BRIDGE=y
+CONFIG_VIDEO_BRIDGE_ANALOGIX_ANX6345=y

2
patch/u-boot/u-boot-sunxi/add-xx-boot-auto-dt-select-neo2.patch
View File

@ -95,7 +95,7 @@ index 78d587f..ca8a842 100755
@@ -12,4 +12,5 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi-neo2"
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
CONFIG_USB_OHCI_HCD=y
-CONFIG_MMC_SUNXI_SLOT_EXTRA=2
\ No newline at end of file
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2

2
patch/u-boot/u-boot-sunxi/add-xx-nanopi-k1-plus-emmc.patch
View File

@ -109,7 +109,7 @@ index 0000000..c08af78
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+

4
patch/u-boot/u-boot-sunxi/add-xx-nanopineocore2.patch
View File

@ -1,6 +1,4 @@
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
old mode 100644
new mode 100755
index d36447d..7311063
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@ -127,7 +125,7 @@ index 0000000..dd25549
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+

8
patch/u-boot/u-boot-sunxi/adjust-default-dram-clockspeeds.patch
View File

@ -279,9 +279,9 @@ index 8a3561b..37f827a 100644
@@ -7,6 +7,8 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino"
+CONFIG_DRAM_CLK=624
+CONFIG_DRAM_ZQ=3881949
# CONFIG_CMD_FLASH is not set
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y

20
patch/u-boot/u-boot-sunxi/adjust-small-boards-cpufreq.patch
View File

@ -6,9 +6,9 @@ index ed30708f90..f87148c7e6 100644
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_CONSOLE_MUX=y
+CONFIG_SYS_CLK_FREQ=480000000
# CONFIG_CMD_FLASH is not set
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-neo"
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/nanopi_neo_air_defconfig b/configs/nanopi_neo_air_defconfig
index 11eb3ab13b..d8f3f75192 100644
--- a/configs/nanopi_neo_air_defconfig
@ -17,18 +17,18 @@ index 11eb3ab13b..d8f3f75192 100644
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_CONSOLE_MUX=y
+CONFIG_SYS_CLK_FREQ=480000000
# CONFIG_CMD_FLASH is not set
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-neo-air"
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
diff --git a/configs/orangepi_zero_defconfig b/configs/orangepi_zero_defconfig
index f8dda05..739a5f4 100644
--- a/configs/orangepi_zero_defconfig
+++ b/configs/orangepi_zero_defconfig
@@ -9,6 +9,7 @@ CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_USE_PREBOOT=y
CONFIG_CONSOLE_MUX=y
+CONFIG_SYS_CLK_FREQ=480000000
CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-orangepi-zero"
+CONFIG_SYS_CLK_FREQ=480000000
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y

6
patch/u-boot/u-boot-sunxi/enable-autoboot-keyed.patch
View File

@ -5,12 +5,12 @@ index 53eae8953e..1e931a0eb0 100644
@@ -843,6 +843,8 @@ config ARCH_SUNXI
select USB_KEYBOARD if DISTRO_DEFAULTS
select USB_STORAGE if DISTRO_DEFAULTS
select USE_TINY_PRINTF
select SPL_USE_TINY_PRINTF
+ imply AUTOBOOT_KEYED
+ imply AUTOBOOT_KEYED_CTRLC
select USE_PREBOOT
select SYS_RELOC_GD_ENV_ADDR
imply CMD_DM
imply CMD_GPT
imply CMD_UBI if NAND
diff --git a/cmd/Kconfig b/cmd/Kconfig
index d6d130edfa..46ed3a9d76 100644
--- a/cmd/Kconfig

2
patch/u-boot/u-boot-sunxi/enable-r_pio-gpio-access-h3-h5.patch
View File

@ -19,6 +19,6 @@ index 7ac8360..0484e7a 100644
+ prcm_apb0_enable(PRCM_APB0_GATE_PIO);
+#endif
+
__maybe_unused uint val;
#if CONFIG_CONS_INDEX == 1 && defined(CONFIG_UART0_PORT_F)
#if defined(CONFIG_MACH_SUN4I) || \
defined(CONFIG_MACH_SUN7I) || \

12
patch/u-boot/u-boot-sunxi/fix-missing-clock-cells-in-rtc-sunxi-h3-h5.patch
View File

@ -1,12 +0,0 @@
diff --git a/arch/arm/dts/sunxi-h3-h5.dtsi b/arch/arm/dts/sunxi-h3-h5.dtsi
index fc61313..8340dd9 100644
--- a/arch/arm/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/dts/sunxi-h3-h5.dtsi
@@ -793,6 +793,7 @@
reg = <0x01f00000 0x54>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+ #clock-cells = <1>;
};
r_ccu: clock@1f01400 {

6
patch/u-boot/u-boot-sunxi/fix-usb1-vbus-opiwin.patch
View File

@ -5,15 +5,15 @@ index ab889ea..61c24ba
--- a/configs/orangepi_win_defconfig
+++ b/configs/orangepi_win_defconfig
@@ -10,6 +10,9 @@ CONFIG_NR_DRAM_BANKS=1
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-orangepi-win"
CONFIG_PHY_REALTEK=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_USB1_VBUS_PIN="PD7"
+CONFIG_USB_HOST=y
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
CONFIG_USB_OHCI_HCD=y
diff --git a/arch/arm/dts/sun50i-a64-orangepi-win.dts b/arch/arm/dts/sun50i-a64-orangepi-win.dts
index cf76c35..a7d36a5 100644
--- a/arch/arm/dts/sun50i-a64-orangepi-win.dts

2
patch/u-boot/u-boot-sunxi/h3-Fix-PLL1-setup-to-never-use-dividers.patch
View File

@ -21,7 +21,7 @@ index 50fb302a19..91aa2a0478 100644
- k = 2;
- } else if (clk > 768000000) {
+ if (clk >= 1368000000) {
k = 3;
k = 4;
- m = 2;
+ } else if (clk >= 768000000) {
+ k = 2;

355
patch/u-boot/u-boot-sunxi/xxx-disable-de2-to-improve-edid-detection.patch Normal file
View File

@ -0,0 +1,355 @@
This patch disables display driver in u-boot which improves EDID detection
https://forum.armbian.com/topic/13651-pine-a64-no-hdmi-signal/?do=findComment&comment=99169
diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig
index e3d67670..2f9874ee 100644
--- a/configs/Bananapi_M2_Ultra_defconfig
+++ b/configs/Bananapi_M2_Ultra_defconfig
@@ -20,3 +20,4 @@ CONFIG_AXP_ELDO3_VOLT=1200
CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig
index 656a0e1d..0fc91ff4 100644
--- a/configs/Bananapi_defconfig
+++ b/configs/Bananapi_defconfig
@@ -19,3 +19,4 @@ CONFIG_SUN7I_GMAC=y
CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/Bananapi_m2m_defconfig b/configs/Bananapi_m2m_defconfig
index 2649c7e8..331a7573 100644
--- a/configs/Bananapi_m2m_defconfig
+++ b/configs/Bananapi_m2m_defconfig
@@ -16,3 +16,4 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_USB_FUNCTION_MASS_STORAGE=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig
index cc6906a6..5ddcdf93 100644
--- a/configs/Cubieboard2_defconfig
+++ b/configs/Cubieboard2_defconfig
@@ -17,3 +17,4 @@ CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+CONFIG_VIDEO_DE2=n
diff --git a/configs/Cubieboard_defconfig b/configs/Cubieboard_defconfig
index 17b0a758..eb6d29c9 100644
--- a/configs/Cubieboard_defconfig
+++ b/configs/Cubieboard_defconfig
@@ -15,3 +15,4 @@ CONFIG_SUN4I_EMAC=y
CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig
index b7287d43..dba75bc0 100644
--- a/configs/Cubietruck_defconfig
+++ b/configs/Cubietruck_defconfig
@@ -29,3 +29,4 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+CONFIG_VIDEO_DE2=n
diff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig
index 20906ff5..aaebbdc9 100644
--- a/configs/Mele_A1000_defconfig
+++ b/configs/Mele_A1000_defconfig
@@ -15,3 +15,4 @@ CONFIG_SUN4I_EMAC=y
CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig
index 6c3c9cbc..498493f4 100644
--- a/configs/Orangepi_mini_defconfig
+++ b/configs/Orangepi_mini_defconfig
@@ -23,3 +23,4 @@ CONFIG_SUN7I_GMAC=y
CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/a64-olinuxino-emmc_defconfig b/configs/a64-olinuxino-emmc_defconfig
index 08687cb6..c0f619fa 100644
--- a/configs/a64-olinuxino-emmc_defconfig
+++ b/configs/a64-olinuxino-emmc_defconfig
@@ -10,3 +10,4 @@ CONFIG_SUN8I_EMAC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/a64-olinuxino_defconfig b/configs/a64-olinuxino_defconfig
index cb270cd7..546a4e34 100644
--- a/configs/a64-olinuxino_defconfig
+++ b/configs/a64-olinuxino_defconfig
@@ -13,3 +13,4 @@ CONFIG_DRAM_ZQ=3881949
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/bananapi_m1_plus_defconfig b/configs/bananapi_m1_plus_defconfig
index 3813b6e8..32adeb8f 100644
--- a/configs/bananapi_m1_plus_defconfig
+++ b/configs/bananapi_m1_plus_defconfig
@@ -19,3 +19,4 @@ CONFIG_SUN7I_GMAC=y
CONFIG_SCSI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/bananapi_m2_plus_h3_defconfig b/configs/bananapi_m2_plus_h3_defconfig
index 21c6aa6b..305ababf 100644
--- a/configs/bananapi_m2_plus_h3_defconfig
+++ b/configs/bananapi_m2_plus_h3_defconfig
@@ -11,3 +11,4 @@ CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_MUSB_GADGET=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/bananapi_m2_plus_h5_defconfig b/configs/bananapi_m2_plus_h5_defconfig
index afed1372..8b9b07cd 100644
--- a/configs/bananapi_m2_plus_h5_defconfig
+++ b/configs/bananapi_m2_plus_h5_defconfig
@@ -11,3 +11,4 @@ CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_MUSB_GADGET=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/bananapi_m2_zero_defconfig b/configs/bananapi_m2_zero_defconfig
index f95c7faf..cd5f43d1 100644
--- a/configs/bananapi_m2_zero_defconfig
+++ b/configs/bananapi_m2_zero_defconfig
@@ -6,3 +6,4 @@ CONFIG_DRAM_CLK=408
CONFIG_MMC0_CD_PIN=""
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-bananapi-m2-zero"
+CONFIG_VIDEO_DE2=n
diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig
index 7f31cf00..221bea67 100644
--- a/configs/bananapi_m64_defconfig
+++ b/configs/bananapi_m64_defconfig
@@ -11,3 +11,4 @@ CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_MUSB_GADGET=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/beelink_x2_defconfig b/configs/beelink_x2_defconfig
index f436ab1d..45355dc3 100644
--- a/configs/beelink_x2_defconfig
+++ b/configs/beelink_x2_defconfig
@@ -20,3 +20,4 @@ CONFIG_SUN8I_EMAC=y
CONFIG_SY8106A_POWER=y
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/libretech_all_h3_cc_h2_plus_defconfig b/configs/libretech_all_h3_cc_h2_plus_defconfig
index c9a1708e..88035625 100644
--- a/configs/libretech_all_h3_cc_h2_plus_defconfig
+++ b/configs/libretech_all_h3_cc_h2_plus_defconfig
@@ -9,3 +9,4 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-libretech-all-h3-cc"
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/libretech_all_h3_cc_h3_defconfig b/configs/libretech_all_h3_cc_h3_defconfig
index 71751238..2be17032 100644
--- a/configs/libretech_all_h3_cc_h3_defconfig
+++ b/configs/libretech_all_h3_cc_h3_defconfig
@@ -9,3 +9,4 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-libretech-all-h3-cc"
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/libretech_all_h3_cc_h5_defconfig b/configs/libretech_all_h3_cc_h5_defconfig
index b70b13f4..5e1e3e5a 100644
--- a/configs/libretech_all_h3_cc_h5_defconfig
+++ b/configs/libretech_all_h3_cc_h5_defconfig
@@ -9,3 +9,4 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-libretech-all-h3-cc"
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/libretech_all_h5_cc_h5_defconfig b/configs/libretech_all_h5_cc_h5_defconfig
index ddbd1b51..00275ca4 100644
--- a/configs/libretech_all_h5_cc_h5_defconfig
+++ b/configs/libretech_all_h5_cc_h5_defconfig
@@ -14,3 +14,4 @@ CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/nanopi_a64_defconfig b/configs/nanopi_a64_defconfig
index 0d46b332..9485f2b2 100644
--- a/configs/nanopi_a64_defconfig
+++ b/configs/nanopi_a64_defconfig
@@ -8,3 +8,4 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-nanopi-a64"
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/nanopi_k1_plus_defconfig b/configs/nanopi_k1_plus_defconfig
index 670c3c77..bcbc8da2 100644
--- a/configs/nanopi_k1_plus_defconfig
+++ b/configs/nanopi_k1_plus_defconfig
@@ -21,3 +21,4 @@ CONFIG_SPL_SPI_SUNXI=y
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/nanopi_m1_defconfig b/configs/nanopi_m1_defconfig
index 2b55853b..bfc0c772 100644
--- a/configs/nanopi_m1_defconfig
+++ b/configs/nanopi_m1_defconfig
@@ -7,3 +7,4 @@ CONFIG_DRAM_CLK=408
CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-m1"
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/nanopi_m1_plus2_defconfig b/configs/nanopi_m1_plus2_defconfig
index ea271871..99687477 100644
--- a/configs/nanopi_m1_plus2_defconfig
+++ b/configs/nanopi_m1_plus2_defconfig
@@ -20,3 +20,4 @@ CONFIG_SPL_SPI_SUNXI=y
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/orangepi_2_defconfig b/configs/orangepi_2_defconfig
index b39da42f..840e47de 100644
--- a/configs/orangepi_2_defconfig
+++ b/configs/orangepi_2_defconfig
@@ -13,3 +13,4 @@ CONFIG_SY8106A_POWER=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+CONFIG_VIDEO_DE2=n
diff --git a/configs/orangepi_lite2_defconfig b/configs/orangepi_lite2_defconfig
index 35ebf383..2e120864 100644
--- a/configs/orangepi_lite2_defconfig
+++ b/configs/orangepi_lite2_defconfig
@@ -9,3 +9,4 @@ CONFIG_MMC0_CD_PIN="PF6"
CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-lite2"
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/orangepi_lite_defconfig b/configs/orangepi_lite_defconfig
index 4ec08283..36dce695 100644
--- a/configs/orangepi_lite_defconfig
+++ b/configs/orangepi_lite_defconfig
@@ -9,3 +9,4 @@ CONFIG_DRAM_ODT_EN=y
CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-lite"
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/orangepi_one_defconfig b/configs/orangepi_one_defconfig
index 4b089bef..b0a6ba4a 100644
--- a/configs/orangepi_one_defconfig
+++ b/configs/orangepi_one_defconfig
@@ -10,3 +10,4 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-one"
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/orangepi_one_plus_defconfig b/configs/orangepi_one_plus_defconfig
index d97b2172..e75684ab 100644
--- a/configs/orangepi_one_plus_defconfig
+++ b/configs/orangepi_one_plus_defconfig
@@ -9,3 +9,4 @@ CONFIG_MMC0_CD_PIN="PF6"
CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-one-plus"
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig
index 9bb232c6..a2d131cc 100644
--- a/configs/orangepi_pc2_defconfig
+++ b/configs/orangepi_pc2_defconfig
@@ -14,3 +14,4 @@ CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_MUSB_GADGET=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/orangepi_pc_defconfig b/configs/orangepi_pc_defconfig
index a676294a..aaf5f5ef 100644
--- a/configs/orangepi_pc_defconfig
+++ b/configs/orangepi_pc_defconfig
@@ -10,3 +10,4 @@ CONFIG_SUN8I_EMAC=y
CONFIG_SY8106A_POWER=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/orangepi_plus2e_defconfig b/configs/orangepi_plus2e_defconfig
index 2bf1cddd..9d7de7e7 100644
--- a/configs/orangepi_plus2e_defconfig
+++ b/configs/orangepi_plus2e_defconfig
@@ -14,3 +14,4 @@ CONFIG_SUN8I_EMAC=y
CONFIG_SY8106A_POWER=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig
index 96a7d50b..7d465531 100644
--- a/configs/orangepi_plus_defconfig
+++ b/configs/orangepi_plus_defconfig
@@ -16,3 +16,4 @@ CONFIG_SUN8I_EMAC=y
CONFIG_SY8106A_POWER=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/orangepi_prime_defconfig b/configs/orangepi_prime_defconfig
index 83dee0d9..a2e9cf09 100644
--- a/configs/orangepi_prime_defconfig
+++ b/configs/orangepi_prime_defconfig
@@ -14,3 +14,4 @@ CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_MUSB_GADGET=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/orangepi_win_defconfig b/configs/orangepi_win_defconfig
index 8c14389f..7508bed6 100644
--- a/configs/orangepi_win_defconfig
+++ b/configs/orangepi_win_defconfig
@@ -16,3 +16,4 @@ CONFIG_USB_HOST=y
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/pine64-lts_defconfig b/configs/pine64-lts_defconfig
index ef108a1a..41b8d3ad 100644
--- a/configs/pine64-lts_defconfig
+++ b/configs/pine64-lts_defconfig
@@ -13,3 +13,4 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-lts"
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/pine64_plus_defconfig b/configs/pine64_plus_defconfig
index a0375770..5aafc17b 100644
--- a/configs/pine64_plus_defconfig
+++ b/configs/pine64_plus_defconfig
@@ -12,3 +12,4 @@ CONFIG_RTL8211E_PINE64_GIGABIT_FIX=y
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/pine_h64_defconfig b/configs/pine_h64_defconfig
index cb5e624a..94891f75 100644
--- a/configs/pine_h64_defconfig
+++ b/configs/pine_h64_defconfig
@@ -12,3 +12,4 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-pine-h64"
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_SPL_SPI_SUNXI=y
+CONFIG_VIDEO_DE2=n
diff --git a/configs/sunvell_r69_defconfig b/configs/sunvell_r69_defconfig
index d03dcec8..f1fc8f12 100644
--- a/configs/sunvell_r69_defconfig
+++ b/configs/sunvell_r69_defconfig
@@ -17,4 +17,4 @@ CONFIG_USB_OHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_SYS_CLK_FREQ=480000000
-
+CONFIG_VIDEO_DE2=n