Sunxi 6.1 (#4669)
* sunxi-6.1: Remove pre-applied patches for v6.1.4 * sunxi-6.1: switch to v6.1.4 tag
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@ -23,7 +23,7 @@ case $BRANCH in
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edge)
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KERNEL_VERSION_LEVEL=${KERNEL_VERSION_LEVEL:-6.1}
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KERNELSWITCHOBJ=${KERNELSWITCHOBJ:-'tag=v6.1.2'}
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KERNELSWITCHOBJ=${KERNELSWITCHOBJ:-'tag=v6.1.4'}
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;;
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esac
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@ -22,7 +22,7 @@ case $BRANCH in
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;;
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edge)
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KERNEL_VERSION_LEVEL=${KERNEL_VERSION_LEVEL:-6.1}
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KERNELSWITCHOBJ=${KERNELSWITCHOBJ:-'tag=v6.1.2'}
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KERNELSWITCHOBJ=${KERNELSWITCHOBJ:-'tag=v6.1.4'}
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;;
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esac
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@ -1,51 +0,0 @@
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From f88fd57e9153a0cc5ee3643930983774f7127508 Mon Sep 17 00:00:00 2001
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From: Andre Przywara <andre.przywara@arm.com>
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Date: Sun, 6 Dec 2020 01:40:16 +0000
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Subject: [PATCH 018/170] drv:phy: sun4i-usb: Add support for the H616 USB PHY
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The USB PHY used in the Allwinner H616 SoC inherits some traits from its
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various predecessors: it has four full PHYs like the H3, needs some
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extra bits to be set like the H6, and puts SIDDQ on a different bit like
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the A100. Plus it needs this weird PHY2 quirk.
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Name all those properties in a new config struct and assign a new
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compatible name to it.
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Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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---
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drivers/phy/allwinner/phy-sun4i-usb.c | 12 ++++++++++++
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1 file changed, 12 insertions(+)
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diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c
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index b74c0e0c8..a16760268 100644
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--- a/drivers/phy/allwinner/phy-sun4i-usb.c
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+++ b/drivers/phy/allwinner/phy-sun4i-usb.c
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@@ -1055,6 +1055,17 @@ static const struct sun4i_usb_phy_cfg sun50i_h6_cfg = {
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.missing_phys = BIT(1) | BIT(2),
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};
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+static const struct sun4i_usb_phy_cfg sun50i_h616_cfg = {
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+ .num_phys = 4,
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+ .type = sun50i_h6_phy,
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+ .disc_thresh = 3,
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+ .phyctl_offset = REG_PHYCTL_A33,
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+ .dedicated_clocks = true,
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+ .phy0_dual_route = true,
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+ .hci_phy_ctl_clear = PHY_CTL_SIDDQ,
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+ .needs_phy2_siddq = true,
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+};
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+
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static const struct of_device_id sun4i_usb_phy_of_match[] = {
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{ .compatible = "allwinner,sun4i-a10-usb-phy", .data = &sun4i_a10_cfg },
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{ .compatible = "allwinner,sun5i-a13-usb-phy", .data = &sun5i_a13_cfg },
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@@ -1070,6 +1081,7 @@ static const struct of_device_id sun4i_usb_phy_of_match[] = {
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{ .compatible = "allwinner,sun50i-a64-usb-phy",
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.data = &sun50i_a64_cfg},
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{ .compatible = "allwinner,sun50i-h6-usb-phy", .data = &sun50i_h6_cfg },
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+ { .compatible = "allwinner,sun50i-h616-usb-phy", .data = &sun50i_h616_cfg },
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{ },
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};
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MODULE_DEVICE_TABLE(of, sun4i_usb_phy_of_match);
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--
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2.35.3
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@ -1,80 +0,0 @@
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From 0535dbfc5d968e9c957adbfbcdf7c82907ae5e4d Mon Sep 17 00:00:00 2001
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From: Andre Przywara <andre.przywara@arm.com>
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Date: Mon, 10 May 2021 11:01:31 +0100
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Subject: [PATCH 017/170] drv:phy: sun4i-usb: Introduce port2 SIDDQ quirk
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At least the Allwinner H616 SoC requires a weird quirk to make most
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USB PHYs work: Only port2 works out of the box, but all other ports
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need some help from this port2 to work correctly: The CLK_BUS_PHY2 and
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RST_USB_PHY2 clock and reset need to be enabled, and the SIDDQ bit in
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the PMU PHY control register needs to be cleared. For this register to
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be accessible, CLK_BUS_ECHI2 needs to be ungated. Don't ask ....
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Instead of disguising this as some generic feature, do exactly that
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in our PHY init:
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If the quirk bit is set, and we initialise a PHY other than PHY2, ungate
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this one special clock, and clear the SIDDQ bit. We can pull in the
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other required clocks via the DT.
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Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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---
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drivers/phy/allwinner/phy-sun4i-usb.c | 29 +++++++++++++++++++++++++++
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1 file changed, 29 insertions(+)
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diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c
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index 36742d5cf..b74c0e0c8 100644
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--- a/drivers/phy/allwinner/phy-sun4i-usb.c
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+++ b/drivers/phy/allwinner/phy-sun4i-usb.c
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@@ -121,6 +121,7 @@ struct sun4i_usb_phy_cfg {
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u8 phyctl_offset;
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bool dedicated_clocks;
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bool phy0_dual_route;
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+ bool needs_phy2_siddq;
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int missing_phys;
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};
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@@ -335,6 +336,27 @@ static int sun4i_usb_phy_init(struct phy *_phy)
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queue_delayed_work(system_wq, &data->detect, 0);
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}
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+ /* Some PHYs on some SoCs need the help of PHY2 to work. */
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+ if (data->cfg->needs_phy2_siddq && phy->index != 2) {
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+ struct sun4i_usb_phy *phy2 = &data->phys[2];
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+
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+ /*
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+ * This extra clock is just needed to access the
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+ * REG_HCI_PHY_CTL PMU register for PHY2.
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+ */
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+ ret = clk_prepare_enable(phy2->clk2);
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+ if (ret)
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+ return ret;
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+
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+ if (phy2->pmu && data->cfg->hci_phy_ctl_clear) {
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+ val = readl(phy2->pmu + REG_HCI_PHY_CTL);
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+ val &= ~data->cfg->hci_phy_ctl_clear;
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+ writel(val, phy2->pmu + REG_HCI_PHY_CTL);
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+ }
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+
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+ clk_disable_unprepare(phy->clk2);
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+ }
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+
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return 0;
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}
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@@ -821,6 +843,13 @@ static int sun4i_usb_phy_probe(struct platform_device *pdev)
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dev_err(dev, "failed to get clock %s\n", name);
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return PTR_ERR(phy->clk2);
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}
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+ } else {
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+ snprintf(name, sizeof(name), "pmu%d_clk", i);
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+ phy->clk2 = devm_clk_get_optional(dev, name);
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+ if (IS_ERR(phy->clk2)) {
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+ dev_err(dev, "failed to get clock %s\n", name);
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+ return PTR_ERR(phy->clk2);
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+ }
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}
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snprintf(name, sizeof(name), "usb%d_reset", i);
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--
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2.35.3
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@ -15,8 +15,6 @@
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patches.armbian/drv-gpu-drm-sun4i-Add-HDMI-audio-sun4i-hdmi-encoder.patch
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patches.armbian/drv-net-stmmac-dwmac-sun8i-second-EMAC-clock-register.patch
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patches.armbian/drv-phy-sun4i-usb-Allow-reset-line-to-be-shared.patch
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patches.armbian/drv-phy-sun4i-usb-Introduce-port2-SIDDQ-quirk.patch
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patches.armbian/drv-phy-sun4i-usb-Add-support-for-the-H616-USB-PHY.patch
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patches.armbian/drv-iio-adc-sun4i-gpadc-iio-rename-A33-specified-registers-to-c.patch
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patches.armbian/drv-iio-adc-sun4i-gpadc-iio-sampling-start-end-code-readout-reg.patch
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patches.armbian/drv-iio-adc-sun4i-gpadc-iio-support-clocks-and-reset.patch
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@ -416,8 +416,6 @@
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patches.armbian/drv-gpu-drm-sun4i-Add-HDMI-audio-sun4i-hdmi-encoder.patch
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patches.armbian/drv-net-stmmac-dwmac-sun8i-second-EMAC-clock-register.patch
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patches.armbian/drv-phy-sun4i-usb-Allow-reset-line-to-be-shared.patch
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patches.armbian/drv-phy-sun4i-usb-Introduce-port2-SIDDQ-quirk.patch
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patches.armbian/drv-phy-sun4i-usb-Add-support-for-the-H616-USB-PHY.patch
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patches.armbian/drv-iio-adc-sun4i-gpadc-iio-rename-A33-specified-registers-to-c.patch
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patches.armbian/drv-iio-adc-sun4i-gpadc-iio-sampling-start-end-code-readout-reg.patch
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patches.armbian/drv-iio-adc-sun4i-gpadc-iio-support-clocks-and-reset.patch
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