Fixes for XU4 patch
This commit is contained in:
Igor Pecovnik
parent
48c71e6d83
commit
56aaae211d
@ -99337,419 +99337,3 @@ diff -ruN b/sound/soc/samsung/Kconfig a/sound/soc/samsung/Kconfig
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help
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Say Y here to enable audio support for the Odroid XU3/XU4.
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diff -ruN b/sound/soc/samsung/odroid.c a/sound/soc/samsung/odroid.c
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--- b/sound/soc/samsung/odroid.c 2018-03-27 10:17:59.846849052 +0200
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+++ a/sound/soc/samsung/odroid.c 2018-03-27 10:06:54.366190706 +0200
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@@ -18,75 +18,321 @@
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struct odroid_priv {
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struct snd_soc_card card;
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struct snd_soc_dai_link dai_link;
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-
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- struct clk *clk_i2s_bus;
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- struct clk *sclk_i2s;
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};
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-static int odroid_card_startup(struct snd_pcm_substream *substream)
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+static int set_audio_clock_heirachy(struct device *card_dev);
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+
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+/*
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+ * The initial rate that EPLL will be set to. This is the smallest multiple (4)
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+ * of the desired master clock frequency 256 * FS for FS = 44.1khz that can
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+ * be generated on both the 5250 and 5420 SoCs.
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+ */
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+static int set_audss_pll_rate(struct device *card_dev, unsigned long epll,
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+ unsigned long sclk, unsigned long rclk)
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{
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- struct snd_pcm_runtime *runtime = substream->runtime;
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+ int ret;
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+ struct clk *fout_epll;
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+ struct clk *dout_srp, *dout_aud_bus;
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+ unsigned long clk_margin=500;
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+
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+ ret = set_audio_clock_heirachy(card_dev);
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+ if (ret) {
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+ dev_err(card_dev, "failed to set up clock hierarchy (%d)\n",
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+ ret);
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+ }
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+ fout_epll = devm_clk_get(card_dev, "fout_epll");
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+ if (IS_ERR(fout_epll)) {
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+ dev_err(card_dev, "%s: failed to get fout_epll\n", __func__);
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+ return PTR_ERR(fout_epll);
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+ }
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+ dout_srp = devm_clk_get(card_dev, "dout_srp");
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+ if (IS_ERR(dout_srp)) {
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+ dev_err(card_dev, "%s: failed to get dout_srp\n", __func__);
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+ goto out1;
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+ }
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+ dout_aud_bus = devm_clk_get(card_dev, "dout_aud_bus");
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+ if (IS_ERR(dout_aud_bus)) {
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+ dev_err(card_dev, "%s: failed to get dout_aud_bus\n", __func__);
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+ goto out2;
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+ }
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+
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+ ret = clk_set_rate(fout_epll, epll);
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+ if (ret < 0) {
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+ dev_err(card_dev, "failed to clk_set_rate of fout_epll for audio\n");
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+ goto out3;
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+ }
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+ ret = clk_set_rate(dout_srp, sclk+clk_margin);
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+ if (ret < 0) {
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+ dev_err(card_dev, "failed to clk_set_rate of dout_srp for audio\n");
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+ goto out3;
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+ }
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+ ret = clk_set_rate(dout_aud_bus, rclk+clk_margin);
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+ if (ret < 0) {
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+ dev_err(card_dev, "failed to clk_set_rate of dout_aud_bus for audio\n");
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+ goto out3;
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+ }
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+ dev_dbg(card_dev,"%s[%d] : epll=%ld\n",__func__,__LINE__,clk_get_rate(fout_epll));
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+ dev_dbg(card_dev,"%s[%d] : dout_srp=%ld\n",__func__,__LINE__,clk_get_rate(dout_srp));
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+ dev_dbg(card_dev,"%s[%d] : dout_bus=%ld\n",__func__,__LINE__,clk_get_rate(dout_aud_bus));
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+out3:
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+ clk_put(dout_aud_bus);
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+out2:
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+ clk_put(dout_srp);
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+out1:
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+ clk_put(fout_epll);
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- snd_pcm_hw_constraint_single(runtime, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
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return 0;
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}
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+/* Audio clock settings are belonged to board specific part. Every
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+ * board can set audio source clock setting which is matched with H/W
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+ * like this function-'set_audio_clock_heirachy'.
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+ */
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+static int set_audio_clock_heirachy(struct device *card_dev)
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+{
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+ struct clk *fout_epll, *mout_sclk_epll;
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+ struct clk *mout_mau_epll, *mout_mau_epll_user;
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+ struct clk *mout_audss, *mout_i2s;
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+ struct clk *mau_epll;
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+ int ret = 0;
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+
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+ fout_epll = devm_clk_get(card_dev, "fout_epll");
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+ if (IS_ERR(fout_epll)) {
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+ dev_err(card_dev, "%s: Cannot find fout_epll.\n",
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+ __func__);
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+ return -EINVAL;
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+ }
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+ clk_prepare_enable(fout_epll);
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+
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+ mout_sclk_epll = devm_clk_get(card_dev, "mout_sclk_epll");
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+ if (IS_ERR(mout_sclk_epll)) {
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+ dev_err(card_dev, "%s: Cannot find mout_sclk_epll.\n", __func__);
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+ ret = -EINVAL;
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+ goto out1;
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+ }
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+ clk_prepare_enable(mout_sclk_epll);
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+
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+ mout_mau_epll = devm_clk_get(card_dev, "mout_mau_epll");
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+ if (IS_ERR(mout_mau_epll)) {
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+ dev_err(card_dev,
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+ "%s: Cannot find mout_mau_epll clocks.\n", __func__);
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+ ret = -EINVAL;
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+ goto out2;
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+ }
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+ clk_prepare_enable(mout_mau_epll);
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+
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+ mout_mau_epll_user = devm_clk_get(card_dev, "mout_mau_epll_user");
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+ if (IS_ERR(mout_mau_epll_user)) {
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+ dev_err(card_dev,
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+ "%s: Cannot find mout_mau_epll_user clocks.\n", __func__);
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+ ret = -EINVAL;
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+ goto out3;
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+ }
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+ clk_prepare_enable(mout_mau_epll_user);
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+
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+ mout_audss = devm_clk_get(card_dev, "mout_audss");
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+ if (IS_ERR(mout_audss)) {
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+ dev_err(card_dev,
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+ "%s: Cannot find mout_audss clocks.\n", __func__);
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+ ret = -EINVAL;
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+ goto out4;
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+ }
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+ clk_prepare_enable(mout_audss);
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+
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+ mout_i2s = devm_clk_get(card_dev, "mout_i2s");
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+ if (IS_ERR(mout_i2s)) {
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+ dev_err(card_dev,
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+ "%s: Cannot find mout_i2s clocks.\n", __func__);
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+ ret = -EINVAL;
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+ goto out5;
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+ }
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+ clk_prepare_enable(mout_i2s);
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+
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+ mau_epll = devm_clk_get(card_dev, "mau_epll_clk");
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+ if (IS_ERR(mau_epll)) {
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+ dev_err(card_dev,
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+ "%s: Cannot find mau_epll clocks.\n", __func__);
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+ ret = -EINVAL;
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+ goto out6;
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+ }
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+ clk_prepare_enable(mau_epll);
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+
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+ /* Set audio clock hierarchy for S/PDIF */
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+ ret = clk_set_parent(mout_sclk_epll, fout_epll);
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+ if (ret < 0) {
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+ dev_err(card_dev, "Failed to set parent of epll.\n");
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+ goto out7;
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+ }
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+ ret = clk_set_parent(mout_mau_epll, mout_sclk_epll);
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+ if (ret < 0) {
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+ dev_err(card_dev, "Failed to set parent of mout_mau_epll.\n");
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+ goto out7;
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+ }
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+ ret = clk_set_parent(mout_mau_epll_user, mout_mau_epll);
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+ if (ret < 0) {
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+ dev_err(card_dev, "Failed to set parent of epll.\n");
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+ goto out7;
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+ }
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+ ret = clk_set_parent(mout_audss, mout_mau_epll_user);
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+ if (ret < 0) {
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+ dev_err(card_dev, "Failed to set parent of audss.\n");
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+ goto out7;
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+ }
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+ ret = clk_set_parent(mout_i2s, mout_audss);
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+ if (ret < 0) {
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+ dev_err(card_dev, "Failed to set parent of mout i2s.\n");
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+ goto out7;
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+ }
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+out7:
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+ clk_put(mau_epll);
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+out6:
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+ clk_put(mout_i2s);
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+out5:
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+ clk_put(mout_audss);
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+out4:
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+ clk_put(mout_mau_epll_user);
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+out3:
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+ clk_put(mout_mau_epll);
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+out2:
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+ clk_put(mout_sclk_epll);
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+out1:
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+ clk_put(fout_epll);
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+
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+ return ret;
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+}
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+
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static int odroid_card_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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- struct odroid_priv *priv = snd_soc_card_get_drvdata(rtd->card);
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- unsigned int pll_freq, rclk_freq;
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- int ret;
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+ struct snd_soc_dai *codec_dai = rtd->codec_dai;
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+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
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+ int bfs, psr, rfs, ret, div=4;
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+ unsigned long rclk, sclk;
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+ unsigned long pll;
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+ struct device *card_dev = substream->pcm->card->dev;
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+
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+ switch (params_format(params)) {
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+ case SNDRV_PCM_FORMAT_U24_LE:
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+ case SNDRV_PCM_FORMAT_S24_LE:
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+ bfs = 48;
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+ break;
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+ case SNDRV_PCM_FORMAT_U16_LE:
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+ case SNDRV_PCM_FORMAT_S16_LE:
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+ bfs = 32;
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+ break;
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+ default:
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+ return -EINVAL;
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+ }
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switch (params_rate(params)) {
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+ case 16000:
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+ case 22050:
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+ case 24000:
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case 32000:
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- case 64000:
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- pll_freq = 131072006U;
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- break;
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case 44100:
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- case 88200:
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- case 176400:
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- pll_freq = 180633609U;
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- break;
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case 48000:
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+ case 88200:
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case 96000:
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- case 192000:
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- pll_freq = 196608001U;
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+ if (bfs == 48)
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+ rfs = 384;
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+ else
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+ rfs = 256;
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+ break;
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+ case 64000:
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+ rfs = 384;
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+ break;
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+ case 8000:
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+ case 11025:
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+ case 12000:
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+ if (bfs == 48)
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+ rfs = 768;
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+ else
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+ rfs = 512;
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break;
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default:
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return -EINVAL;
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}
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- ret = clk_set_rate(priv->clk_i2s_bus, pll_freq / 2 + 1);
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+ rclk = params_rate(params) * rfs;
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+
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+ switch (rclk) {
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+ case 4096000:
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+ case 5644800:
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+ case 6144000:
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+ case 8467200:
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+ case 9216000:
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+ psr = 8;
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+ break;
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+ case 8192000:
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+ case 11289600:
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+ case 12288000:
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+ case 16934400:
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+ case 18432000:
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+ psr = 4;
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+ break;
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+ case 22579200:
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+ case 24576000:
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+ case 33868800:
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+ case 36864000:
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+ psr = 2;
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+ break;
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+ case 67737600:
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+ case 73728000:
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+ psr = 1;
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+ break;
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+ default:
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+ dev_err(card_dev, "rclk = %lu is not yet supported!\n", rclk);
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+ return -EINVAL;
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+ }
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+
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+ dev_dbg(card_dev,"%s[%d]: rate=%d, bfs=%d, rfs=%d, psr=%d \n",
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+ __func__,__LINE__, params_rate(params), bfs, rfs, psr);
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+
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+ sclk = rclk * psr;
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+ pll = sclk * div;
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+ dev_dbg(card_dev,"%s[%d]: rclk=%ld, sclk=%ld, pll=%ld\n",
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+ __func__,__LINE__, rclk, sclk, pll);
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+
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+ ret = set_audss_pll_rate(card_dev, pll, sclk, rclk);
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if (ret < 0)
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return ret;
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- /*
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- * We add 1 to the rclk_freq value in order to avoid too low clock
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- * frequency values due to the EPLL output frequency not being exact
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- * multiple of the audio sampling rate.
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- */
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- rclk_freq = params_rate(params) * 256 + 1;
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+ ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S
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+ | SND_SOC_DAIFMT_NB_NF
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+ | SND_SOC_DAIFMT_CBS_CFS);
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+
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+ ret = snd_soc_dai_set_sysclk(codec_dai, 0, rclk, SND_SOC_CLOCK_IN);
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+
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+ ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S
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+ | SND_SOC_DAIFMT_NB_NF
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+ | SND_SOC_DAIFMT_CBS_CFS);
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+ if (ret < 0)
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+ return ret;
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- ret = clk_set_rate(priv->sclk_i2s, rclk_freq);
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+ ret = snd_soc_dai_set_sysclk(cpu_dai, SAMSUNG_I2S_OPCLK,
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+ 0, MOD_OPCLK_PCLK);
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if (ret < 0)
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return ret;
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- if (rtd->num_codecs > 1) {
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- struct snd_soc_dai *codec_dai = rtd->codec_dais[1];
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+ ret = snd_soc_dai_set_sysclk(cpu_dai, SAMSUNG_I2S_RCLKSRC_0,
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+ rclk, SND_SOC_CLOCK_OUT);
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+ if (ret < 0)
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+ return ret;
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- ret = snd_soc_dai_set_sysclk(codec_dai, 0, rclk_freq,
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- SND_SOC_CLOCK_IN);
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- if (ret < 0)
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- return ret;
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- }
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+ ret = snd_soc_dai_set_sysclk(cpu_dai, SAMSUNG_I2S_CDCLK,
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+ rfs, SND_SOC_CLOCK_OUT);
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+ if (ret < 0)
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+ return ret;
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+
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+ ret = snd_soc_dai_set_clkdiv(cpu_dai, SAMSUNG_I2S_DIV_BCLK, bfs);
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+ if (ret < 0)
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+ return ret;
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return 0;
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}
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static const struct snd_soc_ops odroid_card_ops = {
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- .startup = odroid_card_startup,
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.hw_params = odroid_card_hw_params,
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};
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@@ -117,7 +363,6 @@
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card = &priv->card;
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card->dev = dev;
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-
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card->owner = THIS_MODULE;
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card->fully_routed = true;
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@@ -168,32 +413,22 @@
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link->name = "Primary";
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link->stream_name = link->name;
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-
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- priv->sclk_i2s = of_clk_get_by_name(link->cpu_of_node, "i2s_opclk1");
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- if (IS_ERR(priv->sclk_i2s)) {
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- ret = PTR_ERR(priv->sclk_i2s);
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- goto err_put_i2s_n;
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- }
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-
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- priv->clk_i2s_bus = of_clk_get_by_name(link->cpu_of_node, "iis");
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- if (IS_ERR(priv->clk_i2s_bus)) {
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- ret = PTR_ERR(priv->clk_i2s_bus);
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- goto err_put_sclk;
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- }
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-
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ret = devm_snd_soc_register_card(dev, card);
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if (ret < 0) {
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dev_err(dev, "snd_soc_register_card() failed: %d\n", ret);
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goto err_put_clk_i2s;
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}
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+ ret = set_audio_clock_heirachy(&pdev->dev);
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+ if (ret) {
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+ dev_err(&pdev->dev, "failed to set up clock hierarchy (%d)\n",
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+ ret);
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+ snd_soc_unregister_card(card);
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+ }
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+
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return 0;
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err_put_clk_i2s:
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- clk_put(priv->clk_i2s_bus);
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-err_put_sclk:
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- clk_put(priv->sclk_i2s);
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-err_put_i2s_n:
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of_node_put(link->cpu_of_node);
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err_put_codec_n:
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odroid_put_codec_of_nodes(link);
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@@ -206,8 +441,6 @@
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of_node_put(priv->dai_link.cpu_of_node);
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odroid_put_codec_of_nodes(&priv->dai_link);
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- clk_put(priv->sclk_i2s);
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- clk_put(priv->clk_i2s_bus);
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return 0;
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}
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||||
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