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Trying to fix HDMI problem on A20 (#2102)

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Also add various Olimex hw related patches
This commit is contained in:
Igor Pečovnik 2020-07-19 11:23:57 +02:00 committed by GitHub
parent 9372fcdedf
commit 4a57ba0189
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GPG Key ID: 4AEE18F83AFDEB23
23 changed files with 2231 additions and 18 deletions
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8
config/kernel/linux-sunxi-current.config
View File

@ -394,7 +394,7 @@ CONFIG_ARM_DMA_MEM_BUFFERABLE=y
CONFIG_ARM_HEAVY_MB=y
CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y
CONFIG_DEBUG_ALIGN_RODATA=y
# CONFIG_ARM_ERRATA_430973 is not set
CONFIG_ARM_ERRATA_430973=y
CONFIG_ARM_ERRATA_643719=y
# CONFIG_ARM_ERRATA_720789 is not set
# CONFIG_ARM_ERRATA_754322 is not set
@ -4056,8 +4056,8 @@ CONFIG_VIDEO_IMX219=m
CONFIG_VIDEO_IMX290=m
CONFIG_VIDEO_IMX319=m
CONFIG_VIDEO_IMX355=m
# CONFIG_VIDEO_OV2640 is not set
# CONFIG_VIDEO_OV2659 is not set
CONFIG_VIDEO_OV2640=m
CONFIG_VIDEO_OV2659=m
CONFIG_VIDEO_OV2680=m
CONFIG_VIDEO_OV2685=m
CONFIG_VIDEO_OV5640=m
@ -4415,7 +4415,7 @@ CONFIG_DRM_VKMS=m
CONFIG_DRM_RCAR_DW_HDMI=m
# CONFIG_DRM_RCAR_LVDS is not set
CONFIG_DRM_SUN4I=y
CONFIG_DRM_SUN4I_HDMI=y
CONFIG_DRM_SUN4I_HDMI=m
CONFIG_DRM_SUN4I_HDMI_AUDIO=y
CONFIG_DRM_SUN4I_HDMI_CEC=y
CONFIG_DRM_SUN4I_BACKEND=y

176
patch/kernel/sunxi-current/olimex_0008-0148-hwmon-enable-thermal-for-axp803.patch.patch Normal file
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@ -0,0 +1,176 @@
From c8d43dfa8fd0e66dd1fd25cf8a9bf0f13add1910 Mon Sep 17 00:00:00 2001
From: Mitko Gamishev <hehopmajieh@debian.bg>
Date: Wed, 5 Feb 2020 14:57:10 +0200
Subject: [PATCH 08/48] 0148-hwmon-enable-thermal-for-axp803.patch
---
arch/arm64/boot/dts/allwinner/axp803.dtsi | 1 +
drivers/iio/adc/axp20x_adc.c | 89 ++++++++++++++++++++++-
2 files changed, 89 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/axp803.dtsi b/arch/arm64/boot/dts/allwinner/axp803.dtsi
index 10e9186a76bf..43276d88b61b 100644
--- a/arch/arm64/boot/dts/allwinner/axp803.dtsi
+++ b/arch/arm64/boot/dts/allwinner/axp803.dtsi
@@ -19,6 +19,7 @@ ac_power_supply: ac-power-supply {
axp_adc: adc {
compatible = "x-powers,axp803-adc", "x-powers,axp813-adc";
#io-channel-cells = <1>;
+ #thermal-sensor-cells = <0>;
};
axp_gpio: gpio {
diff --git a/drivers/iio/adc/axp20x_adc.c b/drivers/iio/adc/axp20x_adc.c
index 88059480da17..d5370d144f77 100644
--- a/drivers/iio/adc/axp20x_adc.c
+++ b/drivers/iio/adc/axp20x_adc.c
@@ -6,6 +6,7 @@
*/
#include <linux/completion.h>
+#include <linux/hwmon.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
@@ -14,7 +15,6 @@
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
-#include <linux/thermal.h>
#include <linux/iio/iio.h>
#include <linux/iio/driver.h>
@@ -594,6 +594,74 @@ static int axp813_adc_rate(struct axp20x_adc_iio *info, int rate)
AXP813_ADC_RATE_HZ(rate));
}
+
+static umode_t axp813_adc_hwmon_is_visible(const void *data,
+ enum hwmon_sensor_types type,
+ u32 attr, int channel)
+{
+ return (type == hwmon_temp && attr == hwmon_temp_input) ? 0444 : 0;
+}
+
+static int axp813_adc_hwmon_read(struct device *dev,
+ enum hwmon_sensor_types type,
+ u32 attr, int channel, long *temp)
+{
+ struct axp20x_adc_iio *info = dev_get_drvdata(dev);
+ int ret;
+ int raw;
+
+ switch (attr) {
+ case hwmon_temp_input:
+ raw = axp20x_read_variable_width(info->regmap, AXP22X_PMIC_TEMP_H, 12);
+ *temp = (raw - 2667) * 100;
+ ret = 0;
+ break;
+ default:
+ ret = -EOPNOTSUPP;
+ break;
+ }
+
+ return ret;
+}
+
+static u32 axp813_adc_hwmon_chip_config[] = {
+ HWMON_C_REGISTER_TZ,
+ 0
+};
+
+static const struct hwmon_channel_info axp813_adc_hwmon_chip = {
+ .type = hwmon_chip,
+ .config = axp813_adc_hwmon_chip_config,
+};
+
+static u32 axp813_adc_hwmon_temp_config[] = {
+ HWMON_T_INPUT,
+ 0
+};
+
+
+static const struct hwmon_channel_info axp813_adc_hwmon_temp = {
+ .type = hwmon_temp,
+ .config = axp813_adc_hwmon_temp_config,
+};
+
+
+static const struct hwmon_channel_info *axp813_adc_hwmon_info[] = {
+ &axp813_adc_hwmon_chip,
+ &axp813_adc_hwmon_temp,
+ NULL
+};
+
+static const struct hwmon_ops axp813_adc_hwmon_hwmon_ops = {
+ .is_visible = axp813_adc_hwmon_is_visible,
+ .read = axp813_adc_hwmon_read,
+};
+
+static const struct hwmon_chip_info axp813_adc_hwmon_chip_info = {
+ .ops = &axp813_adc_hwmon_hwmon_ops,
+ .info = axp813_adc_hwmon_info,
+};
+
struct axp_data {
const struct iio_info *iio_info;
int num_channels;
@@ -602,6 +670,7 @@ struct axp_data {
int (*adc_rate)(struct axp20x_adc_iio *info,
int rate);
bool adc_en2;
+ bool hwmon_en;
struct iio_map *maps;
};
@@ -612,6 +681,7 @@ static const struct axp_data axp20x_data = {
.adc_en1_mask = AXP20X_ADC_EN1_MASK,
.adc_rate = axp20x_adc_rate,
.adc_en2 = true,
+ .hwmon_en = false,
.maps = axp20x_maps,
};
@@ -622,6 +692,7 @@ static const struct axp_data axp22x_data = {
.adc_en1_mask = AXP22X_ADC_EN1_MASK,
.adc_rate = axp22x_adc_rate,
.adc_en2 = false,
+ .hwmon_en = false,
.maps = axp22x_maps,
};
@@ -632,6 +703,7 @@ static const struct axp_data axp813_data = {
.adc_en1_mask = AXP22X_ADC_EN1_MASK,
.adc_rate = axp813_adc_rate,
.adc_en2 = false,
+ .hwmon_en = true,
.maps = axp22x_maps,
};
@@ -711,8 +783,23 @@ static int axp20x_probe(struct platform_device *pdev)
goto fail_register;
}
+ if (info->data->hwmon_en) {
+ /* Register hwmon device */
+ struct device *hwmon_dev;
+
+ hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev, "axp813_adc", info, &axp813_adc_hwmon_chip_info, NULL);
+ if (IS_ERR(hwmon_dev)) {
+ ret = PTR_ERR(hwmon_dev);
+ dev_err(&pdev->dev, "unable to register hwmon device %d\n", ret);
+ goto fail_hwmon;
+ }
+ }
+
return 0;
+fail_hwmon:
+ iio_device_unregister(indio_dev);
+
fail_register:
iio_map_array_unregister(indio_dev);
--
2.25.1

106
patch/kernel/sunxi-current/olimex_0012-board-a13-olinuxinoM.patch.patch Normal file
View File

@ -0,0 +1,106 @@
From f41220f93142aa088d5b111d09a8c11b7a096f71 Mon Sep 17 00:00:00 2001
From: Mitko Gamishev <hehopmajieh@debian.bg>
Date: Wed, 5 Feb 2020 15:00:25 +0200
Subject: [PATCH 12/48] board-a13-olinuxinoM.patch
---
.../boot/dts/sun5i-a13-olinuxino-micro.dts | 62 ++++++++++++++++++-
1 file changed, 60 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
index 5df398d77238..b12976499cb5 100644
--- a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
@@ -44,7 +44,7 @@
/dts-v1/;
#include "sun5i-a13.dtsi"
#include "sunxi-common-regulators.dtsi"
-
+#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/gpio/gpio.h>
/ {
@@ -70,6 +70,40 @@ power {
default-state = "on";
};
};
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
+ brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
+ default-brightness-level = <8>;
+
+ };
+
+ panel: panel {
+ compatible = "olimex,lcd-olinuxino-4.3";
+ backlight = <&backlight>;
+ enable-gpios = <&pio 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port {
+ panel_input: endpoint {
+ remote-endpoint = <&tcon0_out_lcd>;
+ };
+ };
+
+ };
+
+ };
+
+
+
+&be0 {
+ status = "okay";
+};
+
+&codec {
+ status = "okay";
};
&ehci0 {
@@ -117,10 +151,28 @@ &reg_usb0_vbus {
};
&reg_usb1_vbus {
- gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>;
+ gpio = <&pio 2 19 GPIO_ACTIVE_HIGH>;
status = "okay";
};
+&tcon0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_rgb666_pins>;
+ status = "okay";
+};
+&tcon0_out {
+ tcon0_out_lcd: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&panel_input>;
+ };
+};
+
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pin>;
+ status = "okay";
+};
+
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pg_pins>;
@@ -139,3 +191,9 @@ &usbphy {
usb1_vbus-supply = <&reg_usb1_vbus>;
status = "okay";
};
+
+&rtp {
+ allwinner,ts-attached;
+ touchscreen-inverted-x;
+};
+
--
2.25.1

603
patch/kernel/sunxi-current/olimex_0013-board-olinuxino-a64-commmon-dtsi.patch.patch Normal file
View File

@ -0,0 +1,603 @@
From 92843448898307646b6975b2ace7c2372104d10d Mon Sep 17 00:00:00 2001
From: Mitko Gamishev <hehopmajieh@debian.bg>
Date: Wed, 5 Feb 2020 15:03:08 +0200
Subject: [PATCH 13/48] board-olinuxino-a64-commmon-dtsi.patch
---
arch/arm64/boot/dts/allwinner/Makefile | 5 +
.../dts/allwinner/sun50i-a64-olinuxino-1G.dts | 362 ++++++++++++++++++
.../sun50i-a64-olinuxino-1Ge16GW.dts | 20 +
.../allwinner/sun50i-a64-olinuxino-1Ge4GW.dts | 97 +++++
.../allwinner/sun50i-a64-olinuxino-1Gs16M.dts | 31 ++
.../allwinner/sun50i-a64-olinuxino-2Ge8G.dts | 25 ++
6 files changed, 540 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1G.dts
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge4GW.dts
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Gs16M.dts
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-2Ge8G.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index cf4f78617c3f..a0961a6bff15 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -5,6 +5,11 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-nanopi-a64.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-oceanic-5205-5inmfd.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-emmc.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-1G.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-1Ge4GW.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-1Ge16GW.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-1Gs16M.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-2Ge8G.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-lts.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1G.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1G.dts
new file mode 100644
index 000000000000..d48ed65de145
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1G.dts
@@ -0,0 +1,362 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Olimex A64-Olinuxino-1G";
+ compatible = "olimex,a64-olinuxino-1g", "allwinner,sun50i-a64";
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ hdmi-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "allwinner,hdmi";
+ simple-audio-card,mclk-fs = <256>;
+ status = "okay";
+
+ simple-audio-card,codec {
+ sound-dai = <&hdmi>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s2>;
+ };
+ };
+
+ reg_vcc_sys: vcc-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-sys";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ status = "okay";
+ };
+
+ reg_usb1_vbus: usb1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb1-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ enable-active-high;
+ gpio = <&pio 6 9 GPIO_ACTIVE_HIGH>; /* PG9 */
+ status = "okay";
+ };
+};
+
+&codec {
+ status = "okay";
+};
+
+&codec_analog {
+ hpvcc-supply = <&reg_eldo1>;
+ status = "okay";
+};
+
+&dai {
+ status = "okay";
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ phy-mode = "rgmii";
+ phy-handle = <&ext_rgmii_phy>;
+ phy-supply = <&reg_dcdc1>;
+ allwinner,tx-delay-ps = <600>;
+ status = "okay";
+};
+
+&hdmi {
+ hvcc-supply = <&reg_dldo1>;
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+/* Exposed to UEXT connector */
+&i2c1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ status = "disabled";
+};
+
+&i2s2 {
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ vmmc-supply = <&reg_dcdc1>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ bus-width = <4>;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&r_rsb {
+ status = "okay";
+
+ axp803: pmic@3a3 {
+ compatible = "x-powers,axp803";
+ reg = <0x3a3>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */
+ };
+};
+
+#include "axp803.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+&axp_led {
+ label = "axp20x:yellow:chgled";
+ status = "okay";
+ x-powers,charger-mode = <0>;
+};
+
+&battery_power_supply {
+ status = "okay";
+};
+
+&reg_aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "vcc-pe";
+};
+
+&reg_aldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pl";
+};
+
+&reg_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+&reg_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+&reg_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1040000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-name = "vdd-cpux";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+/*
+ * The board uses DDR3L DRAM chips. 1.36V is the closest to the nominal
+ * 1.35V that the PMIC can drive.
+ */
+&reg_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1360000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vcc-ddr3";
+};
+
+&reg_dcdc6 {
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-sys";
+};
+
+&reg_dldo1 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-hdmi";
+};
+
+&reg_dldo2 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-mipi";
+};
+
+&reg_dldo3 {
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "vcc-avdd-csi";
+};
+
+&reg_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-io";
+};
+
+&reg_drivevbus {
+ regulator-name = "usb0-vbus";
+ status = "okay";
+};
+
+&reg_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-emmc";
+};
+
+&reg_eldo2 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-dvdd-csi";
+};
+
+&reg_fldo1 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vcc-1v2-hsic";
+};
+
+/*
+ * The A64 chip cannot work without this regulator off, although
+ * it seems to be only driving the AR100 core.
+ * Maybe we don't still know well about CPUs domain.
+ */
+&reg_fldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-cpus";
+};
+
+&reg_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&simplefb_hdmi {
+ vcc-hdmi-supply = <&reg_dldo1>;
+};
+
+&sound {
+ simple-audio-card,aux-devs = <&codec_analog>;
+ simple-audio-card,widgets = "Microphone", "Microphone Jack Left",
+ "Microphone", "Microphone Jack Right",
+ "Headphone", "Headphone Jack";
+ simple-audio-card,routing = "Left DAC", "AIF1 Slot 0 Left",
+ "Right DAC", "AIF1 Slot 0 Right",
+ "Headphone Jack", "HP",
+ "AIF1 Slot 0 Left ADC", "Left ADC",
+ "AIF1 Slot 0 Right ADC", "Right ADC",
+ "Microphone Jack Left", "MBIAS",
+ "MIC1", "Microphone Jack Left",
+ "Microphone Jack Left", "HBIAS",
+ "MIC2", "Microphone Jack Right";
+ status = "okay";
+};
+
+&spdif {
+ status = "disabled";
+};
+
+/* Exposed on UEXT */
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
+ status = "disabled";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pb_pins>;
+ status = "okay";
+};
+
+/* Exposed on UEXT */
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pins>;
+ status = "disabled";
+};
+
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+ usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
+ usb0_vbus_det-gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
+ usb0_vbus-supply = <&reg_drivevbus>;
+ usb1_vbus-supply = <&reg_usb1_vbus>;
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
new file mode 100644
index 000000000000..a508d77d2c09
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-olinuxino-1Ge4GW.dts"
+
+/ {
+ model = "Olimex A64-Olinuxino-1Ge16GW";
+ compatible = "olimex,a64-olinuxino-1ge16gw", "allwinner,sun50i-a64";
+};
+
+&mmc2 {
+ vqmmc-supply = <&reg_eldo1>;
+ mmc-hs200-1_8v;
+ allwinner,drive-data-phase = <180>;
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge4GW.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge4GW.dts
new file mode 100644
index 000000000000..c87ecc6e1d8f
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge4GW.dts
@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-olinuxino-1G.dts"
+
+/ {
+ model = "Olimex A64-Olinuxino-1Ge4GW";
+ compatible = "olimex,a64-olinuxino-1ge4gw", "allwinner,sun50i-a64";
+
+ aliases {
+ ethernet1 = &rtl8723bs;
+ mmc1 = &mmc2;
+ };
+
+ bt-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-inversion = <1>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,name = "RTL8723BS";
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1>;
+ };
+ simple-audio-card,codec {
+ sound-dai = <&bt_sco>;
+ };
+ };
+
+ bt_sco: bt-sco {
+ compatible = "linux,bt-sco";
+ #sound-dai-cells = <0>;
+ status = "okay";
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+ };
+};
+
+&i2s1 {
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vmmc-supply = <&reg_aldo2>;
+ vqmmc-supply = <&reg_dldo4>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ rtl8723bs: wifi@1 {
+ reg = <1>;
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
+ interrupt-names = "host-wake";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <&reg_dcdc1>;
+ vqmmc-supply = <&reg_dcdc1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&pio {
+ uart1_cts_pins: uart1_cts_pins {
+ pins = "PG8";
+ function = "uart1";
+ };
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_cts_pins>;
+ status = "okay";
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "olinuxino";
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Gs16M.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Gs16M.dts
new file mode 100644
index 000000000000..5b85f4d2b05f
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Gs16M.dts
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-olinuxino-1G.dts"
+
+/ {
+ model = "Olimex A64-Olinuxino-1Gs16M";
+ compatible = "olimex,a64-olinuxino-1gs16m", "allwinner,sun50i-a64";
+
+ aliases {
+ spi0 = &spi0;
+ };
+};
+
+&spi0 {
+ status = "okay";
+
+ spi-nor@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "winbond,w25q128", "jedec,spi-nor", "spi-flash";
+ reg = <0>;
+ spi-max-frequency = <10000000>;
+ status = "okay";
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-2Ge8G.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-2Ge8G.dts
new file mode 100644
index 000000000000..3583c37d3930
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-2Ge8G.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-olinuxino-1G.dts"
+
+/ {
+ model = "Olimex A64-Olinuxino-2Ge8G-IND";
+ compatible = "olimex,a64-olinuxino-2ge8g", "allwinner,sun50i-a64";
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <&reg_dcdc1>;
+ vqmmc-supply = <&reg_dcdc1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
--
2.25.1

178
patch/kernel/sunxi-current/olimex_0014-general-add-compability-olinuxino-lcd.patch.patch Normal file
View File

@ -0,0 +1,178 @@
From 94a9a1d977605676a6de81812074924109f5ec17 Mon Sep 17 00:00:00 2001
From: Mitko Gamishev <hehopmajieh@debian.bg>
Date: Wed, 5 Feb 2020 15:04:32 +0200
Subject: [PATCH 14/48] general-add-compability-olinuxino-lcd.patch
---
drivers/gpu/drm/panel/panel-simple.c | 135 ++++++++++++++++++++++++---
1 file changed, 123 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index e14c14ac62b5..ad10dd8858cf 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -2332,21 +2332,48 @@ static const struct panel_desc okaya_rs800480t_7x0gp = {
.bus_format = MEDIA_BUS_FMT_RGB666_1X18,
};
-static const struct drm_display_mode olimex_lcd_olinuxino_43ts_mode = {
- .clock = 9000,
+static const struct drm_display_mode olimex_vga_olinuxino_800_mode = {
+ .clock = 40000,
+ .hdisplay = 800,
+ .hsync_start = 800 + 40,
+ .hsync_end = 800 + 40 + 128,
+ .htotal = 800 + 40 + 128 + 88,
+ .vdisplay = 600,
+ .vsync_start = 600 + 5,
+ .vsync_end = 600 + 5 + 4,
+ .vtotal = 600 + 5 + 4 + 19,
+ .vrefresh = 60,
+};
+
+static const struct drm_display_mode olimex_vga_olinuxino_1024_mode = {
+ .clock = 45000,
+ .hdisplay = 1024,
+ .hsync_start = 1024 + 16,
+ .hsync_end = 1024 + 16 + 10,
+ .htotal = 1024 + 16 + 10 + 150,
+ .vdisplay = 600,
+ .vsync_start = 600 + 2,
+ .vsync_end = 600 + 2 + 21,
+ .vtotal = 600 + 2 + 21 + 2,
+ .vrefresh = 60,
+};
+
+
+static const struct drm_display_mode olimex_lcd_olinuxino_43_mode = {
+ .clock = 12000,
.hdisplay = 480,
- .hsync_start = 480 + 5,
- .hsync_end = 480 + 5 + 30,
- .htotal = 480 + 5 + 30 + 10,
+ .hsync_start = 480 + 8,
+ .hsync_end = 480 + 8 + 20,
+ .htotal = 480 + 8 + 20 + 23,
.vdisplay = 272,
- .vsync_start = 272 + 8,
- .vsync_end = 272 + 8 + 5,
- .vtotal = 272 + 8 + 5 + 3,
+ .vsync_start = 272 + 4,
+ .vsync_end = 272 + 4 + 10,
+ .vtotal = 272 + 4 + 10 + 13,
.vrefresh = 60,
};
-static const struct panel_desc olimex_lcd_olinuxino_43ts = {
- .modes = &olimex_lcd_olinuxino_43ts_mode,
+static const struct panel_desc olimex_lcd_olinuxino_43 = {
+ .modes = &olimex_lcd_olinuxino_43_mode,
.num_modes = 1,
.size = {
.width = 95,
@@ -2355,6 +2382,74 @@ static const struct panel_desc olimex_lcd_olinuxino_43ts = {
.bus_format = MEDIA_BUS_FMT_RGB888_1X24,
};
+static const struct drm_display_mode olimex_lcd_olinuxino_5_mode = {
+ .clock = 33300,
+ .hdisplay = 800,
+ .hsync_start = 800 + 210,
+ .hsync_end = 800 + 210 + 20,
+ .htotal = 800 + 210 + 20 + 26,
+ .vdisplay = 480,
+ .vsync_start = 480 + 22,
+ .vsync_end = 480 + 22 + 10,
+ .vtotal = 480 + 22 + 10 + 13,
+ .vrefresh = 60,
+};
+
+static const struct panel_desc olimex_lcd_olinuxino_5 = {
+ .modes = &olimex_lcd_olinuxino_5_mode,
+ .num_modes = 1,
+ .size = {
+ .width = 154,
+ .height = 86,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
+};
+static const struct drm_display_mode olimex_lcd_olinuxino_7_mode = {
+ .clock = 33300,
+ .hdisplay = 800,
+ .hsync_start = 800 + 210,
+ .hsync_end = 800 + 210 + 20,
+ .htotal = 800 + 210 + 20 + 26,
+ .vdisplay = 480,
+ .vsync_start = 480 + 22,
+ .vsync_end = 480 + 22 + 10,
+ .vtotal = 480 + 22 + 10 + 13,
+ .vrefresh = 60,
+};
+
+static const struct panel_desc olimex_lcd_olinuxino_7 = {
+ .modes = &olimex_lcd_olinuxino_7_mode,
+ .num_modes = 1,
+ .size = {
+ .width = 154,
+ .height = 86,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
+};
+
+static const struct drm_display_mode olimex_lcd_olinuxino_10_mode = {
+ .clock = 45000,
+ .hdisplay = 1024,
+ .hsync_start = 1024 + 10,
+ .hsync_end = 1024 + 10 + 6,
+ .htotal = 1024 + 10 + 6 + 160,
+ .vdisplay = 600,
+ .vsync_start = 600 + 1,
+ .vsync_end = 600 + 1 + 1,
+ .vtotal = 600 + 1 + 1 + 22,
+ .vrefresh = 60,
+};
+
+static const struct panel_desc olimex_lcd_olinuxino_10 = {
+ .modes = &olimex_lcd_olinuxino_10_mode,
+ .num_modes = 1,
+ .size = {
+ .width = 222,
+ .height = 143,
+ },
+ .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
+};
+
/*
* 800x480 CVT. The panel appears to be quite accepting, at least as far as
* pixel clocks, but this is the timing that was being used in the Adafruit
@@ -3411,9 +3506,25 @@ static const struct of_device_id platform_of_match[] = {
}, {
.compatible = "okaya,rs800480t-7x0gp",
.data = &okaya_rs800480t_7x0gp,
+ },{
+ .compatible = "olimex,olinuxino-vga-800x600",
+ .data = &olimex_vga_olinuxino_800_mode,
+ },{
+ .compatible = "olimex,olinuxino-vga-1024x768",
+ .data = &olimex_vga_olinuxino_1024_mode,
+
+ },{
+ .compatible = "olimex,lcd-olinuxino-4.3",
+ .data = &olimex_lcd_olinuxino_43,
+ }, {
+ .compatible = "olimex,lcd-olinuxino-5",
+ .data = &olimex_lcd_olinuxino_5,
+ }, {
+ .compatible = "olimex,lcd-olinuxino-7",
+ .data = &olimex_lcd_olinuxino_7,
}, {
- .compatible = "olimex,lcd-olinuxino-43-ts",
- .data = &olimex_lcd_olinuxino_43ts,
+ .compatible = "olimex,lcd-olinuxino-10",
+ .data = &olimex_lcd_olinuxino_10,
}, {
.compatible = "ontat,yx700wv03",
.data = &ontat_yx700wv03,
--
2.25.1

63
patch/kernel/sunxi-current/olimex_0016-input-touchscreen-sun4i-Enable-parsing.patch Normal file
View File

@ -0,0 +1,63 @@
From e06a7969a316149e35c96d7cbd98c9762dc144c8 Mon Sep 17 00:00:00 2001
From: Mitko Gamishev <hehopmajieh@debian.bg>
Date: Wed, 5 Feb 2020 15:18:04 +0200
Subject: [PATCH 16/48] input-touchscreen-sun4i-Enable-parsing-
---
drivers/input/touchscreen/sun4i-ts.c | 19 +++++++++++++++----
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/drivers/input/touchscreen/sun4i-ts.c b/drivers/input/touchscreen/sun4i-ts.c
index 742a7e96c1b5..be7a65786a87 100644
--- a/drivers/input/touchscreen/sun4i-ts.c
+++ b/drivers/input/touchscreen/sun4i-ts.c
@@ -32,6 +32,7 @@
#include <linux/thermal.h>
#include <linux/init.h>
#include <linux/input.h>
+#include <linux/input/touchscreen.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
@@ -106,6 +107,7 @@
struct sun4i_ts_data {
struct device *dev;
struct input_dev *input;
+ struct touchscreen_properties prop;
void __iomem *base;
unsigned int irq;
bool ignore_fifo_data;
@@ -123,8 +125,8 @@ static void sun4i_ts_irq_handle_input(struct sun4i_ts_data *ts, u32 reg_val)
y = readl(ts->base + TP_DATA);
/* The 1st location reported after an up event is unreliable */
if (!ts->ignore_fifo_data) {
- input_report_abs(ts->input, ABS_X, x);
- input_report_abs(ts->input, ABS_Y, y);
+ touchscreen_report_pos(ts->input, &ts->prop, x, y, false);
+
/*
* The hardware has a separate down status bit, but
* that gets set before we get the first location,
@@ -296,8 +298,17 @@ static int sun4i_ts_probe(struct platform_device *pdev)
ts->input->id.version = 0x0100;
ts->input->evbit[0] = BIT(EV_SYN) | BIT(EV_KEY) | BIT(EV_ABS);
__set_bit(BTN_TOUCH, ts->input->keybit);
- input_set_abs_params(ts->input, ABS_X, 0, 4095, 0, 0);
- input_set_abs_params(ts->input, ABS_Y, 0, 4095, 0, 0);
+
+ touchscreen_parse_properties(ts->input, false, &ts->prop);
+
+ if (!ts->prop.max_x || !ts->prop.max_y) {
+ dev_info(&pdev->dev, "Invalid configuration, using defaults\n");
+ ts->prop.max_x = 4095;
+ ts->prop.max_y = 4095;
+ }
+
+ input_set_abs_params(ts->input, ABS_X, 0, ts->prop.max_x, 0, 0);
+ input_set_abs_params(ts->input, ABS_Y, 0, ts->prop.max_y, 0, 0);
input_set_drvdata(ts->input, ts);
}
--
2.25.1

26
patch/kernel/sunxi-current/olimex_0018-net-dwmac-Apply-maximum-divider-for-clock-above-300M.patch Normal file
View File

@ -0,0 +1,26 @@
From a4aa5e03611fe24bef94b891716c2f11197b89ad Mon Sep 17 00:00:00 2001
From: Mitko Gamishev <hehopmajieh@debian.bg>
Date: Wed, 5 Feb 2020 15:30:38 +0200
Subject: [PATCH 18/48]
net-dwmac-Apply-maximum-divider-for-clock-above-300MHz.patch
---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 7da18c9afa01..ea236cc11bf6 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -252,7 +252,7 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv)
priv->clk_csr = STMMAC_CSR_100_150M;
else if ((clk_rate >= CSR_F_150M) && (clk_rate < CSR_F_250M))
priv->clk_csr = STMMAC_CSR_150_250M;
- else if ((clk_rate >= CSR_F_250M) && (clk_rate < CSR_F_300M))
+ else if (clk_rate >= CSR_F_250M)
priv->clk_csr = STMMAC_CSR_250_300M;
}
--
2.25.1

27
patch/kernel/sunxi-current/olimex_0019-mmc-sunxi-Disable-DDR52-mode-on-all-A20-based-boards.patch Normal file
View File

@ -0,0 +1,27 @@
From e715fb31c5ead4f7722098f08f684f85ba30ec21 Mon Sep 17 00:00:00 2001
From: Mitko Gamishev <hehopmajieh@debian.bg>
Date: Wed, 5 Feb 2020 15:31:25 +0200
Subject: [PATCH 19/48] mmc: sunxi: Disable DDR52 mode on all A20 based boards
---
drivers/mmc/host/sunxi-mmc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
index f87d7967457f..a903b370c7db 100644
--- a/drivers/mmc/host/sunxi-mmc.c
+++ b/drivers/mmc/host/sunxi-mmc.c
@@ -1401,7 +1401,9 @@ static int sunxi_mmc_probe(struct platform_device *pdev)
*/
if ((host->cfg->clk_delays || host->use_new_timings) &&
!of_device_is_compatible(pdev->dev.of_node,
- "allwinner,sun50i-h5-emmc"))
+ "allwinner,sun50i-h5-emmc") &&
+ !of_machine_is_compatible("allwinner,sun7i-a20") &&
+ !of_machine_is_compatible("olimex,a64-olinuxino-2ge8g"))
mmc->caps |= MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR;
ret = mmc_of_parse(mmc);
--
2.25.1

65
patch/kernel/sunxi-current/olimex_0020-arm-sun7i-a20-Add-support-for-A20-OLinuXino-LIME-eMM.patch Normal file
View File

@ -0,0 +1,65 @@
From 375cb91fa86007c5b413f8d2832e97a8fb115bda Mon Sep 17 00:00:00 2001
From: Stefan Mavrodiev <stefan@olimex.com>
Date: Tue, 10 Mar 2020 16:11:34 +0200
Subject: [PATCH 20/48] arm:sun7i-a20: Add support for A20-OLinuXino-LIME-eMMC
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
---
arch/arm/boot/dts/Makefile | 1 +
.../dts/sun7i-a20-olinuxino-lime-emmc.dts | 32 +++++++++++++++++++
2 files changed, 33 insertions(+)
create mode 100644 arch/arm/boot/dts/sun7i-a20-olinuxino-lime-emmc.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index d6546d2676b9..6bf3c5a98a0f 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1093,6 +1093,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-olimex-som204-evb.dtb \
sun7i-a20-olimex-som204-evb-emmc.dtb \
sun7i-a20-olinuxino-lime.dtb \
+ sun7i-a20-olinuxino-lime-emmc.dtb \
sun7i-a20-olinuxino-lime2.dtb \
sun7i-a20-olinuxino-lime2-emmc.dtb \
sun7i-a20-olinuxino-micro.dtb \
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime-emmc.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime-emmc.dts
new file mode 100644
index 000000000000..3090a93e230e
--- /dev/null
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime-emmc.dts
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2020 Olimex Ltd.
+ * Author: Stefan Mavrodiev <stefan@olimex.com>
+ */
+
+#include "sun7i-a20-olinuxino-lime.dts"
+
+/ {
+ model = "Olimex A20-OLinuXino-LIME2-eMMC";
+ compatible = "olimex,a20-olinuxino-lime2-emmc", "allwinner,sun7i-a20";
+
+ mmc2_pwrseq: pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = <&pio 2 16 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&mmc2 {
+ vmmc-supply = <&reg_vcc3v3>;
+ vqmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ non-removable;
+ mmc-pwrseq = <&mmc2_pwrseq>;
+ status = "okay";
+
+ emmc: emmc@0 {
+ reg = <0>;
+ compatible = "mmc-card";
+ broken-hpi;
+ };
+};
--
2.25.1

27
patch/kernel/sunxi-current/Add_HDMI_audio_support_for_the_sun4i-hdmi.patch → patch/kernel/sunxi-current/olimex_0023-drm-sun4i-hdmi-Add-support-for-sun4i-HDMI-encoder-au.patch
View File

@ -1,3 +1,9 @@
From d7d464455f1bf784723ddaaeb08cac61ce4f2e21 Mon Sep 17 00:00:00 2001
From: Stefan Mavrodiev <stefan@olimex.com>
Date: Tue, 28 Jan 2020 15:55:40 +0200
Subject: [PATCH 23/48] drm: sun4i: hdmi: Add support for sun4i HDMI encoder
audio
Add HDMI audio support for the sun4i-hdmi encoder, used on
the older Allwinner chips - A10, A20, A31.
@ -7,16 +13,6 @@ there where some problems with them and only S16_LE is left.
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
---
Changes for v3:
- Instead of platfrom_driver dynammicly register/unregister card
- Add Kconfig dependencies
- Restrore drvdata after card unregistering
Changes for v2:
- Create a new platform driver instead of using the HDMI encoder
- Expose a new kcontrol to the userspace holding the ELD data
- Wrap all macro arguments in parentheses
drivers/gpu/drm/sun4i/Kconfig | 11 +
drivers/gpu/drm/sun4i/Makefile | 3 +
drivers/gpu/drm/sun4i/sun4i_hdmi.h | 37 ++
@ -26,7 +22,7 @@ Changes for v2:
create mode 100644 drivers/gpu/drm/sun4i/sun4i_hdmi_audio.c
diff --git a/drivers/gpu/drm/sun4i/Kconfig b/drivers/gpu/drm/sun4i/Kconfig
index 37e90e42943f..ca2ab5d53dd4 100644
index 5755f0432e77..6a825103a392 100644
--- a/drivers/gpu/drm/sun4i/Kconfig
+++ b/drivers/gpu/drm/sun4i/Kconfig
@@ -23,6 +23,17 @@ config DRM_SUN4I_HDMI
@ -45,8 +41,8 @@ index 37e90e42943f..ca2ab5d53dd4 100644
+ controller and want to use audio.
+
config DRM_SUN4I_HDMI_CEC
bool "Allwinner A10 HDMI CEC Support"
depends on DRM_SUN4I_HDMI
bool "Allwinner A10 HDMI CEC Support"
depends on DRM_SUN4I_HDMI
diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile
index 0d04f2447b01..492bfd28ad2e 100644
--- a/drivers/gpu/drm/sun4i/Makefile
@ -135,7 +131,7 @@ index 7ad3f06c127e..28621d289655 100644
#endif /* _SUN4I_HDMI_H_ */
diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi_audio.c b/drivers/gpu/drm/sun4i/sun4i_hdmi_audio.c
new file mode 100644
index 000000000000..f42f2cea4e9e
index 000000000000..2ac967bfdcc5
--- /dev/null
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi_audio.c
@@ -0,0 +1,450 @@
@ -635,3 +631,6 @@ index 68d4644ac2dc..4cd35c97c503 100644
hdmi->hdmi_monitor = drm_detect_hdmi_monitor(edid);
DRM_DEBUG_DRIVER("Monitor is %s monitor\n",
hdmi->hdmi_monitor ? "an HDMI" : "a DVI");
--
2.25.1

132
patch/kernel/sunxi-current/olimex_0027-Added-panel-node-needed-to-fix-overlay-tests.patch Normal file
View File

@ -0,0 +1,132 @@
From 3ac3159b7a641c0951e636a9bc003aadaceb601c Mon Sep 17 00:00:00 2001
From: hehopmajieh <hehopmajieh@debian.bg>
Date: Thu, 19 Mar 2020 10:40:44 +0200
Subject: [PATCH 27/48] Added panel node, needed to fix overlay tests
---
arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 79 +++++++++++++----------
1 file changed, 44 insertions(+), 35 deletions(-)
diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
index 39101228a755..0d3afc99ec77 100644
--- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
+++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
@@ -48,6 +48,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
+#include <dt-bindings/pwm/pwm.h>
/ {
model = "Olimex A13-Olinuxino";
@@ -72,40 +73,28 @@ power {
};
};
- bridge {
- compatible = "dumb-vga-dac";
+ lcd_backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
+ brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
+ default-brightness-level = <8>;
+ };
+
+ panel: panel {
+ compatible = "olimex,lcd-olinuxino-4.3";
+ backlight = <&lcd_backlight>;
+ enable-gpios = <&axp_gpio 0 GPIO_ACTIVE_HIGH>; /* AXP GPIO0 */
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port {
+ panel_input: endpoint {
+ remote-endpoint = <&tcon0_out_lcd>;
+ };
+ };
+
+ };
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- vga_bridge_in: endpoint {
- remote-endpoint = <&tcon0_out_vga>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- vga_bridge_out: endpoint {
- remote-endpoint = <&vga_con_in>;
- };
- };
- };
- };
-
- vga {
- compatible = "vga-connector";
-
- port {
- vga_con_in: endpoint {
- remote-endpoint = <&vga_bridge_out>;
- };
- };
- };
};
&be0 {
@@ -130,6 +119,11 @@ axp209: pmic@34 {
interrupt-controller;
#interrupt-cells = <1>;
+ axp_gpio:gpio{
+ compatible = "x-powers,axp209-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
};
};
@@ -221,12 +215,18 @@ &tcon0 {
};
&tcon0_out {
- tcon0_out_vga: endpoint@0 {
+ tcon0_out_lcd: endpoint@0 {
reg = <0>;
- remote-endpoint = <&vga_bridge_in>;
+ remote-endpoint = <&panel_input>;
};
};
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pin>;
+ status = "okay";
+};
+
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pg_pins>;
@@ -245,3 +245,12 @@ &usbphy {
usb1_vbus-supply = <&reg_usb1_vbus>;
status = "okay";
};
+
+&rtp {
+ allwinner,ts-attached;
+ #thermal-sensor-cells = <0>;
+ /* sensitive/noisy touch panel */
+ touchscreen-inverted-x;
+ allwinner,tp-sensitive-adjust = <0>;
+ allwinner,filter-type = <3>;
+};
--
2.25.1

38
patch/kernel/sunxi-current/olimex_0029-dts-sun50i-a64-olinuxino-emmc-enable-bluetooth.patch Normal file
View File

@ -0,0 +1,38 @@
From 68fa310f3a51b73d3a7c92b1fb460dc7b99f52f9 Mon Sep 17 00:00:00 2001
From: Stefan Saraev <stefan@saraev.ca>
Date: Fri, 20 Mar 2020 13:53:44 +0200
Subject: [PATCH 29/48] dts: sun50i-a64-olinuxino-emmc: enable bluetooth
---
.../dts/allwinner/sun50i-a64-olinuxino-emmc.dts | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts
index efb20846de49..963b8b2075e8 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts
@@ -22,4 +22,21 @@ &mmc2 {
&pio {
vcc-pc-supply = <&reg_eldo1>;
+ uart1_cts_pins: uart1_cts_pins {
+ pins = "PG8";
+ function = "uart1";
+ };
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_cts_pins>;
+ status = "okay";
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "olinuxino";
+ };
};
--
2.25.1

41
patch/kernel/sunxi-current/olimex_0030-dts-sun50i-a64-olinuxino-1Ge16GW-enable-bluetooth.patch Normal file
View File

@ -0,0 +1,41 @@
From a34c92af958fa32200c3776876eb10715de1e34d Mon Sep 17 00:00:00 2001
From: Stefan Saraev <stefan@saraev.ca>
Date: Fri, 20 Mar 2020 17:31:49 +0200
Subject: [PATCH 30/48] dts: sun50i-a64-olinuxino-1Ge16GW: enable bluetooth
---
.../sun50i-a64-olinuxino-1Ge16GW.dts | 21 +++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
index a508d77d2c09..100a7ce499a6 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
@@ -18,3 +18,24 @@ &mmc2 {
mmc-hs200-1_8v;
allwinner,drive-data-phase = <180>;
};
+
+&pio {
+ vcc-pc-supply = <&reg_eldo1>;
+ uart1_cts_pins: uart1_cts_pins {
+ pins = "PG8";
+ function = "uart1";
+ };
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_cts_pins>;
+ status = "okay";
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "olinuxino";
+ };
+};
--
2.25.1

477
patch/kernel/sunxi-current/olimex_0031-sun8i-s3-initial-support-needed-for-OLinuXino-S3-boa.patch Normal file
View File

@ -0,0 +1,477 @@
From a8b4a7d93b3616e58e65ab6da5501a376b74ecdc Mon Sep 17 00:00:00 2001
From: S3EVB <hehopmajieh@debian.bg>
Date: Mon, 30 Mar 2020 15:23:02 +0300
Subject: [PATCH 31/48] sun8i-s3 initial support, needed for OLinuXino-S3
boards
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/sun8i-s3-olinuxino.dts | 256 +++++++++++++++++++++++
arch/arm/boot/dts/sun8i-v3s.dtsi | 137 ++++++++++++
3 files changed, 394 insertions(+)
create mode 100644 arch/arm/boot/dts/sun8i-s3-olinuxino.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 5933ec4b8b2b..d7a1562af413 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1156,6 +1156,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-r16-parrot.dtb \
sun8i-r40-bananapi-m2-ultra.dtb \
sun8i-s3-lichee-zero-plus.dtb \
+ sun8i-s3-olinuxino.dtb \
sun8i-t3-cqa3t-bv3.dtb \
sun8i-v3s-licheepi-zero.dtb \
sun8i-v3s-licheepi-zero-dock.dtb \
diff --git a/arch/arm/boot/dts/sun8i-s3-olinuxino.dts b/arch/arm/boot/dts/sun8i-s3-olinuxino.dts
new file mode 100644
index 000000000000..e06c7aaea2fa
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-s3-olinuxino.dts
@@ -0,0 +1,256 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2020 Dimitar Gamishev <hehopmajieh@debian.bg>
+*/
+
+/dts-v1/;
+#include "sun8i-v3.dtsi"
+
+#include "sunxi-common-regulators.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ model = "Olimex S3-OLinuXino";
+ compatible = "olimex,s3-olinuxino", "sochip,s3",
+ "allwinner,sun8i-v3";
+
+ aliases {
+ serial0 = &uart1;
+ ethernet0 = &emac;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
+ brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
+ default-brightness-level = <8>;
+
+ };
+
+ panel: panel {
+ compatible = "olimex,lcd-olinuxino-7";
+ backlight = <&backlight>;
+ enable-gpios = <&pio 4 18 GPIO_ACTIVE_HIGH>; /* PE18 */
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port {
+ panel_input: endpoint {
+ remote-endpoint = <&tcon0_out_lcd>;
+ };
+ };
+
+ };
+ leds {
+ compatible = "gpio-leds";
+
+ status_led {
+ label = "mp130:orange:status";
+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+};
+
+
+&mmc0 {
+ broken-cd;
+ bus-width = <4>;
+ vmmc-supply = <&reg_vcc3v3>;
+ status = "okay";
+};
+
+&emac {
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ rtl8723bs: sdio_wifi@1 {
+ reg = <1>;
+ };
+};
+
+&uart1 {
+ pinctrl-0 = <&uart1_pg_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&i2c0 {
+ status="okay";
+ axp209: pmic@34 {
+ reg = <0x34>;
+ interrupt-parent = <&nmi_intc>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
+&usb_otg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&de {
+ status="okay";
+};
+
+&tcon0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_rgb666_pins>;
+ status = "okay";
+};
+
+&tcon0_out {
+ tcon0_out_lcd: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&panel_input>;
+ };
+};
+
+#include "axp209.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+&battery_power_supply {
+ status = "okay";
+};
+
+&reg_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vcc-emac";
+};
+
+&reg_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc3v3";
+};
+
+&reg_ldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vcc-pll";
+};
+
+&reg_ldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "dvdd";
+};
+
+&reg_ldo4 {
+ regulator-min-microvolt = <2400000>;
+ regulator-max-microvolt = <2400000>;
+ regulator-name = "avdd-csi";
+};
+
+&pio {
+ vcc-pa-supply = <&reg_vcc3v3>;
+ vcc-pc-supply = <&reg_vcc3v3>;
+ vcc-pe-supply = <&reg_ldo3>;
+ vcc-pf-supply = <&reg_vcc3v3>;
+ vcc-pg-supply = <&reg_ldo4>;
+
+ led_pins_olinuxinolime: led-pins {
+ pins = "PH2";
+ function = "gpio_out";
+ drive-strength = <20>;
+ };
+};
+
+
+&reg_usb0_vbus {
+ gpio = <&pio 2 10 GPIO_ACTIVE_HIGH>; /* PB10 */
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&csi1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&csi1_pins>;
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* Parallel bus endpoint */
+ csi_from_ov2640: endpoint {
+ remote-endpoint = <&ov2640_to_csi>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ bus-width = <10>;
+ pclk-sample = <1>;
+ };
+ };
+};
+
+&i2c1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+
+ ov2640: camera@30 {
+ compatible = "ovti,ov2640";
+ reg = <0x30>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&csi1_mclk>;
+ clocks = <&ccu CLK_CSI1_MCLK>;
+ clock-names = "xvclk";
+ assigned-clocks = <&ccu CLK_CSI1_MCLK>;
+ assigned-clock-rates = <24000000>;
+ reset-gpios = <&pio 4 17 GPIO_ACTIVE_LOW>;
+ powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>;
+
+ port {
+ ov2640_to_csi: endpoint {
+ remote-endpoint = <&csi_from_ov2640>;
+ bus-width = <10>;
+ };
+ };
+ };
+};
+
+
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pin>;
+ status = "okay";
+};
+
+&usbphy {
+ usb0_id_det-gpios = <&pio 6 9 GPIO_ACTIVE_HIGH>;
+ usb0_vbus-supply = <&reg_usb0_vbus>;
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index e5312869c0d2..4408ec5508f2 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -138,6 +138,61 @@ mixer0_out_tcon0: endpoint {
};
};
+ syscon: syscon@1c00000 {
+ compatible = "allwinner,sun8i-v3-system-controller",
+ "syscon";
+ reg = <0x01c00000 0x1000>;
+ };
+
+ emac: ethernet@1c30000 {
+ compatible = "allwinner,sun8i-v3s-emac";
+ syscon = <&syscon>;
+ reg = <0x01c30000 0x10000>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ resets = <&ccu RST_BUS_EMAC>;
+ reset-names = "stmmaceth";
+ clocks = <&ccu CLK_BUS_EMAC>;
+ clock-names = "stmmaceth";
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ };
+
+ mdio-mux {
+ compatible = "allwinner,sun8i-v3s-mdio-mux",
+ "allwinner,sun8i-h3-mdio-mux";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mdio-parent-bus = <&mdio>;
+
+ internal_mdio: mdio@1 {
+ compatible = "allwinner,sun8i-v3s-mdio-internal",
+ "allwinner,sun8i-h3-mdio-internal";
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ int_mii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ clocks = <&ccu CLK_BUS_EPHY>;
+ resets = <&ccu RST_BUS_EPHY>;
+ };
+ };
+
+ /* V3s has no external MDIO bus, but V3 has it */
+ };
+ };
+
tcon0: lcd-controller@1c0c000 {
compatible = "allwinner,sun8i-v3s-tcon";
reg = <0x01c0c000 0x1000>;
@@ -172,6 +227,13 @@ tcon0_out: port@1 {
};
};
+ nmi_intc: interrupt-controller@1c00030 {
+ compatible = "allwinner,sun7i-a20-sc-nmi";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x01c00030 0x0c>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+ };
mmc0: mmc@1c0f000 {
compatible = "allwinner,sun7i-a20-mmc";
@@ -280,6 +342,19 @@ rtc: rtc@1c20400 {
clock-output-names = "osc32k", "osc32k-out";
};
+
+ csi1: csi@1cb4000 {
+ compatible = "allwinner,sun8i-v3s-csi";
+ reg = <0x01cb4000 0x1000>;
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_CSI>,
+ <&ccu CLK_CSI1_SCLK>,
+ <&ccu CLK_DRAM_CSI>;
+ clock-names = "bus", "mod", "ram";
+ resets = <&ccu RST_BUS_CSI>;
+ status = "disabled";
+ };
+
pio: pinctrl@1c20800 {
compatible = "allwinner,sun8i-v3s-pinctrl";
reg = <0x01c20800 0x400>;
@@ -296,11 +371,22 @@ i2c0_pins: i2c0-pins {
pins = "PB6", "PB7";
function = "i2c0";
};
+
+ i2c1_pins: i2c1-pins {
+ pins = "PE21", "PE22";
+ function = "i2c1";
+
+ };
uart0_pb_pins: uart0-pb-pins {
pins = "PB8", "PB9";
function = "uart0";
};
+
+ uart1_pg_pins: uart1-pg-pins {
+ pins = "PG6", "PG7";
+ function = "uart1";
+ };
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
@@ -322,6 +408,33 @@ spi0_pins: spi0-pins {
pins = "PC0", "PC1", "PC2", "PC3";
function = "spi0";
};
+
+ pwm_pin: pwm-pin {
+ pins = "PB4";
+ function = "pwm";
+ };
+
+ lcd_rgb666_pins: lcd-rgb666-pins {
+ pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5",
+ "PD6", "PD7", "PD8", "PD9", "PD10", "PD11",
+ "PD12", "PD13", "PD14", "PD15", "PD16", "PD17",
+ "PD18", "PD19", "PD20", "PD21";
+ function = "lcd";
+ };
+
+ csi1_pins: csi-pins {
+ pins = "PE0", "PE2", "PE3", "PE6",
+ "PE7", "PE8", "PE9", "PE10", "PE11",
+ "PE12","PE13","PE14","PE15";
+
+ function = "csi";
+ };
+ csi1_mclk: csi1-mclk {
+ pins = "PE1";
+ function = "csi";
+ };
+
+
};
timer@1c20c00 {
@@ -428,5 +541,29 @@ gic: interrupt-controller@1c81000 {
#interrupt-cells = <3>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
+ pwm: pwm@1c21400 {
+ compatible = "allwinner,sun8i-h3-pwm";
+ reg = <0x01c21400 0x8>;
+ clocks = <&osc24M>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+
+ /*
+ codec: codec@1c22c00 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun8i-h3-codec";
+ reg = <0x01c22c00 0x400>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
+ clock-names = "apb", "codec";
+ resets = <&ccu RST_BUS_CODEC>;
+ dmas = <&dma 15>, <&dma 15>;
+ dma-names = "rx", "tx";
+ allwinner,codec-analog-controls = <&codec_analog>;
+ status = "disabled";
+ };*/
+
};
};
--
2.25.1

27
patch/kernel/sunxi-current/olimex_0032-Fixed-p2m-function-name-n.patch Normal file
View File

@ -0,0 +1,27 @@
From c9461669c81624409660cfbc01bfcfff44b6e2e5 Mon Sep 17 00:00:00 2001
From: hehopmajieh <hehopmajieh@debian.bg>
Date: Tue, 31 Mar 2020 15:46:37 +0300
Subject: [PATCH 32/48] Fixed p2m function name \n OV2640 cam module enabled in
defconfig
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 2 +-
arch/arm/configs/olinuxino_defconfig | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 4408ec5508f2..88672b0be6a1 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -411,7 +411,7 @@ spi0_pins: spi0-pins {
pwm_pin: pwm-pin {
pins = "PB4";
- function = "pwm";
+ function = "pwm0";
};
lcd_rgb666_pins: lcd-rgb666-pins {
--
2.25.1

42
patch/kernel/sunxi-current/olimex_0035-a64-adjust-thermal-trip-points.patch Normal file
View File

@ -0,0 +1,42 @@
From 953de1c1e4ea265dc3ddd08694fa958813ff3d82 Mon Sep 17 00:00:00 2001
From: Stefan Saraev <stefan@saraev.ca>
Date: Mon, 6 Apr 2020 15:26:10 +0300
Subject: [PATCH 35/48] a64: adjust thermal trip points
default values for alert1/crit are way too high.
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index fb176ac9fb89..9edf17bf6e4f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -212,21 +212,21 @@ map1 {
trips {
cpu_alert0: cpu_alert0 {
/* milliCelsius */
- temperature = <75000>;
+ temperature = <70000>;
hysteresis = <2000>;
type = "passive";
};
cpu_alert1: cpu_alert1 {
/* milliCelsius */
- temperature = <90000>;
+ temperature = <80000>;
hysteresis = <2000>;
type = "hot";
};
cpu_crit: cpu_crit {
/* milliCelsius */
- temperature = <110000>;
+ temperature = <90000>;
hysteresis = <2000>;
type = "critical";
};
--
2.25.1

27
patch/kernel/sunxi-current/olimex_0036-Fix-lcd_olinuxino_10-timings.patch Normal file
View File

@ -0,0 +1,27 @@
From 6b49994056ac5987e08ec77d8fc17b1139ccaa32 Mon Sep 17 00:00:00 2001
From: hehopmajieh <hehopmajieh@debian.bg>
Date: Thu, 9 Apr 2020 15:19:06 +0300
Subject: [PATCH 36/48] Fix lcd_olinuxino_10 timings
---
drivers/gpu/drm/panel/panel-simple.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index ad10dd8858cf..380cb8456f91 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -2430,8 +2430,8 @@ static const struct panel_desc olimex_lcd_olinuxino_7 = {
static const struct drm_display_mode olimex_lcd_olinuxino_10_mode = {
.clock = 45000,
.hdisplay = 1024,
- .hsync_start = 1024 + 10,
- .hsync_end = 1024 + 10 + 6,
+ .hsync_start = 1024 + 16,
+ .hsync_end = 1024 + 16 + 1,
.htotal = 1024 + 10 + 6 + 160,
.vdisplay = 600,
.vsync_start = 600 + 1,
--
2.25.1

24
patch/kernel/sunxi-current/olimex_0037-Add-vqmmc-node-to-A20-Micro-emmc-dts.patch Normal file
View File

@ -0,0 +1,24 @@
From 2df2507ae821d6df58ee327cfdd71a3bb018e273 Mon Sep 17 00:00:00 2001
From: hehopmajieh <hehopmajieh@debian.bg>
Date: Tue, 14 Apr 2020 10:28:16 +0300
Subject: [PATCH 37/48] Add vqmmc node to A20-Micro-emmc dts
---
arch/arm/boot/dts/sun7i-a20-olinuxino-micro-emmc.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro-emmc.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro-emmc.dts
index 2337b44a88aa..c79e9ad02812 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro-emmc.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro-emmc.dts
@@ -55,6 +55,7 @@ mmc2_pwrseq: pwrseq {
&mmc2 {
vmmc-supply = <&reg_vcc3v3>;
+ vqmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
non-removable;
mmc-pwrseq = <&mmc2_pwrseq>;
--
2.25.1

25
patch/kernel/sunxi-current/olimex_0038-dts-fix-lime-emmc-compatible-string.patch Normal file
View File

@ -0,0 +1,25 @@
From 6a4e0a186640eec308d300449d1ada17f2f20868 Mon Sep 17 00:00:00 2001
From: Stefan Saraev <stefan@saraev.ca>
Date: Thu, 16 Apr 2020 11:01:10 +0300
Subject: [PATCH 38/48] dts: fix lime-emmc compatible string
---
arch/arm/boot/dts/sun7i-a20-olinuxino-lime-emmc.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime-emmc.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime-emmc.dts
index 3090a93e230e..61b17f1e5ce8 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime-emmc.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime-emmc.dts
@@ -8,7 +8,7 @@
/ {
model = "Olimex A20-OLinuXino-LIME2-eMMC";
- compatible = "olimex,a20-olinuxino-lime2-emmc", "allwinner,sun7i-a20";
+ compatible = "olimex,a20-olinuxino-lime-emmc", "allwinner,sun7i-a20";
mmc2_pwrseq: pwrseq {
compatible = "mmc-pwrseq-emmc";
--
2.25.1

27
patch/kernel/sunxi-current/olimex_0042-Disable-clock-phase-and-hs-just-for-test.patch Normal file
View File

@ -0,0 +1,27 @@
From e0e93043e06eda7a10ca02f1ecfc297025bfd139 Mon Sep 17 00:00:00 2001
From: hehopmajieh <hehopmajieh@debian.bg>
Date: Wed, 20 May 2020 09:25:56 +0300
Subject: [PATCH 42/48] Disable clock phase and hs just for test
---
.../arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
index 100a7ce499a6..41c7a4ed4287 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
@@ -15,8 +15,8 @@ / {
&mmc2 {
vqmmc-supply = <&reg_eldo1>;
- mmc-hs200-1_8v;
- allwinner,drive-data-phase = <180>;
+/* mmc-hs200-1_8v;
+ allwinner,drive-data-phase = <180>;*/
};
&pio {
--
2.25.1

27
patch/kernel/sunxi-current/olimex_0044-lime2-enable-audio-codec.patch Normal file
View File

@ -0,0 +1,27 @@
From 0dec0ef493372d2a3cfe9ad3f03ff293bcb81607 Mon Sep 17 00:00:00 2001
From: Stefan Saraev <stefan@saraev.ca>
Date: Wed, 3 Jun 2020 13:49:44 +0300
Subject: [PATCH 44/48] lime2: enable audio codec
---
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
index 9ba62774e89a..5b048797053c 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
@@ -96,6 +96,10 @@ &ahci {
status = "okay";
};
+&codec {
+ status = "okay";
+};
+
&de {
status = "okay";
};
--
2.25.1

28
patch/kernel/sunxi-current/olimex_0045-lime2-enable-ldo3-always-on.patch Normal file
View File

@ -0,0 +1,28 @@
From e557460ce2c42ae10213e2ec88234406e3a21c41 Mon Sep 17 00:00:00 2001
From: hehopmajieh <hehopmajieh@debian.bg>
Date: Tue, 16 Jun 2020 15:40:59 +0300
Subject: [PATCH 45/48] lime2: enable ldo3 always-on
---
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
index 5b048797053c..a03cf25cf2aa 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
@@ -237,10 +237,10 @@ &reg_ldo2 {
};
&reg_ldo3 {
+ regulator-always-on;
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "vddio-csi0";
- regulator-soft-start;
regulator-ramp-delay = <1600>;
};
--
2.25.1

55
patch/kernel/sunxi-current/olimex_0048-dts-a20-micro-a20-som-a20-som204-decrease-dcdc2-min-.patch Normal file
View File

@ -0,0 +1,55 @@
From 5634e0bd29c2b15ce5b5a1c3b8fc1c324c041929 Mon Sep 17 00:00:00 2001
From: Stefan Saraev <stefan@saraev.ca>
Date: Wed, 24 Jun 2020 20:53:36 +0300
Subject: [PATCH 48/48] dts: a20-micro, a20-som, a20-som204: decrease dcdc2 min
voltage
fixes some kernel crashes
---
arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
index 6f9c54b8e49a..b30d199490c8 100644
--- a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
@@ -247,7 +247,7 @@ &reg_ahci_5v {
&reg_dcdc2 {
regulator-always-on;
- regulator-min-microvolt = <1000000>;
+ regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1400000>;
regulator-name = "vdd-cpu";
};
diff --git a/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts b/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts
index 230d62a6b8f1..48c8bb05cfe9 100644
--- a/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts
@@ -218,7 +218,7 @@ &reg_ahci_5v {
&reg_dcdc2 {
regulator-always-on;
- regulator-min-microvolt = <1000000>;
+ regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1400000>;
regulator-name = "vdd-cpu";
};
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
index 359bd0d5b3b1..4de49cf7ebee 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
@@ -268,7 +268,7 @@ &battery_power_supply {
&reg_dcdc2 {
regulator-always-on;
- regulator-min-microvolt = <1000000>;
+ regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1400000>;
regulator-name = "vdd-cpu";
};
--
2.25.1