rk3588: edge: Bump kernel from 6.8 to 6.10

- Bump mainline kernel from 6.10-rc1 to 6.10-rc2
- Remove patches which are now mainlined
- Re-number "fix-initial-PERST-GPIO-value" patch as per number
  ordering seen in 0000.patching_config.yaml
- Rewrite kernel config

config/sources/families/rockchip-rk3588.conf

@@ -42,7 +42,7 @@ case $BRANCH in
 	edge)
 		LINUXFAMILY=rockchip-rk3588
 		LINUXCONFIG='linux-rockchip-rk3588-'$BRANCH
-		KERNEL_MAJOR_MINOR="6.8" # Major and minor versions of this kernel.
+		KERNEL_MAJOR_MINOR="6.10" # Major and minor versions of this kernel.
 		KERNELPATCHDIR='rockchip-rk3588-edge'
 		;;
 

config/sources/mainline-kernel.conf.sh

@@ -8,7 +8,7 @@
 function mainline_kernel_decide_version__upstream_release_candidate_number() {
 	[[ -n "${KERNELBRANCH}" ]] && return 0          # if already set, don't touch it; that way other hooks can run in any order
 	if [[ "${KERNEL_MAJOR_MINOR}" == "6.10" ]]; then # @TODO: roll over to next MAJOR.MINOR and MAJOR.MINOR-rc1 when it is released
-		declare -g KERNELBRANCH="tag:v6.10-rc1"
+		declare -g KERNELBRANCH="tag:v6.10-rc2"
 		display_alert "mainline-kernel: upstream release candidate" "Using KERNELBRANCH='${KERNELBRANCH}' for KERNEL_MAJOR_MINOR='${KERNEL_MAJOR_MINOR}'" "info"
 	fi
 }

patch/kernel/rockchip-rk3588-edge/0000.patching_config.yaml

@@ -2,20 +2,22 @@ config: # This is file 'patch/kernel/rockchip-rk3588-edge/0000.patching_config.y
 
   # PATCH NUMBERING INFO
   #
+  # Patches should be ordered in such a way that general kernel patches are applied first, then SoC-related patches and at last board-specific patches
+  #
   # Patch numbers in this folder are sorted by category:
   #
   # 000* for general patches
   # 01** for GPU/HDMI related patches
   # 08** for wireless patches
-  # 1*** for board patches
-  # 101* for Rock-5B, 1012* for Rock-5A and so on
+  # 1*** for board specific patches:
+  # 101* for Rock-5B, 102* for Rock-5A and so on
 
   # Just some info stuff; not used by the patching scripts
   name: rockchip-rk3588-edge
   kind: kernel
   type: mainline # or: vendor
-  branch: linux-6.8.y
-  last-known-good-tag: v6.8.3
+  branch: linux-6.10.y
+  last-known-good-tag: v6.10-rc2
   maintainers:
     - { github: rpardini, name: Ricardo Pardini, email: ricardo@pardini.net, armbian-forum: rpardini }
 
@@ -43,4 +45,3 @@ config: # This is file 'patch/kernel/rockchip-rk3588-edge/0000.patching_config.y
       - "Documentation/devicetree/bindings/arm/rockchip.yaml" # constant churn, conflicts on every bump, drop it. sorry.
     do-not-commit-regexes: # Python-style regexes
       - "^arch/([a-zA-Z0-9]+)/boot/dts/([a-zA-Z0-9]+)/Makefile$" # ignore DT Makefile patches, we've an auto-patcher now
-

patch/kernel/rockchip-rk3588-edge/0005-tools-Makefile-delete-missing-cgroup_clean.patch

@@ -1,34 +0,0 @@
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: amazingfate <liujianfeng1994@gmail.com>
-Date: Wed, 24 Jan 2024 18:03:52 +0800
-Subject: tools/Makefile: delete missing cgroup_clean
-
----
- tools/Makefile | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/tools/Makefile b/tools/Makefile
-index 37e9f6804832..9903abe51d5f 100644
---- a/tools/Makefile
-+++ b/tools/Makefile
-@@ -169,7 +169,7 @@ acpi_clean:
- cpupower_clean:
- 	$(call descend,power/cpupower,clean)
- 
--cgroup_clean counter_clean hv_clean firewire_clean bootconfig_clean spi_clean usb_clean virtio_clean mm_clean wmi_clean bpf_clean iio_clean gpio_clean objtool_clean leds_clean pci_clean firmware_clean debugging_clean tracing_clean:
-+counter_clean hv_clean firewire_clean bootconfig_clean spi_clean usb_clean virtio_clean mm_clean wmi_clean bpf_clean iio_clean gpio_clean objtool_clean leds_clean pci_clean firmware_clean debugging_clean tracing_clean:
- 	$(call descend,$(@:_clean=),clean)
- 
- libapi_clean:
-@@ -209,7 +209,7 @@ freefall_clean:
- build_clean:
- 	$(call descend,build,clean)
- 
--clean: acpi_clean cgroup_clean counter_clean cpupower_clean hv_clean firewire_clean \
-+clean: acpi_clean counter_clean cpupower_clean hv_clean firewire_clean \
- 		perf_clean selftests_clean turbostat_clean bootconfig_clean spi_clean usb_clean virtio_clean \
- 		mm_clean bpf_clean iio_clean x86_energy_perf_policy_clean tmon_clean \
- 		freefall_clean build_clean libbpf_clean libsubcmd_clean \
--- 
-Armbian
-

patch/kernel/rockchip-rk3588-edge/0136-arm64-dts-rockchip-Add-HDMI0-PHY-to-rk3588.patch

@@ -1,54 +0,0 @@
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
-Date: Mon, 19 Feb 2024 22:46:25 +0200
-Subject: arm64: dts: rockchip: Add HDMI0 PHY to rk3588
-
-Add DT nodes for HDMI0 PHY and related syscon found on RK3588 SoC.
-
-Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
----
- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 21 ++++++++++
- 1 file changed, 21 insertions(+)
-
-diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
-index c7a912617b79..ca34e95b8008 100644
---- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
-+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
-@@ -859,6 +859,11 @@ u2phy3_host: host-port {
- 		};
- 	};
- 
-+	hdptxphy0_grf: syscon@fd5e0000 {
-+		compatible = "rockchip,rk3588-hdptxphy-grf", "syscon";
-+		reg = <0x0 0xfd5e0000 0x0 0x100>;
-+	};
-+
- 	ioc: syscon@fd5f0000 {
- 		compatible = "rockchip,rk3588-ioc", "syscon";
- 		reg = <0x0 0xfd5f0000 0x0 0x10000>;
-@@ -2848,6 +2853,22 @@ usbdp_phy0: phy@fed80000 {
- 		status = "disabled";
- 	};
- 
-+	hdptxphy_hdmi0: phy@fed60000 {
-+		compatible = "rockchip,rk3588-hdptx-phy";
-+		reg = <0x0 0xfed60000 0x0 0x2000>;
-+		clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>, <&cru PCLK_HDPTX0>;
-+		clock-names = "ref", "apb";
-+		#phy-cells = <0>;
-+		resets = <&cru SRST_HDPTX0>, <&cru SRST_P_HDPTX0>,
-+			 <&cru SRST_HDPTX0_INIT>, <&cru SRST_HDPTX0_CMN>,
-+			 <&cru SRST_HDPTX0_LANE>, <&cru SRST_HDPTX0_ROPLL>,
-+			 <&cru SRST_HDPTX0_LCPLL>;
-+		reset-names = "phy", "apb", "init", "cmn", "lane", "ropll",
-+			      "lcpll";
-+		rockchip,grf = <&hdptxphy0_grf>;
-+		status = "disabled";
-+	};
-+
- 	combphy0_ps: phy@fee00000 {
- 		compatible = "rockchip,rk3588-naneng-combphy";
- 		reg = <0x0 0xfee00000 0x0 0x100>;
--- 
-Armbian
-

patch/kernel/rockchip-rk3588-edge/0142-arm64-dts-rockchip-rk3588-Add-GPU-nodes.patch

@@ -1,151 +0,0 @@
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: Boris Brezillon <boris.brezillon@collabora.com>
-Date: Mon, 7 Aug 2023 17:30:58 +0200
-Subject: arm64: dts: rockchip: rk3588: Add GPU nodes
-
-Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
----
- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 120 ++++++++++
- 1 file changed, 120 insertions(+)
-
-diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
-index 58f7740b0e3c..0451a512a3dc 100644
---- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
-+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
-@@ -733,6 +733,121 @@ usb_host2_xhci: usb@fcd00000 {
- 		status = "disabled";
- 	};
- 
-+	gpu_opp_table: gpu-opp-table {
-+		compatible = "operating-points-v2";
-+
-+		nvmem-cells = <&gpu_leakage>;
-+		nvmem-cell-names = "leakage";
-+
-+		rockchip,pvtm-voltage-sel = <
-+			0	815	0
-+			816	835	1
-+			836	860	2
-+			861	885	3
-+			886	910	4
-+			911	9999	5
-+		>;
-+		rockchip,pvtm-pvtpll;
-+		rockchip,pvtm-offset = <0x1c>;
-+		rockchip,pvtm-sample-time = <1100>;
-+		rockchip,pvtm-freq = <800000>;
-+		rockchip,pvtm-volt = <750000>;
-+		rockchip,pvtm-ref-temp = <25>;
-+		rockchip,pvtm-temp-prop = <(-135) (-135)>;
-+		rockchip,pvtm-thermal-zone = "gpu-thermal";
-+
-+		clocks = <&cru CLK_GPU>;
-+		clock-names = "clk";
-+		rockchip,grf = <&gpu_grf>;
-+		volt-mem-read-margin = <
-+			855000	1
-+			765000	2
-+			675000	3
-+			495000	4
-+		>;
-+		low-volt-mem-read-margin = <4>;
-+		intermediate-threshold-freq = <400000>;	/* KHz */
-+
-+		rockchip,temp-hysteresis = <5000>;
-+		rockchip,low-temp = <10000>;
-+		rockchip,low-temp-min-volt = <750000>;
-+		rockchip,high-temp = <85000>;
-+		rockchip,high-temp-max-freq = <800000>;
-+
-+		opp-300000000 {
-+			opp-hz = /bits/ 64 <300000000>;
-+			opp-microvolt = <675000 675000 850000>;
-+		};
-+		opp-400000000 {
-+			opp-hz = /bits/ 64 <400000000>;
-+			opp-microvolt = <675000 675000 850000>;
-+		};
-+		opp-500000000 {
-+			opp-hz = /bits/ 64 <500000000>;
-+			opp-microvolt = <675000 675000 850000>;
-+		};
-+		opp-600000000 {
-+			opp-hz = /bits/ 64 <600000000>;
-+			opp-microvolt = <675000 675000 850000>;
-+		};
-+		opp-700000000 {
-+			opp-hz = /bits/ 64 <700000000>;
-+			opp-microvolt = <700000 700000 850000>;
-+			opp-microvolt-L2 = <687500 687500 850000>;
-+			opp-microvolt-L3 = <675000 675000 850000>;
-+			opp-microvolt-L4 = <675000 675000 850000>;
-+			opp-microvolt-L5 = <675000 675000 850000>;
-+		};
-+		opp-800000000 {
-+			opp-hz = /bits/ 64 <800000000>;
-+			opp-microvolt = <750000 750000 850000>;
-+			opp-microvolt-L1 = <737500 737500 850000>;
-+			opp-microvolt-L2 = <725000 725000 850000>;
-+			opp-microvolt-L3 = <712500 712500 850000>;
-+			opp-microvolt-L4 = <700000 700000 850000>;
-+			opp-microvolt-L5 = <700000 700000 850000>;
-+		};
-+		opp-900000000 {
-+			opp-hz = /bits/ 64 <900000000>;
-+			opp-microvolt = <800000 800000 850000>;
-+			opp-microvolt-L1 = <787500 787500 850000>;
-+			opp-microvolt-L2 = <775000 775000 850000>;
-+			opp-microvolt-L3 = <762500 762500 850000>;
-+			opp-microvolt-L4 = <750000 750000 850000>;
-+			opp-microvolt-L5 = <737500 737500 850000>;
-+		};
-+		opp-1000000000 {
-+			opp-hz = /bits/ 64 <1000000000>;
-+			opp-microvolt = <850000 850000 850000>;
-+			opp-microvolt-L1 = <837500 837500 850000>;
-+			opp-microvolt-L2 = <825000 825000 850000>;
-+			opp-microvolt-L3 = <812500 812500 850000>;
-+			opp-microvolt-L4 = <800000 800000 850000>;
-+			opp-microvolt-L5 = <787500 787500 850000>;
-+		};
-+	};
-+
-+	gpu: gpu@fb000000 {
-+		compatible = "rockchip,rk3588-mali", "arm,mali-valhall-csf";
-+		reg = <0x0 0xfb000000 0x0 0x200000>;
-+		interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH 0>,
-+			     <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH 0>,
-+			     <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH 0>;
-+		interrupt-names = "job", "mmu", "gpu";
-+
-+		clock-names = "core", "coregroup", "stacks";
-+		clocks = <&cru CLK_GPU>, <&cru CLK_GPU_COREGROUP>,
-+			 <&cru CLK_GPU_STACKS>;
-+		assigned-clocks = <&scmi_clk SCMI_CLK_GPU>;
-+		assigned-clock-rates = <200000000>;
-+		power-domains = <&power RK3588_PD_GPU>;
-+		operating-points-v2 = <&gpu_opp_table>;
-+		#cooling-cells = <2>;
-+		dynamic-power-coefficient = <2982>;
-+
-+		status = "disabled";
-+	};
-+
- 	pmu1grf: syscon@fd58a000 {
- 		compatible = "rockchip,rk3588-pmugrf", "syscon", "simple-mfd";
- 		reg = <0x0 0xfd58a000 0x0 0x10000>;
-@@ -3033,6 +3148,11 @@ gpio4: gpio@fec50000 {
- 		};
- 	};
- 
-+	gpu_grf: syscon@fd5a0000 {
-+		compatible = "rockchip,rk3588-gpu-grf", "syscon";
-+		reg = <0x0 0xfd5a0000 0x0 0x100>;
-+	};
-+
- 	av1d: video-codec@fdc70000 {
- 		compatible = "rockchip,rk3588-av1-vpu";
- 		reg = <0x0 0xfdc70000 0x0 0x800>;
--- 
-Armbian
-

patch/kernel/rockchip-rk3588-edge/1013-arm64-dts-rockchip-rk3588-rock5b-Add-GPU-node.patch

@@ -1,38 +0,0 @@
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: Boris Brezillon <boris.brezillon@collabora.com>
-Date: Tue, 8 Aug 2023 12:05:22 +0200
-Subject: arm64: dts: rockchip: rk3588-rock5b: Add GPU node
-
-Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
-Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
----
- arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 6 ++++++
- 1 file changed, 6 insertions(+)
-
-diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
-index b697c707f3f3..7aefcb5498c0 100644
---- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
-+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
-@@ -174,6 +174,11 @@ &cpu_l3 {
- 	cpu-supply = <&vdd_cpu_lit_s0>;
- };
- 
-+&gpu {
-+	mali-supply = <&vdd_gpu_s0>;
-+	status = "okay";
-+};
-+
- &hdmi0 {
- 	status = "okay";
- };
-@@ -509,6 +514,7 @@ rk806_dvs3_null: dvs3-null-pins {
- 
- 		regulators {
- 			vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
-+				regulator-always-on;
- 				regulator-boot-on;
- 				regulator-min-microvolt = <550000>;
- 				regulator-max-microvolt = <950000>;
--- 
-Armbian
-