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U-boot: Rockchip64-dev update renegade

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This commit is contained in:
Thomas McKahan 2018-10-31 22:48:54 -04:00
parent 423c849511
commit 2e8c9665db
1 changed files with 218 additions and 38 deletions
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256
patch/u-boot/u-boot-rockchip64-dev/add-board-renegade.patch
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@ -1,9 +1,44 @@
From 3f87b0c622e246f138d4d32c599fa087b880cade Mon Sep 17 00:00:00 2001
From: zouxf <zxf@t-tchip.com.cn>
Date: Tue, 6 Mar 2018 15:05:58 +0800
Subject: [PATCH] firefly: add roc-rk3328-cc board support
Change-Id: Idb11a95a01c828da1e4818e6b4814a448b754f6b
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3328-roc-cc.dts | 231 +++++++++++++++++++
arch/arm/mach-rockchip/rk3328/Kconfig | 11 +
board/rockchip/roc_rk3328_cc/Kconfig | 15 ++
board/rockchip/roc_rk3328_cc/Makefile | 7 +
board/rockchip/roc_rk3328_cc/roc-rk3328-cc.c | 85 +++++++
configs/roc-rk3328-cc_defconfig | 97 ++++++++
include/configs/roc_rk3328_cc.h | 18 ++
8 files changed, 465 insertions(+)
create mode 100644 arch/arm/dts/rk3328-roc-cc.dts
create mode 100644 board/rockchip/roc_rk3328_cc/Kconfig
create mode 100644 board/rockchip/roc_rk3328_cc/Makefile
create mode 100644 board/rockchip/roc_rk3328_cc/roc-rk3328-cc.c
create mode 100644 configs/roc-rk3328-cc_defconfig
create mode 100644 include/configs/roc_rk3328_cc.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 0032a21377..f548703a2a 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -46,6 +46,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-veyron-mickey.dtb \
rk3288-veyron-minnie.dtb \
rk3328-evb.dtb \
+ rk3328-roc-cc.dtb \
rk3328-rock64.dtb \
rk3368-lion.dtb \
rk3368-sheep.dtb \
diff --git a/arch/arm/dts/rk3328-roc-cc.dts b/arch/arm/dts/rk3328-roc-cc.dts
new file mode 100644
index 0000000..b9b8fbc
index 0000000000..4f3c2cf935
--- /dev/null
+++ b/arch/arm/dts/rk3328-roc-cc.dts
@@ -0,0 +1,246 @@
@@ -0,0 +1,231 @@
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ *
@ -44,15 +79,10 @@ index 0000000..b9b8fbc
+ compatible = "regulator-fixed";
+ enable-active-high;
+ regulator-name = "vcc5v0_host_xhci";
+ gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 0>;
+ };
+};
+
+&saradc {
@ -115,10 +145,8 @@ index 0000000..b9b8fbc
+};
+
+&usb_host0_xhci {
+ //vbus-supply = <&vcc5v0_host_xhci>;
+ vbus-supply = <&vcc5v0_otg>;
+ vbus-supply = <&vcc5v0_host_xhci>;
+ status = "okay";
+ maximum-speed = "high-speed";
+};
+
+&i2c1 {
@ -146,14 +174,6 @@ index 0000000..b9b8fbc
+ status = "okay";
+ };
+
+ led1 {
+ label = "standby";
+ };
+
+ led2 {
+ label = "power";
+ };
+
+ regulators {
+ vdd_logic: DCDC_REG1 {
+ regulator-name = "vdd_logic";
@ -250,12 +270,165 @@ index 0000000..b9b8fbc
+ };
+};
+
diff --git a/arch/arm/mach-rockchip/rk3328/Kconfig b/arch/arm/mach-rockchip/rk3328/Kconfig
index 43afba2430..0faf50085f 100644
--- a/arch/arm/mach-rockchip/rk3328/Kconfig
+++ b/arch/arm/mach-rockchip/rk3328/Kconfig
@@ -10,6 +10,16 @@ config TARGET_EVB_RK3328
with full function and phisical connectors support like
usb2.0 host ports, LVDS, JTAG, MAC, SDcard, HDMI, USB-2-serial...
+config TARGET_ROC_RK3328_CC
+ bool "ROC-RK3328-CC board, "
+ help
+ ROC-RK3328-CC is a Raspberry Pi-2 sized 4K60P HDR Media Board Computer
+ powered by Rockchip RK3328 Quad-Core ARM Cortex A53 64-Bit Processor
+ and support up to 4GB 2133MHz DDR4 memory.
+ It provides eMMC module socket, MicroSD Card slot, Pi-2 Bus, Pi-P5+ Bus,
+ USB 3.0 and many others peripheral devices interface for makers
+ to integrate with sensors and devices
+
endchoice
config SYS_SOC
@@ -19,5 +29,6 @@ config SYS_MALLOC_F_LEN
default 0x0800
source "board/rockchip/evb_rk3328/Kconfig"
+source "board/rockchip/roc_rk3328_cc/Kconfig"
source "board/rockchip/rock64_rk3328/Kconfig"
diff --git a/board/rockchip/roc_rk3328_cc/Kconfig b/board/rockchip/roc_rk3328_cc/Kconfig
new file mode 100644
index 0000000000..074894a911
--- /dev/null
+++ b/board/rockchip/roc_rk3328_cc/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_ROC_RK3328_CC
+
+config SYS_BOARD
+ default "roc_rk3328_cc"
+
+config SYS_VENDOR
+ default "rockchip"
+
+config SYS_CONFIG_NAME
+ default "roc_rk3328_cc"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+
+endif
diff --git a/board/rockchip/roc_rk3328_cc/Makefile b/board/rockchip/roc_rk3328_cc/Makefile
new file mode 100644
index 0000000000..79290147ee
--- /dev/null
+++ b/board/rockchip/roc_rk3328_cc/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2018 FIREFLY
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += roc-rk3328-cc.o
diff --git a/board/rockchip/roc_rk3328_cc/roc-rk3328-cc.c b/board/rockchip/roc_rk3328_cc/roc-rk3328-cc.c
new file mode 100644
index 0000000000..3ff12301fe
--- /dev/null
+++ b/board/rockchip/roc_rk3328_cc/roc-rk3328-cc.c
@@ -0,0 +1,85 @@
+/*
+ * (C) Copyright 2018 FIREFLY
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/grf_rk3328.h>
+#include <asm/armv8/mmu.h>
+#include <asm/io.h>
+#include <dwc3-uboot.h>
+#include <power/regulator.h>
+#include <usb.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ int ret;
+#define GRF_BASE 0xff100000
+ struct rk3328_grf_regs * const grf = (void *)GRF_BASE;
+
+ /* uart2 select m1, sdcard select m1*/
+ rk_clrsetreg(&grf->com_iomux,
+ IOMUX_SEL_UART2_MASK | IOMUX_SEL_SDMMC_MASK,
+ IOMUX_SEL_UART2_M1 << IOMUX_SEL_UART2_SHIFT |
+ IOMUX_SEL_SDMMC_M1 << IOMUX_SEL_SDMMC_SHIFT);
+
+ ret = regulators_enable_boot_on(false);
+ if (ret)
+ debug("%s: Cannot enable boot on regulator\n", __func__);
+
+#define GRF_SOC_CON10 0xff100428
+ rk_setreg(GRF_SOC_CON10, (BIT(1) << 16) | (0 << 1));
+
+ return ret;
+}
+
+#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
+#include <usb.h>
+#include <usb/dwc2_udc.h>
+
+static struct dwc2_plat_otg_data rk3328_otg_data = {
+ .rx_fifo_sz = 512,
+ .np_tx_fifo_sz = 16,
+ .tx_fifo_sz = 128,
+};
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+ int node;
+ const char *mode;
+ bool matched = false;
+ const void *blob = gd->fdt_blob;
+
+ /* find the usb_otg node */
+ node = fdt_node_offset_by_compatible(blob, -1,
+ "rockchip,rk3328-usb");
+
+ while (node > 0) {
+ mode = fdt_getprop(blob, node, "dr_mode", NULL);
+ if (mode && strcmp(mode, "otg") == 0) {
+ matched = true;
+ break;
+ }
+
+ node = fdt_node_offset_by_compatible(blob, node,
+ "rockchip,rk3328-usb");
+ }
+ if (!matched) {
+ debug("Not found usb_otg device\n");
+ return -ENODEV;
+ }
+
+ rk3328_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
+
+ return dwc2_udc_probe(&rk3328_otg_data);
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+ return 0;
+}
+#endif
diff --git a/configs/roc-rk3328-cc_defconfig b/configs/roc-rk3328-cc_defconfig
new file mode 100644
index 0000000..0fdcfcb
index 0000000000..9a75395f38
--- /dev/null
+++ b/configs/roc-rk3328-cc_defconfig
@@ -0,0 +1,114 @@
@@ -0,0 +1,97 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
@ -288,25 +461,16 @@ index 0000000..0fdcfcb
+CONFIG_FASTBOOT_FLASH_MMC_DEV=1
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_ETHSW=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_OF_PLATDATA=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
@ -319,16 +483,8 @@ index 0000000..0fdcfcb
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEY=y
+CONFIG_LED=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MTD=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PINCTRL=y
@ -370,3 +526,27 @@ index 0000000..0fdcfcb
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_SMBIOS_MANUFACTURER="firefly"
diff --git a/include/configs/roc_rk3328_cc.h b/include/configs/roc_rk3328_cc.h
new file mode 100644
index 0000000000..fc9c84e2e0
--- /dev/null
+++ b/include/configs/roc_rk3328_cc.h
@@ -0,0 +1,18 @@
+/*
+ * (C) Copyright 2018 FIREFLY
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __ROC_RK3328_CC_H
+#define __ROC_RK3328_CC_H
+
+#include <configs/rk3328_common.h>
+
+#define CONFIG_SYS_MMC_ENV_DEV 1
+
+#define SDRAM_BANK_SIZE (2UL << 30)
+
+#define CONFIG_CONSOLE_SCROLL_LINES 10
+
+#endif