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Add an attempt counter, which helps buggy PCIe links. (#4308)

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* Add an attempt counter, which helps buggy PCIe links.

* Adjust patches

* Add PCIe retry patch for rockchip64-6.0.

Co-authored-by: Igor <igor@armbian.com>
This commit is contained in:
David Manouchehri 2022-10-26 14:32:42 -05:00 committed by GitHub
parent d29a840e54
commit 27bbf8bbaa
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GPG Key ID: 4AEE18F83AFDEB23
5 changed files with 290 additions and 0 deletions
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58
patch/kernel/archive/media-5.19/rk3399-rp64-pcie-retry.patch Normal file
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@ -0,0 +1,58 @@
From 08d70acd0f1057eaaf06d76021b4d89ff559909d Mon Sep 17 00:00:00 2001
From: Igor Pecovnik <igor.pecovnik@gmail.com>
Date: Thu, 20 Oct 2022 21:46:01 +0200
Subject: [PATCH] Add an attempt counter, which helps buggy PCIe links
(c) David Manouchehri
Adjusted by igor@armbian.com
---
drivers/pci/controller/pcie-rockchip-host.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c
index a7974007d..8e2a89dd3 100644
--- a/drivers/pci/controller/pcie-rockchip-host.c
+++ b/drivers/pci/controller/pcie-rockchip-host.c
@@ -300,9 +300,9 @@ static void rockchip_pcie_set_power_limit(struct rockchip_pcie *rockchip)
static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip)
{
struct device *dev = rockchip->dev;
- int err, i = MAX_LANE_NUM;
+ int err, i = MAX_LANE_NUM, attempt_counter = 0;
u32 status;
-
+err_retry_init:
gpiod_set_value_cansleep(rockchip->ep_gpio, 0);
err = rockchip_pcie_init_port(rockchip);
@@ -338,7 +338,7 @@ static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip)
status, PCIE_LINK_UP(status), 20,
500 * USEC_PER_MSEC);
if (err) {
- dev_err(dev, "PCIe link training gen1 timeout!\n");
+ dev_err(dev, "PCIe link training gen1 timeout with x%d!\n", status);
goto err_power_off_phy;
}
@@ -356,6 +356,7 @@ static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip)
500 * USEC_PER_MSEC);
if (err)
dev_dbg(dev, "PCIe link training gen2 timeout, fall back to gen1!\n");
+ dev_dbg(dev, "PCIe link training gen2 timeout with x%d, fall back to gen1!\n", status);
}
/* Check the final link width from negotiated lane counter from MGMT */
@@ -403,6 +404,9 @@ static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip)
i = MAX_LANE_NUM;
while (i--)
phy_exit(rockchip->phys[i]);
+ if(attempt_counter++ < 5)
+
+goto err_retry_init;
return err;
}
--
Created with Armbian build tools https://github.com/armbian/build

58
patch/kernel/archive/media-6.0/rk3399-rp64-pcie-retry.patch Normal file
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@ -0,0 +1,58 @@
From 08d70acd0f1057eaaf06d76021b4d89ff559909d Mon Sep 17 00:00:00 2001
From: Igor Pecovnik <igor.pecovnik@gmail.com>
Date: Thu, 20 Oct 2022 21:46:01 +0200
Subject: [PATCH] Add an attempt counter, which helps buggy PCIe links
(c) David Manouchehri
Adjusted by igor@armbian.com
---
drivers/pci/controller/pcie-rockchip-host.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c
index a7974007d..8e2a89dd3 100644
--- a/drivers/pci/controller/pcie-rockchip-host.c
+++ b/drivers/pci/controller/pcie-rockchip-host.c
@@ -300,9 +300,9 @@ static void rockchip_pcie_set_power_limit(struct rockchip_pcie *rockchip)
static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip)
{
struct device *dev = rockchip->dev;
- int err, i = MAX_LANE_NUM;
+ int err, i = MAX_LANE_NUM, attempt_counter = 0;
u32 status;
-
+err_retry_init:
gpiod_set_value_cansleep(rockchip->ep_gpio, 0);
err = rockchip_pcie_init_port(rockchip);
@@ -338,7 +338,7 @@ static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip)
status, PCIE_LINK_UP(status), 20,
500 * USEC_PER_MSEC);
if (err) {
- dev_err(dev, "PCIe link training gen1 timeout!\n");
+ dev_err(dev, "PCIe link training gen1 timeout with x%d!\n", status);
goto err_power_off_phy;
}
@@ -356,6 +356,7 @@ static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip)
500 * USEC_PER_MSEC);
if (err)
dev_dbg(dev, "PCIe link training gen2 timeout, fall back to gen1!\n");
+ dev_dbg(dev, "PCIe link training gen2 timeout with x%d, fall back to gen1!\n", status);
}
/* Check the final link width from negotiated lane counter from MGMT */
@@ -403,6 +404,9 @@ static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip)
i = MAX_LANE_NUM;
while (i--)
phy_exit(rockchip->phys[i]);
+ if(attempt_counter++ < 5)
+
+goto err_retry_init;
return err;
}
--
Created with Armbian build tools https://github.com/armbian/build

58
patch/kernel/archive/rockchip64-5.15/rk3399-rp64-pcie-retry.patch Normal file
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@ -0,0 +1,58 @@
From 08d70acd0f1057eaaf06d76021b4d89ff559909d Mon Sep 17 00:00:00 2001
From: Igor Pecovnik <igor.pecovnik@gmail.com>
Date: Thu, 20 Oct 2022 21:46:01 +0200
Subject: [PATCH] Add an attempt counter, which helps buggy PCIe links
(c) David Manouchehri
Adjusted by igor@armbian.com
---
drivers/pci/controller/pcie-rockchip-host.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c
index a7974007d..8e2a89dd3 100644
--- a/drivers/pci/controller/pcie-rockchip-host.c
+++ b/drivers/pci/controller/pcie-rockchip-host.c
@@ -300,9 +300,9 @@ static void rockchip_pcie_set_power_limit(struct rockchip_pcie *rockchip)
static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip)
{
struct device *dev = rockchip->dev;
- int err, i = MAX_LANE_NUM;
+ int err, i = MAX_LANE_NUM, attempt_counter = 0;
u32 status;
-
+err_retry_init:
gpiod_set_value_cansleep(rockchip->ep_gpio, 0);
err = rockchip_pcie_init_port(rockchip);
@@ -338,7 +338,7 @@ static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip)
status, PCIE_LINK_UP(status), 20,
500 * USEC_PER_MSEC);
if (err) {
- dev_err(dev, "PCIe link training gen1 timeout!\n");
+ dev_err(dev, "PCIe link training gen1 timeout with x%d!\n", status);
goto err_power_off_phy;
}
@@ -356,6 +356,7 @@ static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip)
500 * USEC_PER_MSEC);
if (err)
dev_dbg(dev, "PCIe link training gen2 timeout, fall back to gen1!\n");
+ dev_dbg(dev, "PCIe link training gen2 timeout with x%d, fall back to gen1!\n", status);
}
/* Check the final link width from negotiated lane counter from MGMT */
@@ -403,6 +404,9 @@ static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip)
i = MAX_LANE_NUM;
while (i--)
phy_exit(rockchip->phys[i]);
+ if(attempt_counter++ < 5)
+
+goto err_retry_init;
return err;
}
--
Created with Armbian build tools https://github.com/armbian/build

58
patch/kernel/archive/rockchip64-5.19/rk3399-rp64-pcie-retry.patch Normal file
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@ -0,0 +1,58 @@
From 08d70acd0f1057eaaf06d76021b4d89ff559909d Mon Sep 17 00:00:00 2001
From: Igor Pecovnik <igor.pecovnik@gmail.com>
Date: Thu, 20 Oct 2022 21:46:01 +0200
Subject: [PATCH] Add an attempt counter, which helps buggy PCIe links
(c) David Manouchehri
Adjusted by igor@armbian.com
---
drivers/pci/controller/pcie-rockchip-host.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c
index a7974007d..8e2a89dd3 100644
--- a/drivers/pci/controller/pcie-rockchip-host.c
+++ b/drivers/pci/controller/pcie-rockchip-host.c
@@ -300,9 +300,9 @@ static void rockchip_pcie_set_power_limit(struct rockchip_pcie *rockchip)
static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip)
{
struct device *dev = rockchip->dev;
- int err, i = MAX_LANE_NUM;
+ int err, i = MAX_LANE_NUM, attempt_counter = 0;
u32 status;
-
+err_retry_init:
gpiod_set_value_cansleep(rockchip->ep_gpio, 0);
err = rockchip_pcie_init_port(rockchip);
@@ -338,7 +338,7 @@ static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip)
status, PCIE_LINK_UP(status), 20,
500 * USEC_PER_MSEC);
if (err) {
- dev_err(dev, "PCIe link training gen1 timeout!\n");
+ dev_err(dev, "PCIe link training gen1 timeout with x%d!\n", status);
goto err_power_off_phy;
}
@@ -356,6 +356,7 @@ static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip)
500 * USEC_PER_MSEC);
if (err)
dev_dbg(dev, "PCIe link training gen2 timeout, fall back to gen1!\n");
+ dev_dbg(dev, "PCIe link training gen2 timeout with x%d, fall back to gen1!\n", status);
}
/* Check the final link width from negotiated lane counter from MGMT */
@@ -403,6 +404,9 @@ static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip)
i = MAX_LANE_NUM;
while (i--)
phy_exit(rockchip->phys[i]);
+ if(attempt_counter++ < 5)
+
+goto err_retry_init;
return err;
}
--
Created with Armbian build tools https://github.com/armbian/build

58
patch/kernel/archive/rockchip64-6.0/rk3399-rp64-pcie-retry.patch Normal file
View File

@ -0,0 +1,58 @@
From 08d70acd0f1057eaaf06d76021b4d89ff559909d Mon Sep 17 00:00:00 2001
From: Igor Pecovnik <igor.pecovnik@gmail.com>
Date: Thu, 20 Oct 2022 21:46:01 +0200
Subject: [PATCH] Add an attempt counter, which helps buggy PCIe links
(c) David Manouchehri
Adjusted by igor@armbian.com
---
drivers/pci/controller/pcie-rockchip-host.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/controller/pcie-rockchip-host.c b/drivers/pci/controller/pcie-rockchip-host.c
index a7974007d..8e2a89dd3 100644
--- a/drivers/pci/controller/pcie-rockchip-host.c
+++ b/drivers/pci/controller/pcie-rockchip-host.c
@@ -300,9 +300,9 @@ static void rockchip_pcie_set_power_limit(struct rockchip_pcie *rockchip)
static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip)
{
struct device *dev = rockchip->dev;
- int err, i = MAX_LANE_NUM;
+ int err, i = MAX_LANE_NUM, attempt_counter = 0;
u32 status;
-
+err_retry_init:
gpiod_set_value_cansleep(rockchip->ep_gpio, 0);
err = rockchip_pcie_init_port(rockchip);
@@ -338,7 +338,7 @@ static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip)
status, PCIE_LINK_UP(status), 20,
500 * USEC_PER_MSEC);
if (err) {
- dev_err(dev, "PCIe link training gen1 timeout!\n");
+ dev_err(dev, "PCIe link training gen1 timeout with x%d!\n", status);
goto err_power_off_phy;
}
@@ -356,6 +356,7 @@ static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip)
500 * USEC_PER_MSEC);
if (err)
dev_dbg(dev, "PCIe link training gen2 timeout, fall back to gen1!\n");
+ dev_dbg(dev, "PCIe link training gen2 timeout with x%d, fall back to gen1!\n", status);
}
/* Check the final link width from negotiated lane counter from MGMT */
@@ -403,6 +404,9 @@ static int rockchip_pcie_host_init_port(struct rockchip_pcie *rockchip)
i = MAX_LANE_NUM;
while (i--)
phy_exit(rockchip->phys[i]);
+ if(attempt_counter++ < 5)
+
+goto err_retry_init;
return err;
}
--
Created with Armbian build tools https://github.com/armbian/build