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rockchip64-edge: rewrite patches

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This commit is contained in:
EvilOlaf 2026-02-20 06:13:37 +00:00 committed by Werner
parent 15393d6dc6
commit 20050860f0
6 changed files with 52 additions and 116 deletions
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10
patch/kernel/archive/rockchip64-6.19/board-orangepi3b-0002-specify-target-supply-for-sata2.patch
View File

@ -11,12 +11,10 @@ Signed-off-by: Ian Leung <ianleung7@gmail.com>
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-orangepi-3b.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-orangepi-3b.dtsi
index e2f0ccc6d..fcb46919d 100644
index 111111111111..222222222222 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-orangepi-3b.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3566-orangepi-3b.dtsi
@@ -538,10 +538,14 @@ &pmu_io_domains {
&saradc {
vref-supply = <&vcca_1v8>;
@@ -540,6 +540,10 @@ &saradc {
status = "okay";
};
@ -27,8 +25,6 @@ index e2f0ccc6d..fcb46919d 100644
&sdhci {
bus-width = <8>;
cap-mmc-highspeed;
max-frequency = <200000000>;
mmc-hs200-1_8v;
--
Created with Armbian build tools https://github.com/armbian/build
Armbian

24
patch/kernel/archive/rockchip64-6.19/rk3308-0001-pinctrl-slew-mux.patch
View File

@ -81,12 +81,10 @@ Subject: [ARCHEOLOGY] Rockpis wifi fixes (#4008)
4 files changed, 100 insertions(+)
diff --git a/drivers/pinctrl/pinconf-generic.c b/drivers/pinctrl/pinconf-generic.c
index 366775841c63..6a6370d9a237 100644
index 111111111111..222222222222 100644
--- a/drivers/pinctrl/pinconf-generic.c
+++ b/drivers/pinctrl/pinconf-generic.c
@@ -52,10 +52,11 @@ static const struct pin_config_item conf_items[] = {
PCONFDUMP(PIN_CONFIG_OUTPUT_IMPEDANCE_OHMS, "output impedance", "ohms", true),
PCONFDUMP(PIN_CONFIG_POWER_SOURCE, "pin power source", "selector", true),
@@ -54,6 +54,7 @@ static const struct pin_config_item conf_items[] = {
PCONFDUMP(PIN_CONFIG_SLEEP_HARDWARE_STATE, "sleep hardware state", NULL, false),
PCONFDUMP(PIN_CONFIG_SLEW_RATE, "slew rate", NULL, true),
PCONFDUMP(PIN_CONFIG_SKEW_DELAY, "skew delay", NULL, true),
@ -94,13 +92,11 @@ index 366775841c63..6a6370d9a237 100644
PCONFDUMP(PIN_CONFIG_SKEW_DELAY_INPUT_PS, "input skew delay", "ps", true),
PCONFDUMP(PIN_CONFIG_SKEW_DELAY_OUTPUT_PS, "output skew delay", "ps", true),
};
static void pinconf_generic_dump_one(struct pinctrl_dev *pctldev,
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 111111111111..222222222222 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -3000,6 +3000,26 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
@@ -3349,6 +3349,26 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
return ret;
}
@ -127,7 +123,7 @@ index 111111111111..222222222222 100644
#define RK3328_SCHMITT_BITS_PER_PIN 1
#define RK3328_SCHMITT_PINS_PER_REG 16
#define RK3328_SCHMITT_BANK_STRIDE 8
@@ -3115,6 +3135,51 @@ static int rockchip_set_schmitt(struct rockchip_pin_bank *bank,
@@ -3476,6 +3496,51 @@ static int rockchip_set_schmitt(struct rockchip_pin_bank *bank,
return regmap_update_bits(regmap, reg, rmask, data);
}
@ -179,7 +175,7 @@ index 111111111111..222222222222 100644
/*
* Pinmux_ops handling
*/
@@ -3353,6 +3418,15 @@ static int rockchip_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
@@ -3714,6 +3779,15 @@ static int rockchip_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
if (rc < 0)
return rc;
break;
@ -195,7 +191,7 @@ index 111111111111..222222222222 100644
default:
return -ENOTSUPP;
break;
@@ -3427,6 +3501,26 @@ static int rockchip_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
@@ -3788,6 +3862,26 @@ static int rockchip_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
if (rc < 0)
return rc;
@ -222,7 +218,7 @@ index 111111111111..222222222222 100644
arg = rc;
break;
default:
@@ -4229,6 +4323,7 @@ static struct rockchip_pin_ctrl rk3308_pin_ctrl = {
@@ -4587,6 +4681,7 @@ static struct rockchip_pin_ctrl rk3308_pin_ctrl = {
.pull_calc_reg = rk3308_calc_pull_reg_and_bit,
.drv_calc_reg = rk3308_calc_drv_reg_and_bit,
.schmitt_calc_reg = rk3308_calc_schmitt_reg_and_bit,
@ -234,7 +230,7 @@ diff --git a/drivers/pinctrl/pinctrl-rockchip.h b/drivers/pinctrl/pinctrl-rockch
index 111111111111..222222222222 100644
--- a/drivers/pinctrl/pinctrl-rockchip.h
+++ b/drivers/pinctrl/pinctrl-rockchip.h
@@ -410,6 +410,9 @@ struct rockchip_pin_ctrl {
@@ -413,6 +413,9 @@ struct rockchip_pin_ctrl {
int (*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
int pin_num, struct regmap **regmap,
int *reg, u8 *bit);
@ -248,8 +244,8 @@ diff --git a/include/linux/pinctrl/pinconf-generic.h b/include/linux/pinctrl/pin
index 111111111111..222222222222 100644
--- a/include/linux/pinctrl/pinconf-generic.h
+++ b/include/linux/pinctrl/pinconf-generic.h
@@ -149,6 +149,7 @@ enum pin_config_param {
PIN_CONFIG_SKEW_DELAY,
@@ -157,6 +157,7 @@ enum pin_config_param {
PIN_CONFIG_SKEW_DELAY_OUTPUT_PS,
PIN_CONFIG_SLEEP_HARDWARE_STATE,
PIN_CONFIG_SLEW_RATE,
+ PIN_CONFIG_MUX,

98
patch/kernel/archive/rockchip64-6.19/rk3308-acodec-vendor-driver.patch
View File

@ -12,12 +12,10 @@ Signed-off-by: Brent Roman <genosenosor@gmail.com>
4 files changed, 5663 insertions(+), 942 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 72682a5ef..ebe0857ae 100644
index 111111111111..222222222222 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -1009,15 +1009,18 @@ cru: clock-controller@ff500000 {
codec: codec@ff560000 {
@@ -836,11 +836,14 @@ codec: codec@ff560000 {
compatible = "rockchip,rk3308-codec";
reg = <0x0 0xff560000 0x0 0x10000>;
rockchip,grf = <&grf>;
@ -34,13 +32,11 @@ index 72682a5ef..ebe0857ae 100644
resets = <&cru SRST_ACODEC_P>;
#sound-dai-cells = <0>;
status = "disabled";
};
diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index 60befe9d3..aee918c87 100644
index 111111111111..222222222222 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -1,975 +1,5175 @@
@@ -1,9 +1,20 @@
-// SPDX-License-Identifier: GPL-2.0-only
/*
- * Rockchip RK3308 internal audio codec driver
@ -64,10 +60,7 @@ index 60befe9d3..aee918c87 100644
*/
#include <linux/clk.h>
#include <linux/device.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/io.h>
@@ -14,962 +25,5151 @@
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of.h>
@ -5956,10 +5949,10 @@ index 60befe9d3..aee918c87 100644
-MODULE_LICENSE("GPL");
+MODULE_LICENSE("GPL v2");
diff --git a/sound/soc/codecs/rk3308_codec.h b/sound/soc/codecs/rk3308_codec.h
index a4226b235..93e089dae 100644
index 111111111111..222222222222 100644
--- a/sound/soc/codecs/rk3308_codec.h
+++ b/sound/soc/codecs/rk3308_codec.h
@@ -1,17 +1,116 @@
@@ -1,15 +1,114 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
/*
- * Rockchip RK3308 internal audio codec driver -- register definitions
@ -6078,11 +6071,7 @@ index a4226b235..93e089dae 100644
/* ADC DIGITAL REGISTERS */
/*
* The ADC group are 0 ~ 3, that control:
@@ -19,109 +118,121 @@
* CH0: left_0(ADC1) and right_0(ADC2)
* CH1: left_1(ADC3) and right_1(ADC4)
@@ -21,51 +120,50 @@
* CH2: left_2(ADC5) and right_2(ADC6)
* CH3: left_3(ADC7) and right_3(ADC8)
*/
@ -6175,10 +6164,7 @@ index a4226b235..93e089dae 100644
/* ADC ANALOG REGISTERS */
/*
* The ADC group are 0 ~ 3, that control:
*
* CH0: left_0(ADC1) and right_0(ADC2)
* CH1: left_1(ADC3) and right_1(ADC4)
@@ -76,50 +174,63 @@
* CH2: left_2(ADC5) and right_2(ADC6)
* CH3: left_3(ADC7) and right_3(ADC8)
*/
@ -6275,11 +6261,7 @@ index a4226b235..93e089dae 100644
#define RK3308_ADC_I2S_VALID_LEN_SFT 5
#define RK3308_ADC_I2S_VALID_LEN_MSK (0x3 << RK3308_ADC_I2S_VALID_LEN_SFT)
#define RK3308_ADC_I2S_VALID_LEN_32BITS (0x3 << RK3308_ADC_I2S_VALID_LEN_SFT)
#define RK3308_ADC_I2S_VALID_LEN_24BITS (0x2 << RK3308_ADC_I2S_VALID_LEN_SFT)
#define RK3308_ADC_I2S_VALID_LEN_20BITS (0x1 << RK3308_ADC_I2S_VALID_LEN_SFT)
@@ -130,24 +241,36 @@
#define RK3308_ADC_I2S_MODE_MSK (0x3 << RK3308_ADC_I2S_MODE_SFT)
#define RK3308_ADC_I2S_MODE_PCM (0x3 << RK3308_ADC_I2S_MODE_SFT)
@@ -132,20 +243,32 @@
#define RK3308_ADC_I2S_MODE_I2S (0x2 << RK3308_ADC_I2S_MODE_SFT)
#define RK3308_ADC_I2S_MODE_LJ (0x1 << RK3308_ADC_I2S_MODE_SFT)
#define RK3308_ADC_I2S_MODE_RJ (0x0 << RK3308_ADC_I2S_MODE_SFT)
@ -6318,11 +6300,7 @@ index a4226b235..93e089dae 100644
/* RK3308_ADC_DIG_CON03 - REG: 0x000c */
#define RK3308_ADC_L_CH_BIST_SFT 2
#define RK3308_ADC_L_CH_BIST_MSK (0x3 << RK3308_ADC_L_CH_BIST_SFT)
#define RK3308_ADC_L_CH_NORMAL_RIGHT (0x3 << RK3308_ADC_L_CH_BIST_SFT) /* normal mode */
@@ -160,28 +283,36 @@
#define RK3308_ADC_R_CH_BIST_CUBE (0x2 << RK3308_ADC_R_CH_BIST_SFT)
#define RK3308_ADC_R_CH_BIST_SINE (0x1 << RK3308_ADC_R_CH_BIST_SFT)
@@ -162,7 +285,10 @@
#define RK3308_ADC_R_CH_NORMAL_RIGHT (0x0 << RK3308_ADC_R_CH_BIST_SFT) /* normal mode */
/* RK3308_ADC_DIG_CON04 - REG: 0x0010 */
@ -6334,8 +6312,7 @@ index a4226b235..93e089dae 100644
#define RK3308_ADC_HPF_CUTOFF_SFT 0
#define RK3308_ADC_HPF_CUTOFF_MSK (0x3 << RK3308_ADC_HPF_CUTOFF_SFT)
#define RK3308_ADC_HPF_CUTOFF_612HZ (0x2 << RK3308_ADC_HPF_CUTOFF_SFT)
#define RK3308_ADC_HPF_CUTOFF_245HZ (0x1 << RK3308_ADC_HPF_CUTOFF_SFT)
#define RK3308_ADC_HPF_CUTOFF_20HZ (0x0 << RK3308_ADC_HPF_CUTOFF_SFT)
@@ -171,15 +297,20 @@
/* RK3308_ADC_DIG_CON07 - REG: 0x001c */
#define RK3308_ADCL_DATA_SFT 4
@ -6359,11 +6336,7 @@ index a4226b235..93e089dae 100644
#define RK3308_CTRL_GEN_SFT 4
#define RK3308_CTRL_GEN_MSK (0x3 << RK3308_ALC_CTRL_GEN_SFT)
#define RK3308_CTRL_GEN_JACK3 (0x3 << RK3308_ALC_CTRL_GEN_SFT)
#define RK3308_CTRL_GEN_JACK2 (0x2 << RK3308_ALC_CTRL_GEN_SFT)
#define RK3308_CTRL_GEN_JACK1 (0x1 << RK3308_ALC_CTRL_GEN_SFT)
@@ -203,40 +334,149 @@
/*
* RK3308_ALC_L_DIG_CON01 - REG: 0x0044 + ch * 0xc0
@@ -205,36 +336,145 @@
* RK3308_ALC_R_DIG_CON01 - REG: 0x0084 + ch * 0xc0
*/
#define RK3308_AGC_DECAY_TIME_SFT 4
@ -6516,11 +6489,7 @@ index a4226b235..93e089dae 100644
/*
* RK3308_ALC_L_DIG_CON05 - REG: 0x0054 + ch * 0xc0
* RK3308_ALC_R_DIG_CON05 - REG: 0x0094 + ch * 0xc0
*/
@@ -262,28 +502,48 @@
/*
@@ -264,15 +504,33 @@
* RK3308_ALC_L_DIG_CON09 - REG: 0x0064 + ch * 0xc0
* RK3308_ALC_R_DIG_CON09 - REG: 0x00a4 + ch * 0xc0
*/
@ -6555,8 +6524,7 @@ index a4226b235..93e089dae 100644
/*
* RK3308_ALC_L_DIG_CON12 - REG: 0x0068 + ch * 0xc0
* RK3308_ALC_R_DIG_CON12 - REG: 0x00a8 + ch * 0xc0
*/
@@ -281,7 +539,9 @@
#define RK3308_AGC_GAIN_MSK 0x1f
/* RK3308_DAC_DIG_CON01 - REG: 0x0304 */
@ -6567,11 +6535,7 @@ index a4226b235..93e089dae 100644
#define RK3308_DAC_I2S_VALID_LEN_SFT 5
#define RK3308_DAC_I2S_VALID_LEN_MSK (0x3 << RK3308_DAC_I2S_VALID_LEN_SFT)
#define RK3308_DAC_I2S_VALID_LEN_32BITS (0x3 << RK3308_DAC_I2S_VALID_LEN_SFT)
#define RK3308_DAC_I2S_VALID_LEN_24BITS (0x2 << RK3308_DAC_I2S_VALID_LEN_SFT)
#define RK3308_DAC_I2S_VALID_LEN_20BITS (0x1 << RK3308_DAC_I2S_VALID_LEN_SFT)
@@ -292,25 +552,33 @@
#define RK3308_DAC_I2S_MODE_MSK (0x3 << RK3308_DAC_I2S_MODE_SFT)
#define RK3308_DAC_I2S_MODE_PCM (0x3 << RK3308_DAC_I2S_MODE_SFT)
@@ -294,21 +554,29 @@
#define RK3308_DAC_I2S_MODE_I2S (0x2 << RK3308_DAC_I2S_MODE_SFT)
#define RK3308_DAC_I2S_MODE_LJ (0x1 << RK3308_DAC_I2S_MODE_SFT)
#define RK3308_DAC_I2S_MODE_RJ (0x0 << RK3308_DAC_I2S_MODE_SFT)
@ -6608,11 +6572,7 @@ index a4226b235..93e089dae 100644
/* RK3308_DAC_DIG_CON03 - REG: 0x030C */
#define RK3308_DAC_L_CH_BIST_SFT 2
#define RK3308_DAC_L_CH_BIST_MSK (0x3 << RK3308_DAC_L_CH_BIST_SFT)
#define RK3308_DAC_L_CH_BIST_LEFT (0x3 << RK3308_DAC_L_CH_BIST_SFT) /* normal mode */
@@ -323,109 +591,193 @@
#define RK3308_DAC_R_CH_BIST_CUBE (0x2 << RK3308_DAC_R_CH_BIST_SFT)
#define RK3308_DAC_R_CH_BIST_SINE (0x1 << RK3308_DAC_R_CH_BIST_SFT)
@@ -325,62 +593,64 @@
#define RK3308_DAC_R_CH_BIST_RIGHT (0x0 << RK3308_DAC_R_CH_BIST_SFT) /* normal mode */
/* RK3308_DAC_DIG_CON04 - REG: 0x0310 */
@ -6709,7 +6669,7 @@ index a4226b235..93e089dae 100644
#define RK3308_ADC_CH2_MIC_GAIN_0DB (0x0 << RK3308_ADC_CH2_MIC_GAIN_SFT)
#define RK3308_ADC_CH1_MIC_GAIN_MAX 0x3
#define RK3308_ADC_CH1_MIC_GAIN_MIN 0
@@ -388,42 +658,124 @@
#define RK3308_ADC_CH1_MIC_GAIN_SFT 0
#define RK3308_ADC_CH1_MIC_GAIN_MSK (0x3 << RK3308_ADC_CH1_MIC_GAIN_SFT)
#define RK3308_ADC_CH1_MIC_GAIN_20DB (0x3 << RK3308_ADC_CH1_MIC_GAIN_SFT)
@ -6849,11 +6809,7 @@ index a4226b235..93e089dae 100644
/* RK3308_ADC_ANA_CON07 - REG: 0x035c */
/* Note: The register configuration is only valid for ADC2 */
#define RK3308_ADC_CH2_IN_SEL_SFT 6
#define RK3308_ADC_CH2_IN_SEL_MSK (0x3 << RK3308_ADC_CH2_IN_SEL_SFT)
@@ -438,84 +790,205 @@
#define RK3308_ADC_CH1_IN_SEL_MSK (0x3 << RK3308_ADC_CH1_IN_SEL_SFT)
#define RK3308_ADC_CH1_IN_LINEIN_MIC (0x3 << RK3308_ADC_CH1_IN_SEL_SFT)
@@ -440,80 +792,201 @@
#define RK3308_ADC_CH1_IN_LINEIN (0x2 << RK3308_ADC_CH1_IN_SEL_SFT)
#define RK3308_ADC_CH1_IN_MIC (0x1 << RK3308_ADC_CH1_IN_SEL_SFT)
#define RK3308_ADC_CH1_IN_NONE (0x0 << RK3308_ADC_CH1_IN_SEL_SFT)
@ -7092,11 +7048,7 @@ index a4226b235..93e089dae 100644
/* RK3308_DAC_ANA_CON07 - REG: 0x045c */
#define RK3308_DAC_R_HPOUT_DRV_SFT 4
#define RK3308_DAC_R_HPOUT_DRV_MSK (0xf << RK3308_DAC_R_HPOUT_DRV_SFT)
#define RK3308_DAC_L_HPOUT_DRV_SFT 0
@@ -532,40 +1005,55 @@
#define RK3308_DAC_R_HPMIX_SEL_MSK (0x3 << RK3308_DAC_R_HPMIX_SEL_SFT)
#define RK3308_DAC_R_HPMIX_LINEIN_I2S (0x3 << RK3308_DAC_R_HPMIX_SEL_SFT)
@@ -534,36 +1007,51 @@
#define RK3308_DAC_R_HPMIX_LINEIN (0x2 << RK3308_DAC_R_HPMIX_SEL_SFT)
#define RK3308_DAC_R_HPMIX_I2S (0x1 << RK3308_DAC_R_HPMIX_SEL_SFT)
#define RK3308_DAC_R_HPMIX_NONE (0x0 << RK3308_DAC_R_HPMIX_SEL_SFT)
@ -7160,11 +7112,7 @@ index a4226b235..93e089dae 100644
/* RK3308_DAC_ANA_CON15 - REG: 0x047C */
#define RK3308_DAC_LINEOUT_POP_SOUND_R_SFT 4
#define RK3308_DAC_LINEOUT_POP_SOUND_R_MSK (0x3 << RK3308_DAC_LINEOUT_POP_SOUND_R_SFT)
#define RK3308_DAC_R_SEL_DC_FROM_INTERNAL (0x2 << RK3308_DAC_LINEOUT_POP_SOUND_R_SFT)
#define RK3308_DAC_R_SEL_DC_FROM_VCM (0x1 << RK3308_DAC_LINEOUT_POP_SOUND_R_SFT)
@@ -574,6 +1062,8 @@
#define RK3308_DAC_LINEOUT_POP_SOUND_L_MSK (0x3 << RK3308_DAC_LINEOUT_POP_SOUND_L_SFT)
#define RK3308_DAC_L_SEL_DC_FROM_INTERNAL (0x2 << RK3308_DAC_LINEOUT_POP_SOUND_L_SFT)
@@ -576,4 +1064,6 @@
#define RK3308_DAC_L_SEL_DC_FROM_VCM (0x1 << RK3308_DAC_LINEOUT_POP_SOUND_L_SFT)
#define RK3308_DAC_L_SEL_LINEOUT_FROM_INTERNAL (0x0 << RK3308_DAC_LINEOUT_POP_SOUND_L_SFT)
@ -7173,7 +7121,7 @@ index a4226b235..93e089dae 100644
#endif /* __RK3308_CODEC_H__ */
diff --git a/sound/soc/codecs/rk3308_codec_provider.h b/sound/soc/codecs/rk3308_codec_provider.h
new file mode 100644
index 000000000..34c1ef86a
index 000000000000..111111111111
--- /dev/null
+++ b/sound/soc/codecs/rk3308_codec_provider.h
@@ -0,0 +1,28 @@
@ -7206,5 +7154,5 @@ index 000000000..34c1ef86a
+
+#endif /* __RK3308_CODEC_PROVIDER_H__ */
--
Created with Armbian build tools https://github.com/armbian/build
Armbian

8
patch/kernel/archive/rockchip64-6.19/rk3308-fix-10mbit-ethernet.patch
View File

@ -17,9 +17,7 @@ diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethern
index 111111111111..222222222222 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
@@ -494,12 +494,12 @@ static const struct rk_gmac_ops rk3288_ops = {
#define RK3308_GRF_MAC_CON0 0x04a0
@@ -496,8 +496,8 @@ static const struct rk_gmac_ops rk3288_ops = {
/* RK3308_GRF_MAC_CON0 */
#define RK3308_GMAC_PHY_INTF_SEL(val) GRF_FIELD(4, 2, val)
@ -30,9 +28,7 @@ index 111111111111..222222222222 100644
#define RK3308_GMAC_SPEED_10M GRF_CLR_BIT(0)
#define RK3308_GMAC_SPEED_100M GRF_BIT(0)
static void rk3308_set_to_rmii(struct rk_priv_data *bsp_priv)
{
@@ -522,6 +522,13 @@ static const struct rk_reg_speed_data rk3308_reg_speed_data = {
@@ -515,6 +515,13 @@ static const struct rk_reg_speed_data rk3308_reg_speed_data = {
static int rk3308_set_speed(struct rk_priv_data *bsp_priv,
phy_interface_t interface, int speed)
{

2
patch/kernel/archive/rockchip64-6.19/rk3308-vop-output.patch
View File

@ -54,7 +54,7 @@ index 111111111111..222222222222 100644
i2s_8ch_0: i2s@ff300000 {
compatible = "rockchip,rk3308-i2s-tdm";
reg = <0x0 0xff300000 0x0 0x1000>;
@@ -2118,5 +2144,89 @@ uart4_rts_pin: uart4-rts-pin {
@@ -2121,5 +2147,89 @@ uart4_rts_pin: uart4-rts-pin {
<4 RK_PA7 0 &pcfg_pull_none>;
};
};

8
patch/kernel/archive/rockchip64-6.19/rk3528-net-dsa-realtek-fixes-for-radxa-e24c-switch-chip.patch
View File

@ -210,7 +210,7 @@ diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethern
index 111111111111..222222222222 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
@@ -1573,23 +1573,23 @@ static struct rk_priv_data *rk_gmac_setup(struct platform_device *pdev,
@@ -1580,23 +1580,23 @@ static struct rk_priv_data *rk_gmac_setup(struct platform_device *pdev,
ret = of_property_read_u32(dev->of_node, "tx_delay", &value);
if (ret) {
@ -244,7 +244,7 @@ index 111111111111..222222222222 100644
bsp_priv->rx_delay = value;
}
@@ -1668,21 +1668,14 @@ static int rk_gmac_powerup(struct rk_priv_data *bsp_priv)
@@ -1675,21 +1675,14 @@ static int rk_gmac_powerup(struct rk_priv_data *bsp_priv)
/*rmii or rgmii*/
switch (bsp_priv->phy_iface) {
case PHY_INTERFACE_MODE_RGMII:
@ -303,7 +303,7 @@ diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethern
index 111111111111..222222222222 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
@@ -1560,17 +1560,22 @@ static struct rk_priv_data *rk_gmac_setup(struct platform_device *pdev,
@@ -1567,17 +1567,22 @@ static struct rk_priv_data *rk_gmac_setup(struct platform_device *pdev,
ret = of_property_read_string(dev->of_node, "clock_in_out", &strings);
if (ret) {
@ -329,7 +329,7 @@ index 111111111111..222222222222 100644
ret = of_property_read_u32(dev->of_node, "tx_delay", &value);
if (ret) {
if (plat->phy_interface == PHY_INTERFACE_MODE_RGMII_ID ||
@@ -1678,7 +1683,9 @@ static int rk_gmac_powerup(struct rk_priv_data *bsp_priv)
@@ -1685,7 +1690,9 @@ static int rk_gmac_powerup(struct rk_priv_data *bsp_priv)
bsp_priv->rx_delay);
break;
case PHY_INTERFACE_MODE_RMII: