Added Nanopi M1 plus2 kernel DT and uboot config, not done yet
This commit is contained in:
Igor Pecovnik
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f651f71eaa
commit
147545fabb
182
patch/u-boot/u-boot-sun50i-dev/add-nanopim1plus2.patch
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182
patch/u-boot/u-boot-sun50i-dev/add-nanopim1plus2.patch
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diff --git a/u-boot/arch/arm/dts/sun50i-h5-orangepi-prime.dts b/u-boot/arch/arm/dts/sun50i-h5-orangepi-prime.dts
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new file mode 100644
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index 0000000..68f889d
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--- /dev/null
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+++ b/u-boot/arch/arm/dts/sun50i-h5-nanopim1plus2.dts
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@@ -0,0 +1,152 @@
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+/*
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+ * Copyright (c) 2016 ARM Ltd.
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+ *
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+ * This file is dual-licensed: you can use it either under the terms
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+ * of the GPL or the X11 license, at your option. Note that this dual
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+ * licensing only applies to this file, and not this project as a
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+ * whole.
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+ *
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+ * a) This library is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of the
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+ * License, or (at your option) any later version.
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+ *
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+ * This library is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * Or, alternatively,
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+ *
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+ * b) Permission is hereby granted, free of charge, to any person
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+ * obtaining a copy of this software and associated documentation
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+ * files (the "Software"), to deal in the Software without
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+ * restriction, including without limitation the rights to use,
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+ * copy, modify, merge, publish, distribute, sublicense, and/or
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+ * sell copies of the Software, and to permit persons to whom the
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+ * Software is furnished to do so, subject to the following
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+ * conditions:
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+ *
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+ * The above copyright notice and this permission notice shall be
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+ * included in all copies or substantial portions of the Software.
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+ *
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+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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+ * OTHER DEALINGS IN THE SOFTWARE.
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+ */
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+
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+/dts-v1/;
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/pinctrl/sun4i-a10.h>
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+#include "sun8i-h3.dtsi"
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+
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+/ {
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+ model = "Nanopi M1+ 2";
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+ compatible = "orangepiprime", "allwinner,sun50i-h5";
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+
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+ chosen {
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+ stdout-path = "serial0:115200n8";
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+ };
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+
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+ memory {
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+ reg = <0x40000000 0x40000000>;
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+ };
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+
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+
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+ aliases {
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+ serial0 = &uart0;
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+ ethernet0 = &emac;
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+ };
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+
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+ soc {
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+ reg_vcc3v3: vcc3v3 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ };
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+ };
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+
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+ reg_gmac_3v3: gmac-3v3 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "gmac-3v3";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ startup-delay-us = <100000>;
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+ enable-active-high;
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+ gpio = <&pio 3 14 GPIO_ACTIVE_HIGH>;
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+ };
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+
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+ reg_usb1_vbus: usb1-vbus {
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+ compatible = "regulator-fixed";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&usb1_vbus_pin_a>;
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+ regulator-name = "usb1-vbus";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ regulator-boot-on;
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+ enable-active-high;
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+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
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+ status = "okay";
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+ };
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+};
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+
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+&mmc0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
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+ vmmc-supply = <®_vcc3v3>;
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+ cd-gpios = <&pio 5 6 0>;
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+ cd-inverted;
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+ status = "okay";
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+};
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+
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+&pio {
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+ usb1_vbus_pin_a: usb1_vbus_pin@0 {
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+ allwinner,pins = "PD6";
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+ allwinner,function = "gpio_out";
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+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
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+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
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+ };
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+};
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+
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+&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_pins_a>;
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+ status = "okay";
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+};
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+
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+&usbphy {
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+ usb1_vbus-supply = <®_usb1_vbus>;
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+ status = "okay";
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+};
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+
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+&ohci1 {
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+ status = "okay";
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+};
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+
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+&ehci1 {
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+ status = "okay";
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+};
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+
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+
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+&emac {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&emac_rgmii_pins>;
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+ phy-mode = "rgmii";
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+ phy-supply = <®_gmac_3v3>;
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+ phy-handle = <&ext_rgmii_phy>;
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+ status = "okay";
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+
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+ mdio {
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+ ext_rgmii_phy: ethernet-phy@1 {
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+ reg = <0>;
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+ };
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+ };
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+};
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+
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+
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diff --git a/u-boot/configs/nanopim1plus2_defconfig b/u-boot/configs/nanopim1plus2_defconfig
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new file mode 100644
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index 0000000..68f889d
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--- /dev/null
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+++ b/u-boot/configs/nanopim1plus2_defconfig
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@@ -0,0 +1,17 @@
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+CONFIG_ARM=y
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+CONFIG_ARCH_SUNXI=y
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+CONFIG_MACH_SUN50I_H5_64=y
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+CONFIG_SPL=y
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+CONFIG_DRAM_CLK=672
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+CONFIG_DRAM_ZQ=3881977
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+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopim1plus2"
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+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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+CONFIG_CONSOLE_MUX=y
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+# CONFIG_CMD_IMLS is not set
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+# CONFIG_CMD_FLASH is not set
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+# CONFIG_CMD_FPGA is not set
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+CONFIG_SUN8I_EMAC=y
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+CONFIG_USB_EHCI_HCD=y
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+CONFIG_VIDEO=y
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+CONFIG_VIDEO_COMPOSITE=y
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+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
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