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[ rockchip64 ] add oc opps for rk3328

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remove default 1.5 GHz operation, enable as overlay at user risk
This commit is contained in:
tonymac32 2020-12-17 01:54:05 -05:00
parent d94799ad5f
commit 129d8dbeb5
3 changed files with 94 additions and 16 deletions
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0
patch/kernel/rockchip64-current/rk3399-add-overclock-overlay.patch → patch/kernel/rockchip64-current/overlays-00-add-oc-opp-rk3399.patch
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94
patch/kernel/rockchip64-current/overlays-01-add-oc-opp-rk3328.patch Normal file
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@ -0,0 +1,94 @@
From a053b706be60b3dd13803ece30ff6eb143339bc2 Mon Sep 17 00:00:00 2001
From: tonymac32 <tonymckahan@gmail.com>
Date: Thu, 17 Dec 2020 01:33:33 -0500
Subject: [PATCH] rk3328-oc-opps
Signed-off-by: tonymac32 <tonymckahan@gmail.com>
---
arch/arm64/boot/dts/rockchip/overlay/Makefile | 2 ++
.../dts/rockchip/overlay/README.rockchip-overlays | 10 ++++++++++
.../overlay/rockchip-rk3328-opp-1.4ghz.dts | 15 +++++++++++++++
.../overlay/rockchip-rk3328-opp-1.5ghz.dts | 15 +++++++++++++++
4 files changed, 42 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3328-opp-1.4ghz.dts
create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3328-opp-1.5ghz.dts
diff --git a/arch/arm64/boot/dts/rockchip/overlay/Makefile b/arch/arm64/boot/dts/rockchip/overlay/Makefile
index 9bc4942bd..9c07d64a1 100644
--- a/arch/arm64/boot/dts/rockchip/overlay/Makefile
+++ b/arch/arm64/boot/dts/rockchip/overlay/Makefile
@@ -3,6 +3,8 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
rockchip-i2c7.dtbo \
rockchip-i2c8.dtbo \
rockchip-pcie-gen2.dtbo \
+ rockchip-rk3328-opp-1.4ghz.dtbo \
+ rockchip-rk3328-opp-1.5ghz.dtbo \
rockchip-rk3399-opp-2ghz.dtbo \
rockchip-spi-jedec-nor.dtbo \
rockchip-spi-spidev.dtbo \
diff --git a/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays b/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays
index ce0b84e00..d6979437a 100644
--- a/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays
+++ b/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays
@@ -29,6 +29,16 @@ I2C8 pins (SCL, SDA): GPIO1-C5, GPIO1-C4
Enables PCIe Gen2 link speed on RK3399.
WARNING! Not officially supported by Rockchip!!!
+### rk3328-opp-1.4ghz
+
+Adds the 1.4GHz opp for overclocking
+WARNING! Not officially supported by Rockchip!!!
+
+### rk3328-opp-1.5ghz
+
+Adds the 1.5GHz opp for overclocking
+WARNING! Not officially supported by Rockchip!!!
+
### rk3399-opp-2ghz
Adds the 2GHz big and 1.5 GHz LITTLE opps for overclocking
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3328-opp-1.4ghz.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3328-opp-1.4ghz.dts
new file mode 100644
index 000000000..a7ad9d572
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3328-opp-1.4ghz.dts
@@ -0,0 +1,15 @@
+/dts-v1/;
+
+/ {
+ compatible = "rockchip,rk3328";
+ fragment@0 {
+ target-path = "/opp_table0";
+ __overlay__ {
+ opp-1392000000 {
+ opp-hz = /bits/ 64 <1392000000>;
+ opp-microvolt = <1400000>;
+ clock-latency-ns = <40000>;
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3328-opp-1.5ghz.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3328-opp-1.5ghz.dts
new file mode 100644
index 000000000..3dfd008ab
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3328-opp-1.5ghz.dts
@@ -0,0 +1,15 @@
+/dts-v1/;
+
+/ {
+ compatible = "rockchip,rk3328";
+ fragment@0 {
+ target-path = "/opp_table0";
+ __overlay__ {
+ opp-1512000000 {
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt = <1450000>;
+ clock-latency-ns = <40000>;
+ };
+ };
+ };
+};
--
Created with Armbian build tools https://github.com/armbian/build

16
patch/kernel/rockchip64-current/rk3328-enable-1512mhz-opp.patch
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@ -1,16 +0,0 @@
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 8dabc6e29..d58c893a6 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -125,6 +125,11 @@
opp-microvolt = <1300000>;
clock-latency-ns = <40000>;
};
+ opp-1512000000 {
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt = <1450000>;
+ clock-latency-ns = <40000>;
+ };
};
amba {