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Fix trb ent quirk patch for rockchip64 (current/dev) and make it more resilient (#2728)

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* Fix trb ent quirk patch for rockchip64 (current/dev) and make it more resilient

* Re-enabled the trb ent patch in dev too
This commit is contained in:
Piotr Szczepanik 2021-03-23 07:57:05 +01:00 committed by GitHub
parent 602e4264f5
commit 08dca8c6ab
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 18 additions and 18 deletions
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18
patch/kernel/rockchip64-current/general-add-dwc3-xhci-usb-trb-quirk.patch.disabled → patch/kernel/rockchip64-current/general-add-dwc3-xhci-usb-trb-quirk.patch
View File

@ -120,7 +120,7 @@ index 167dae117..b1bc3bd03 100644
if (xhci_align_td(xhci, urb, enqd_len,
&trb_buff_len,
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index d90c0d5df..b32b04d85 100644
index d01241f1d..357217751 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1512,7 +1512,11 @@ static inline const char *xhci_trb_type_string(u8 type)
@ -135,11 +135,11 @@ index d90c0d5df..b32b04d85 100644
#define TRB_MAX_BUFF_SIZE (1 << TRB_MAX_BUFF_SHIFT)
/* How much data is left before the 64KB boundary? */
#define TRB_BUFF_LEN_UP_TO_BOUNDARY(addr) (TRB_MAX_BUFF_SIZE - \
@@ -1879,6 +1883,7 @@ struct xhci_hcd {
#define XHCI_SKIP_PHY_INIT BIT_ULL(37)
#define XHCI_DISABLE_SPARSE BIT_ULL(38)
#define XHCI_SG_TRB_CACHE_SIZE_QUIRK BIT_ULL(39)
+#define XHCI_TRB_ENT_QUIRK BIT_ULL(40)
unsigned int num_active_eps;
unsigned int limit_active_eps;
@@ -1828,6 +1832,7 @@ struct xhci_hcd {
#define XHCI_STATE_HALTED (1 << 1)
#define XHCI_STATE_REMOVING (1 << 2)
unsigned long long quirks;
+#define XHCI_TRB_ENT_QUIRK BIT_ULL(63)
#define XHCI_LINK_TRB_QUIRK BIT_ULL(0)
#define XHCI_RESET_EP_QUIRK BIT_ULL(1)
#define XHCI_NEC_HOST BIT_ULL(2)

18
patch/kernel/rockchip64-dev/general-add-dwc3-xhci-usb-trb-quirk.patch.disabled → patch/kernel/rockchip64-dev/general-add-dwc3-xhci-usb-trb-quirk.patch
View File

@ -120,7 +120,7 @@ index 167dae117..b1bc3bd03 100644
if (xhci_align_td(xhci, urb, enqd_len,
&trb_buff_len,
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index d90c0d5df..b32b04d85 100644
index d01241f1d..357217751 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1512,7 +1512,11 @@ static inline const char *xhci_trb_type_string(u8 type)
@ -135,11 +135,11 @@ index d90c0d5df..b32b04d85 100644
#define TRB_MAX_BUFF_SIZE (1 << TRB_MAX_BUFF_SHIFT)
/* How much data is left before the 64KB boundary? */
#define TRB_BUFF_LEN_UP_TO_BOUNDARY(addr) (TRB_MAX_BUFF_SIZE - \
@@ -1879,6 +1883,7 @@ struct xhci_hcd {
#define XHCI_SKIP_PHY_INIT BIT_ULL(37)
#define XHCI_DISABLE_SPARSE BIT_ULL(38)
#define XHCI_SG_TRB_CACHE_SIZE_QUIRK BIT_ULL(39)
+#define XHCI_TRB_ENT_QUIRK BIT_ULL(40)
unsigned int num_active_eps;
unsigned int limit_active_eps;
@@ -1828,6 +1832,7 @@ struct xhci_hcd {
#define XHCI_STATE_HALTED (1 << 1)
#define XHCI_STATE_REMOVING (1 << 2)
unsigned long long quirks;
+#define XHCI_TRB_ENT_QUIRK BIT_ULL(63)
#define XHCI_LINK_TRB_QUIRK BIT_ULL(0)
#define XHCI_RESET_EP_QUIRK BIT_ULL(1)
#define XHCI_NEC_HOST BIT_ULL(2)