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Update overlays

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This commit is contained in:
zador-blood-stained 2017-03-23 21:57:57 +03:00
parent 14abadcb02
commit 0718e98344
2 changed files with 416 additions and 329 deletions
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244
patch/kernel/sun8i-dev/add-h3-overlays.patch
View File

@ -12,10 +12,10 @@ index 01d178a2..bfba239c 100644
+dts-dirs += overlay
diff --git a/arch/arm/boot/dts/overlay/Makefile b/arch/arm/boot/dts/overlay/Makefile
new file mode 100644
index 00000000..0543d20d
index 00000000..eb0878c5
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/Makefile
@@ -0,0 +1,31 @@
@@ -0,0 +1,32 @@
+ifeq ($(CONFIG_OF_CONFIGFS),y)
+
+dtbo-$(CONFIG_MACH_SUN8I) += \
@ -26,6 +26,7 @@ index 00000000..0543d20d
+ sun8i-h3-i2c2.dtbo \
+ sun8i-h3-i2c-ds1307.dtbo \
+ sun8i-h3-pps-gpio.dtbo \
+ sun8i-h3-spi-add-cs1.dtbo \
+ sun8i-h3-spi-jedec-nor.dtbo \
+ sun8i-h3-spi-mcp2515.dtbo \
+ sun8i-h3-spi-spidev.dtbo \
@ -49,10 +50,10 @@ index 00000000..0543d20d
+clean-files := *.dtbo *.scr
diff --git a/arch/arm/boot/dts/overlay/README.sun8i-h3-overlays b/arch/arm/boot/dts/overlay/README.sun8i-h3-overlays
new file mode 100644
index 00000000..956be7b5
index 00000000..46d933c7
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/README.sun8i-h3-overlays
@@ -0,0 +1,242 @@
@@ -0,0 +1,275 @@
+This document describes overlays provided in the kernel packages
+For generic Armbian overlays documentation please see
+https://docs.armbian.com/Hardware_Allwinner_overlays/
@ -65,12 +66,8 @@ index 00000000..956be7b5
+
+Supported pin banks: PA, PC, PD, PG
+
+Both SPI controllers have only one hardware CS,
+so SPI chip select is always set to 0
+
+Using software (GPIO) SPI chip selects is possible, but since
+GPIO pins cannot be changed dynamically due to u-boot limitation,
+this feature is not used in provided overlays.
+Both SPI controllers have only one hardware CS pin exposed,
+adding fixed software (GPIO) chip selects is possible with a separate overlay
+
+### Provided overlays:
+
@ -81,6 +78,7 @@ index 00000000..956be7b5
+- i2c2
+- i2c-ds1307
+- pps-gpio
+- spi-add-cs1
+- spi-jedec-nor
+- spi-mcp2515
+- spi-spidev
@ -154,6 +152,15 @@ index 00000000..956be7b5
+ When set (to 1), assert is indicated by a falling edge
+ (instead of by a rising edge)
+
+### spi-add-cs1
+
+Adds support for using SPI chip select 1 with GPIO for both SPI controllers
+Respective GPIO will be claimed only if controller is enabled by another overlay
+This overlay is required for using chip select 1 with other SPI overlays
+
+SPI 0 pins (CS1): PA21
+SPI 1 pins (CS1): PA10
+
+### spi-jedec-nor
+
+Activates MTD support for JEDEC compatible SPI NOR flash chips on SPI bus
@ -169,6 +176,13 @@ index 00000000..956be7b5
+ Required
+ Supported values: 0, 1
+
+param_spinor_spi_cs (int)
+ SPI chip select number
+ Optional
+ Default: 0
+ Supported values: 0, 1
+ Using chip select 1 requires using "spi-add-cs1" overlay
+
+param_spinor_max_freq (int)
+ Maximum SPI frequency
+ Optional
@ -189,6 +203,19 @@ index 00000000..956be7b5
+ Required
+ Supported values: 0, 1
+
+param_mcp2515_spi_cs (int)
+ SPI chip select number
+ Optional
+ Default: 0
+ Supported values: 0, 1
+ Using chip select 1 requires using "spi-add-cs1" overlay
+
+param_mcp2515_max_freq (int)
+ Maximum SPI frequency
+ Optional
+ Default: 10000000
+ Range: 3000 - 100000000
+
+param_mcp2515_clk_freq (int)
+ Onboard oscillator clock frequency
+ Optional
@ -216,6 +243,13 @@ index 00000000..956be7b5
+ Required
+ Supported values: 0, 1
+
+param_spidev_spi_cs (int)
+ SPI chip select number
+ Optional
+ Default: 0
+ Supported values: 0, 1
+ Using chip select 1 requires using "spi-add-cs1" overlay
+
+param_spidev_max_freq (int)
+ Maximum SPIdev frequency
+ Optional
@ -339,10 +373,10 @@ index 00000000..f611d823
+};
diff --git a/arch/arm/boot/dts/overlay/sun8i-h3-fixup.scr-cmd b/arch/arm/boot/dts/overlay/sun8i-h3-fixup.scr-cmd
new file mode 100644
index 00000000..5d9b5d5d
index 00000000..690ceab6
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun8i-h3-fixup.scr-cmd
@@ -0,0 +1,151 @@
@@ -0,0 +1,131 @@
+# overlays fixup script
+# implements (or rather substitutes) overlay arguments functionality
+# using u-boot scripting, environment variables and "fdt" command
@ -357,87 +391,67 @@ index 00000000..5d9b5d5d
+test "${tmp_bank}" = "D" && setenv tmp_bank 3;
+test "${tmp_bank}" = "G" && setenv tmp_bank 6'
+
+if test "${param_spinor_spi_bus}" = "0"; then
+ fdt set /soc/spi@01c68000 status "okay"
+ fdt set /soc/spi@01c68000/spiflash@0 status "okay"
+if test -n "${param_spinor_spi_bus}"; then
+ test "${param_spinor_spi_bus}" = "0" && setenv tmp_spi_path "spi@01c68000"
+ test "${param_spinor_spi_bus}" = "1" && setenv tmp_spi_path "spi@01c69000"
+ fdt set /soc/${tmp_spi_path} status "okay"
+ fdt set /soc/${tmp_spi_path}/spiflash status "okay"
+ if test -n "${param_spinor_max_freq}"; then
+ fdt set /soc/${tmp_spi_path}/spiflash spi-max-frequency "<${param_spinor_max_freq}>"
+ fi
+ if test "${param_spinor_spi_cs}" = "1"; then
+ fdt set /soc/${tmp_spi_path}/spiflash reg "<1>"
+ fi
+ env delete tmp_spi_path
+fi
+
+if test "${param_spinor_spi_bus}" = "1"; then
+ fdt set /soc/spi@01c69000 status "okay"
+ fdt set /soc/spi@01c69000/spiflash@0 status "okay"
+if test -n "${param_mcp2515_spi_bus}"; then
+ test "${param_mcp2515_spi_bus}" = "0" && setenv tmp_spi_path "spi@01c68000"
+ test "${param_mcp2515_spi_bus}" = "1" && setenv tmp_spi_path "spi@01c69000"
+ fdt set /soc/${tmp_spi_path} status "okay"
+ fdt set /soc/${tmp_spi_path}/mcp2515 status "okay"
+ if test -n "${param_mcp2515_max_freq}"; then
+ fdt set /soc/${tmp_spi_path}/mcp2515 spi-max-frequency "<${param_mcp2515_max_freq}>"
+ fi
+ if test "${param_mcp2515_spi_cs}" = "1"; then
+ fdt set /soc/${tmp_spi_path}/mcp2515 reg "<1>"
+ fi
+ if test -n "${param_mcp2515_int_pin}"; then
+ setenv tmp_bank "${param_mcp2515_int_pin}"
+ setenv tmp_pin "${param_mcp2515_int_pin}"
+ run decompose_pin
+ fdt set /soc/pinctrl@01c20800/can0_pin_irq pins "${param_mcp2515_int_pin}"
+ fdt set /soc/${tmp_spi_path}/mcp2515 interrupts "<${tmp_bank} ${tmp_pin} 0x2>"
+ env delete tmp_pin tmp_bank
+ fi
+ env delete tmp_spi_path
+fi
+
+if test "${param_mcp2515_spi_bus}" = "0"; then
+ fdt set /soc/spi@01c68000 status "okay"
+ fdt set /soc/spi@01c68000/mcp2515@0 status "okay"
+fi
+
+if test "${param_mcp2515_spi_bus}" = "1"; then
+ fdt set /soc/spi@01c69000 status "okay"
+ fdt set /soc/spi@01c69000/mcp2515@0 status "okay"
+fi
+
+if test "${param_spidev_spi_bus}" = "0"; then
+ fdt set /soc/spi@01c68000 status "okay"
+ fdt set /soc/spi@01c68000/spidev@0 status "okay"
+fi
+
+if test "${param_spidev_spi_bus}" = "1"; then
+ fdt set /soc/spi@01c69000 status "okay"
+ fdt set /soc/spi@01c69000/spidev@0 status "okay"
+fi
+
+if test "${param_ds1307_i2c_bus}" = "0"; then
+ fdt set /soc/i2c@01c2ac00 status "okay"
+ fdt set /soc/i2c@01c2ac00/ds1307@68 status "okay"
+fi
+
+if test "${param_ds1307_i2c_bus}" = "1"; then
+ fdt set /soc/i2c@01c2b000 status "okay"
+ fdt set /soc/i2c@01c2b000/ds1307@68 status "okay"
+fi
+
+if test "${param_ds1307_i2c_bus}" = "2"; then
+ fdt set /soc/i2c@01c2b400 status "okay"
+ fdt set /soc/i2c@01c2b400/ds1307@68 status "okay"
+if test -n "${param_spidev_spi_bus}"; then
+ test "${param_spidev_spi_bus}" = "0" && setenv tmp_spi_path "spi@01c68000"
+ test "${param_spidev_spi_bus}" = "1" && setenv tmp_spi_path "spi@01c69000"
+ fdt set /soc/${tmp_spi_path} status "okay"
+ fdt set /soc/${tmp_spi_path}/spidev status "okay"
+ if test -n "${param_spidev_max_freq}"; then
+ fdt set /soc/${tmp_spi_path}/spidev spi-max-frequency "<${param_spidev_max_freq}>"
+ fi
+ if test "${param_spidev_spi_cs}" = "1"; then
+ fdt set /soc/${tmp_spi_path}/spidev reg "<1>"
+ fi
+ env delete tmp_spi_path
+fi
+
+if test -n "${param_mcp2515_clk_freq}"; then
+ fdt set /clocks/can0_osc_fixed clock-frequency "<${param_mcp2515_clk_freq}>"
+fi
+
+if test -n "${param_mcp2515_int_pin}"; then
+ setenv tmp_bank "${param_mcp2515_int_pin}"
+ setenv tmp_pin "${param_mcp2515_int_pin}"
+ run decompose_pin
+ fdt set /soc/pinctrl@01c20800/can0_pin_irq pins "${param_mcp2515_int_pin}"
+ if test "${param_mcp2515_spi_bus}" = "1"; then
+ setenv tmp_spi_path "spi@01c69000"
+ else
+ setenv tmp_spi_path "spi@01c68000"
+ fi
+ fdt set /soc/${tmp_spi_path}/mcp2515@0 interrupts "<${tmp_bank} ${tmp_pin} 0x2>"
+ env delete tmp_pin tmp_bank tmp_spi_path
+fi
+
+if test -n "${param_spidev_max_freq}"; then
+ if test "${param_spidev_spi_bus}" = "1"; then
+ setenv tmp_spi_path "spi@01c69000"
+ else
+ setenv tmp_spi_path "spi@01c68000"
+ fi
+ fdt set /soc/${tmp_spi_path}/spidev@0 spi-max-frequency "<${param_spidev_max_freq}>"
+ env delete tmp_spi_path
+fi
+
+if test -n "${param_spinor_max_freq}"; then
+ if test "${param_spinor_spi_bus}" = "1"; then
+ setenv tmp_spi_path "spi@01c69000"
+ else
+ setenv tmp_spi_path "spi@01c68000"
+ fi
+ fdt set /soc/${tmp_spi_path}/spiflash@0 spi-max-frequency "<${param_spinor_max_freq}>"
+ env delete tmp_spi_path
+if test -n "${param_ds1307_i2c_bus}"; then
+ test "${param_ds1307_i2c_bus}" = "0" && setenv tmp_i2c_path "i2c@01c2ac00"
+ test "${param_ds1307_i2c_bus}" = "1" && setenv tmp_i2c_path "i2c@01c2b000"
+ test "${param_ds1307_i2c_bus}" = "2" && setenv tmp_i2c_path "i2c@01c2b400"
+ fdt set /soc/${tmp_i2c_path} status "okay"
+ fdt set /soc/${tmp_i2c_path}/ds1307@68 status "okay"
+ env delete tmp_i2c_path
+fi
+
+if test -n "${param_pps_pin}"; then
@ -662,9 +676,55 @@ index 00000000..79459304
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/overlay/sun8i-h3-spi-add-cs1.dts b/arch/arm/boot/dts/overlay/sun8i-h3-spi-add-cs1.dts
new file mode 100644
index 00000000..021cf435
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun8i-h3-spi-add-cs1.dts
@@ -0,0 +1,40 @@
+/dts-v1/ /plugin/;
+
+/ {
+ compatible = "allwinner,sun8i-h3";
+
+ fragment@0 {
+ target = <&pio>;
+ __overlay__ {
+ spi0_cs1: spi0_cs1 {
+ pins = "PA21";
+ function = "gpio_out";
+ output-high;
+ };
+
+ spi1_cs1: spi1_cs1 {
+ pins = "PA10";
+ function = "gpio_out";
+ output-high;
+ };
+ };
+ };
+
+ fragment@1 {
+ target = <&spi0>;
+ __overlay__ {
+ pinctrl-names = "default", "default";
+ pinctrl-1 = <&spi0_cs1>;
+ cs-gpios = <0>, <&pio 0 21 0>; /* PA21 */
+ };
+ };
+
+ fragment@2 {
+ target = <&spi1>;
+ __overlay__ {
+ pinctrl-names = "default", "default";
+ pinctrl-1 = <&spi1_cs1>;
+ cs-gpios = <0>, <&pio 0 10 0>; /* PA10 */
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/overlay/sun8i-h3-spi-jedec-nor.dts b/arch/arm/boot/dts/overlay/sun8i-h3-spi-jedec-nor.dts
new file mode 100644
index 00000000..4df8a5ee
index 00000000..4509a39d
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun8i-h3-spi-jedec-nor.dts
@@ -0,0 +1,41 @@
@ -686,7 +746,7 @@ index 00000000..4df8a5ee
+ __overlay__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spiflash@0 {
+ spiflash {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
@ -700,7 +760,7 @@ index 00000000..4df8a5ee
+ __overlay__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spiflash@0 {
+ spiflash {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
@ -711,7 +771,7 @@ index 00000000..4df8a5ee
+};
diff --git a/arch/arm/boot/dts/overlay/sun8i-h3-spi-mcp2515.dts b/arch/arm/boot/dts/overlay/sun8i-h3-spi-mcp2515.dts
new file mode 100644
index 00000000..f9ae57ab
index 00000000..5ba86808
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun8i-h3-spi-mcp2515.dts
@@ -0,0 +1,77 @@
@ -759,7 +819,7 @@ index 00000000..f9ae57ab
+ __overlay__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ mcp2515@0 {
+ mcp2515 {
+ reg = <0>;
+ compatible = "microchip,mcp2515";
+ pinctrl-names = "default";
@ -778,7 +838,7 @@ index 00000000..f9ae57ab
+ __overlay__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ mcp2515@0 {
+ mcp2515 {
+ reg = <0>;
+ compatible = "microchip,mcp2515";
+ pinctrl-names = "default";
@ -794,7 +854,7 @@ index 00000000..f9ae57ab
+};
diff --git a/arch/arm/boot/dts/overlay/sun8i-h3-spi-spidev.dts b/arch/arm/boot/dts/overlay/sun8i-h3-spi-spidev.dts
new file mode 100644
index 00000000..e178e6a1
index 00000000..ddeaab94
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun8i-h3-spi-spidev.dts
@@ -0,0 +1,41 @@
@ -816,7 +876,7 @@ index 00000000..e178e6a1
+ __overlay__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spidev@0 {
+ spidev {
+ compatible = "spidev";
+ status = "disabled";
+ reg = <0>;
@ -830,7 +890,7 @@ index 00000000..e178e6a1
+ __overlay__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spidev@0 {
+ spidev {
+ compatible = "spidev";
+ status = "disabled";
+ reg = <0>;

501
patch/kernel/sunxi-next/add-a20-overlays.patch
View File

@ -12,10 +12,10 @@ index 01d178a2..bfba239c 100644
+dts-dirs += overlay
diff --git a/arch/arm/boot/dts/overlay/Makefile b/arch/arm/boot/dts/overlay/Makefile
new file mode 100644
index 00000000..c271e599
index 00000000..a8320dea
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/Makefile
@@ -0,0 +1,57 @@
@@ -0,0 +1,58 @@
+ifeq ($(CONFIG_OF_CONFIGFS),y)
+
+dtbo-$(CONFIG_MACH_SUN4I) += \
@ -50,6 +50,7 @@ index 00000000..c271e599
+ sun7i-a20-nand.dtbo \
+ sun7i-a20-pps-gpio.dtbo \
+ sun7i-a20-spdif-out.dtbo \
+ sun7i-a20-spi-add-cs1.dtbo \
+ sun7i-a20-spi-jedec-nor.dtbo \
+ sun7i-a20-spi-mcp2515.dtbo \
+ sun7i-a20-spi-spidev.dtbo \
@ -75,10 +76,10 @@ index 00000000..c271e599
+clean-files := *.dtbo *.scr
diff --git a/arch/arm/boot/dts/overlay/README.sun4i-a10-overlays b/arch/arm/boot/dts/overlay/README.sun4i-a10-overlays
new file mode 100644
index 00000000..befb0a3d
index 00000000..0dd6ed3c
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/README.sun4i-a10-overlays
@@ -0,0 +1,276 @@
@@ -0,0 +1,288 @@
+This document describes overlays provided in the kernel packages
+For generic Armbian overlays documentation please see
+https://docs.armbian.com/Hardware_Allwinner_overlays/
@ -232,6 +233,12 @@ index 00000000..befb0a3d
+ Required
+ Supported values: 0, 1, 2
+
+param_mcp2515_max_freq (int)
+ Maximum SPI frequency
+ Optional
+ Default: 10000000
+ Range: 3000 - 100000000
+
+param_spi2_bus_pins (char)
+ SPI bus 2 pinmux variant
+ Optional
@ -253,7 +260,8 @@ index 00000000..befb0a3d
+
+### spi-spidev
+
+Activates SPIdev device node (/dev/spidev0.0) for userspace SPI access
+Activates SPIdev device node (/dev/spidevX.Y) for userspace SPI access,
+where X is the bus number and Y is the CS number
+
+SPI 0 pins (MOSI, MISO, SCK, CS0, CS1): PI12, PI13, PI11, PI10, PI14
+SPI 1 pins (MOSI, MISO, SCK, CS0): PI18, PI19, PI17, PI16
@ -262,6 +270,11 @@ index 00000000..befb0a3d
+
+Parameters:
+
+param_spidev_spi_bus (int)
+ SPI bus to activate mcp2515 support on
+ Required
+ Supported values: 0, 1, 2
+
+param_spi2_bus_pins (char)
+ SPI bus 2 pinmux variant
+ Optional
@ -357,10 +370,10 @@ index 00000000..befb0a3d
+ please use external pull-up resistor instead
diff --git a/arch/arm/boot/dts/overlay/README.sun7i-a20-overlays b/arch/arm/boot/dts/overlay/README.sun7i-a20-overlays
new file mode 100644
index 00000000..af886d93
index 00000000..2db198ae
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/README.sun7i-a20-overlays
@@ -0,0 +1,290 @@
@@ -0,0 +1,331 @@
+This document describes overlays provided in the kernel packages
+For generic Armbian overlays documentation please see
+https://docs.armbian.com/Hardware_Allwinner_overlays/
@ -391,6 +404,7 @@ index 00000000..af886d93
+- nand
+- pps-gpio
+- spdif-out
+- spi-add-cs1
+- spi-jedec-nor
+- spi-mcp2515
+- spi-spidev
@ -482,6 +496,13 @@ index 00000000..af886d93
+
+SPDIF pin: PB13
+
+### spi-add-cs1
+
+Activates SPI chip select 1 on SPI controller 0
+This overlay is required for using chip select 1 with other SPI overlays
+
+SPI 0 CS1 pin: PI14
+
+### spi-jedec-nor
+
+Activates MTD support for JEDEC compatible SPI NOR flash chips on SPI bus
@ -499,6 +520,13 @@ index 00000000..af886d93
+ Required
+ Supported values: 0, 1, 2
+
+param_spinor_spi_cs (int)
+ SPI chip select number for SPI NOR connected to SPI bus 0
+ Optional
+ Default: 0
+ Supported values: 0, 1
+ Using chip select 1 on SPI 0 requires using "spi-add-cs1" overlay
+
+param_spi2_bus_pins (char)
+ SPI bus 2 pinmux variant
+ Optional
@ -528,6 +556,19 @@ index 00000000..af886d93
+ Required
+ Supported values: 0, 1, 2
+
+param_mcp2515_spi_cs (int)
+ SPI chip select number for MCP2515 connected to SPI bus 0
+ Optional
+ Default: 0
+ Supported values: 0, 1
+ Using chip select 1 on SPI 0 requires using "spi-add-cs1" overlay
+
+param_mcp2515_max_freq (int)
+ Maximum SPI frequency
+ Optional
+ Default: 10000000
+ Range: 3000 - 100000000
+
+param_spi2_bus_pins (char)
+ SPI bus 2 pinmux variant
+ Optional
@ -549,7 +590,8 @@ index 00000000..af886d93
+
+### spi-spidev
+
+Activates SPIdev device node (/dev/spidev0.0) for userspace SPI access
+Activates SPIdev device node (/dev/spidevX.Y) for userspace SPI access,
+where X is the bus number and Y is the CS number
+
+SPI 0 pins (MOSI, MISO, SCK, CS0, CS1): PI12, PI13, PI11, PI10, PI14
+SPI 1 pins (MOSI, MISO, SCK, CS0): PI18, PI19, PI17, PI16
@ -558,6 +600,18 @@ index 00000000..af886d93
+
+Parameters:
+
+param_spidev_spi_bus (int)
+ SPI bus to activate mcp2515 support on
+ Required
+ Supported values: 0, 1, 2
+
+param_spidev_spi_cs (int)
+ SPI chip select number for SPIdev on SPI bus 0
+ Optional
+ Default: 0
+ Supported values: 0, 1
+ Using chip select 1 on SPI 0 requires using "spi-add-cs1" overlay
+
+param_spi2_bus_pins (char)
+ SPI bus 2 pinmux variant
+ Optional
@ -711,10 +765,10 @@ index 00000000..fef88b94
+};
diff --git a/arch/arm/boot/dts/overlay/sun4i-a10-fixup.scr-cmd b/arch/arm/boot/dts/overlay/sun4i-a10-fixup.scr-cmd
new file mode 100644
index 00000000..4a988391
index 00000000..751951d0
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun4i-a10-fixup.scr-cmd
@@ -0,0 +1,183 @@
@@ -0,0 +1,132 @@
+# overlays fixup script
+# implements (or rather substitutes) overlay arguments functionality
+# using u-boot scripting, environment variables and "fdt" command
@ -732,70 +786,65 @@ index 00000000..4a988391
+test "${tmp_bank}" = "H" && setenv tmp_bank 7;
+test "${tmp_bank}" = "I" && setenv tmp_bank 8'
+
+if test "${param_spinor_spi_bus}" = "0"; then
+ fdt set /soc@01c00000/spi@01c05000 status "okay"
+ fdt set /soc@01c00000/spi@01c05000/spiflash status "okay"
+if test -n "${param_spinor_spi_bus}"; then
+ test "${param_spinor_spi_bus}" = "0" && setenv tmp_spi_path "spi@01c05000"
+ test "${param_spinor_spi_bus}" = "1" && setenv tmp_spi_path "spi@01c06000"
+ test "${param_spinor_spi_bus}" = "2" && setenv tmp_spi_path "spi@01c17000"
+ fdt set /soc@01c00000/${tmp_spi_path} status "okay"
+ fdt set /soc@01c00000/${tmp_spi_path}/spiflash status "okay"
+ if test -n "${param_spinor_max_freq}"; then
+ fdt set /soc@01c00000/${tmp_spi_path}/spiflash spi-max-frequency "<${param_spinor_max_freq}>"
+ fi
+ env delete tmp_spi_path
+fi
+
+if test "${param_spinor_spi_bus}" = "1"; then
+ fdt set /soc@01c00000/spi@01c06000 status "okay"
+ fdt set /soc@01c00000/spi@01c06000/spiflash status "okay"
+if test -n "${param_mcp2515_spi_bus}"; then
+ test "${param_mcp2515_spi_bus}" = "0" && setenv tmp_spi_path "spi@01c05000"
+ test "${param_mcp2515_spi_bus}" = "1" && setenv tmp_spi_path "spi@01c06000"
+ test "${param_mcp2515_spi_bus}" = "2" && setenv tmp_spi_path "spi@01c17000"
+ fdt set /soc@01c00000/${tmp_spi_path} status "okay"
+ fdt set /soc@01c00000/${tmp_spi_path}/mcp2515 status "okay"
+ if test -n "${param_mcp2515_max_freq}"; then
+ fdt set /soc@01c00000/${tmp_spi_path}/mcp2515 spi-max-frequency "<${param_mcp2515_max_freq}>"
+ fi
+ if test -n "${param_mcp2515_int_pin}"; then
+ setenv tmp_bank "${param_mcp2515_int_pin}"
+ setenv tmp_pin "${param_mcp2515_int_pin}"
+ run decompose_pin
+ fdt set /soc@01c00000/pinctrl@01c20800/can0_pin_irq pins "${param_mcp2515_int_pin}"
+ fdt set /soc@01c00000/${tmp_spi_path}/mcp2515 interrupts "<${tmp_bank} ${tmp_pin} 0x2>"
+ env delete tmp_pin tmp_bank tmp_spi_path
+ fi
+ env delete tmp_spi_path
+fi
+
+if test "${param_spinor_spi_bus}" = "2"; then
+ fdt set /soc@01c00000/spi@01c17000 status "okay"
+ fdt set /soc@01c00000/spi@01c17000/spiflash status "okay"
+fi
+
+if test "${param_mcp2515_spi_bus}" = "0"; then
+ fdt set /soc@01c00000/spi@01c05000 status "okay"
+ fdt set /soc@01c00000/spi@01c05000/mcp2515 status "okay"
+fi
+
+if test "${param_mcp2515_spi_bus}" = "1"; then
+ fdt set /soc@01c00000/spi@01c06000 status "okay"
+ fdt set /soc@01c00000/spi@01c06000/mcp2515 status "okay"
+fi
+
+if test "${param_mcp2515_spi_bus}" = "2"; then
+ fdt set /soc@01c00000/spi@01c17000 status "okay"
+ fdt set /soc@01c00000/spi@01c17000/mcp2515 status "okay"
+fi
+
+if test "${param_spidev_spi_bus}" = "0"; then
+ fdt set /soc@01c00000/spi@01c05000 status "okay"
+ fdt set /soc@01c00000/spi@01c05000/spidev status "okay"
+fi
+
+if test "${param_spidev_spi_bus}" = "1"; then
+ fdt set /soc@01c00000/spi@01c06000 status "okay"
+ fdt set /soc@01c00000/spi@01c06000/spidev status "okay"
+fi
+
+if test "${param_spidev_spi_bus}" = "2"; then
+ fdt set /soc@01c00000/spi@01c17000 status "okay"
+ fdt set /soc@01c00000/spi@01c17000/spidev status "okay"
+fi
+
+if test "${param_ds1307_i2c_bus}" = "0"; then
+ fdt set /soc@01c00000/i2c@01c2ac00 status "okay"
+ fdt set /soc@01c00000/i2c@01c2ac00/ds1307@68 status "okay"
+fi
+
+if test "${param_ds1307_i2c_bus}" = "1"; then
+ fdt set /soc@01c00000/i2c@01c2b000 status "okay"
+ fdt set /soc@01c00000/i2c@01c2b000/ds1307@68 status "okay"
+fi
+
+if test "${param_ds1307_i2c_bus}" = "2"; then
+ fdt set /soc@01c00000/i2c@01c2b400 status "okay"
+ fdt set /soc@01c00000/i2c@01c2b400/ds1307@68 status "okay"
+if test -n "${param_spidev_spi_bus}"; then
+ test "${param_spidev_spi_bus}" = "0" && setenv tmp_spi_path "spi@01c05000"
+ test "${param_spidev_spi_bus}" = "1" && setenv tmp_spi_path "spi@01c06000"
+ test "${param_spidev_spi_bus}" = "2" && setenv tmp_spi_path "spi@01c17000"
+ fdt set /soc@01c00000/${tmp_spi_path} status "okay"
+ fdt set /soc@01c00000/${tmp_spi_path}/spidev status "okay"
+ if test -n "${param_spidev_max_freq}"; then
+ fdt set /soc@01c00000/${tmp_spi_path}/spidev spi-max-frequency "<${param_spidev_max_freq}>"
+ fi
+ env delete tmp_spi_path
+fi
+
+if test -n "${param_mcp2515_clk_freq}"; then
+ fdt set /clocks/can0_osc_fixed clock-frequency "<${param_mcp2515_clk_freq}>"
+fi
+
+if test -n "${param_ds1307_i2c_bus}"; then
+ test "${param_ds1307_i2c_bus}" = "0" && setenv tmp_i2c_path "i2c@01c2ac00"
+ test "${param_ds1307_i2c_bus}" = "1" && setenv tmp_i2c_path "i2c@01c2b000"
+ test "${param_ds1307_i2c_bus}" = "2" && setenv tmp_i2c_path "i2c@01c2b400"
+ test "${param_ds1307_i2c_bus}" = "3" && setenv tmp_i2c_path "i2c@01c2b800"
+ test "${param_ds1307_i2c_bus}" = "4" && setenv tmp_i2c_path "i2c@01c2c000"
+ fdt set /soc@01c00000/${tmp_i2c_path} status "okay"
+ fdt set /soc@01c00000/${tmp_i2c_path}/ds1307@68 status "okay"
+ env delete tmp_i2c_path
+fi
+
+if test "${param_spi2_bus_pins}" = "b"; then
+ fdt get value tmp_phandle1 /soc@01c00000/pinctrl@01c20800/spi2@1 phandle
+ fdt get value tmp_phandle2 /soc@01c00000/pinctrl@01c20800/spi2_cs0@1 phandle
@ -804,52 +853,6 @@ index 00000000..4a988391
+ env delete tmp_phandle1 tmp_phandle2
+fi
+
+if test -n "${param_mcp2515_int_pin}"; then
+ setenv tmp_bank "${param_mcp2515_int_pin}"
+ setenv tmp_pin "${param_mcp2515_int_pin}"
+ run decompose_pin
+ fdt set /soc@01c00000/pinctrl@01c20800/can0_pin_irq pins "${param_mcp2515_int_pin}"
+ if test "${param_mcp2515_spi_bus}" = "0"; then
+ setenv tmp_spi_path "spi@01c05000"
+ fi
+ if test "${param_mcp2515_spi_bus}" = "1"; then
+ setenv tmp_spi_path "spi@01c06000"
+ fi
+ if test "${param_mcp2515_spi_bus}" = "2"; then
+ setenv tmp_spi_path "spi@01c17000"
+ fi
+ fdt set /soc@01c00000/${tmp_spi_path}/mcp2515 interrupts "<${tmp_bank} ${tmp_pin} 0x2>"
+ env delete tmp_pin tmp_bank tmp_spi_path
+fi
+
+if test -n "${param_spidev_max_freq}"; then
+ if test "${param_spidev_spi_bus}" = "0"; then
+ setenv tmp_spi_path "spi@01c05000"
+ fi
+ if test "${param_spidev_spi_bus}" = "1"; then
+ setenv tmp_spi_path "spi@01c06000"
+ fi
+ if test "${param_spidev_spi_bus}" = "2"; then
+ setenv tmp_spi_path "spi@01c17000"
+ fi
+ fdt set /soc@01c00000/${tmp_spi_path}/spidev spi-max-frequency "<${param_spidev_max_freq}>"
+ env delete tmp_spi_path
+fi
+
+if test -n "${param_spinor_max_freq}"; then
+ if test "${param_spinor_spi_bus}" = "0"; then
+ setenv tmp_spi_path "spi@01c05000"
+ fi
+ if test "${param_spinor_spi_bus}" = "1"; then
+ setenv tmp_spi_path "spi@01c06000"
+ fi
+ if test "${param_spinor_spi_bus}" = "2"; then
+ setenv tmp_spi_path "spi@01c17000"
+ fi
+ fdt set /soc@01c00000/${tmp_spi_path}/spiflash spi-max-frequency "<${param_spinor_max_freq}>"
+ env delete tmp_spi_path
+fi
+
+if test -n "${param_pps_pin}"; then
+ setenv tmp_bank "${param_pps_pin}"
+ setenv tmp_pin "${param_pps_pin}"
@ -900,7 +903,7 @@ index 00000000..4a988391
+fi
diff --git a/arch/arm/boot/dts/overlay/sun4i-a10-i2c-ds1307.dts b/arch/arm/boot/dts/overlay/sun4i-a10-i2c-ds1307.dts
new file mode 100644
index 00000000..dc14796e
index 00000000..2dfd8a22
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun4i-a10-i2c-ds1307.dts
@@ -0,0 +1,53 @@
@ -1449,10 +1452,10 @@ index 00000000..af8fddf8
+};
diff --git a/arch/arm/boot/dts/overlay/sun4i-a10-uart2.dts b/arch/arm/boot/dts/overlay/sun4i-a10-uart2.dts
new file mode 100644
index 00000000..c21c4c2a
index 00000000..287d797f
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun4i-a10-uart2.dts
@@ -0,0 +1,31 @@
@@ -0,0 +1,36 @@
+/dts-v1/ /plugin/;
+
+/ {
@ -1468,6 +1471,11 @@ index 00000000..c21c4c2a
+ fragment@1 {
+ target = <&pio>;
+ __overlay__ {
+ uart2_pins_a: uart2@0 {
+ pins = "PI16", "PI17", "PI18", "PI19";
+ function = "uart2";
+ };
+
+ uart2_pins_a_2: uart2@1 {
+ pins = "PI18", "PI19";
+ function = "uart2";
@ -1486,10 +1494,10 @@ index 00000000..c21c4c2a
+};
diff --git a/arch/arm/boot/dts/overlay/sun4i-a10-uart3.dts b/arch/arm/boot/dts/overlay/sun4i-a10-uart3.dts
new file mode 100644
index 00000000..ad5eb2a0
index 00000000..41c863d8
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun4i-a10-uart3.dts
@@ -0,0 +1,31 @@
@@ -0,0 +1,36 @@
+/dts-v1/ /plugin/;
+
+/ {
@ -1505,7 +1513,12 @@ index 00000000..ad5eb2a0
+ fragment@1 {
+ target = <&pio>;
+ __overlay__ {
+ uart3_pins_a_2: uart3@2 {
+ uart3_pins_a: uart3@0 {
+ pins = "PG6", "PG7", "PG8", "PG9";
+ function = "uart3";
+ };
+
+ uart3_pins_a_2: uart3@1 {
+ pins = "PG6", "PG7";
+ function = "uart3";
+ };
@ -1523,10 +1536,10 @@ index 00000000..ad5eb2a0
+};
diff --git a/arch/arm/boot/dts/overlay/sun4i-a10-uart4.dts b/arch/arm/boot/dts/overlay/sun4i-a10-uart4.dts
new file mode 100644
index 00000000..edfaf641
index 00000000..f1b9d8bb
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun4i-a10-uart4.dts
@@ -0,0 +1,21 @@
@@ -0,0 +1,36 @@
+/dts-v1/ /plugin/;
+
+/ {
@ -1540,6 +1553,21 @@ index 00000000..edfaf641
+ };
+
+ fragment@1 {
+ target = <&pio>;
+ __overlay__ {
+ uart4_pins_a: uart4@0 {
+ pins = "PG10", "PG11";
+ function = "uart4";
+ };
+
+ uart4_pins_b: uart4@1 {
+ pins = "PH4", "PH5";
+ function = "uart4";
+ };
+ };
+ };
+
+ fragment@2 {
+ target = <&uart4>;
+ __overlay__ {
+ pinctrl-names = "default";
@ -1550,10 +1578,10 @@ index 00000000..edfaf641
+};
diff --git a/arch/arm/boot/dts/overlay/sun4i-a10-uart5.dts b/arch/arm/boot/dts/overlay/sun4i-a10-uart5.dts
new file mode 100644
index 00000000..cd9fa3dc
index 00000000..4f30db32
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun4i-a10-uart5.dts
@@ -0,0 +1,21 @@
@@ -0,0 +1,31 @@
+/dts-v1/ /plugin/;
+
+/ {
@ -1567,6 +1595,16 @@ index 00000000..cd9fa3dc
+ };
+
+ fragment@1 {
+ target = <&pio>;
+ __overlay__ {
+ uart5_pins_a: uart5@0 {
+ pins = "PH6", "PH7";
+ function = "uart5";
+ };
+ };
+ };
+
+ fragment@2 {
+ target = <&uart5>;
+ __overlay__ {
+ pinctrl-names = "default";
@ -1577,10 +1615,10 @@ index 00000000..cd9fa3dc
+};
diff --git a/arch/arm/boot/dts/overlay/sun4i-a10-uart6.dts b/arch/arm/boot/dts/overlay/sun4i-a10-uart6.dts
new file mode 100644
index 00000000..2f873d15
index 00000000..fc0eaaa6
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun4i-a10-uart6.dts
@@ -0,0 +1,21 @@
@@ -0,0 +1,31 @@
+/dts-v1/ /plugin/;
+
+/ {
@ -1594,6 +1632,16 @@ index 00000000..2f873d15
+ };
+
+ fragment@1 {
+ target = <&pio>;
+ __overlay__ {
+ uart6_pins_a: uart6@0 {
+ pins = "PI12", "PI13";
+ function = "uart6";
+ };
+ };
+ };
+
+ fragment@2 {
+ target = <&uart6>;
+ __overlay__ {
+ pinctrl-names = "default";
@ -1604,10 +1652,10 @@ index 00000000..2f873d15
+};
diff --git a/arch/arm/boot/dts/overlay/sun4i-a10-uart7.dts b/arch/arm/boot/dts/overlay/sun4i-a10-uart7.dts
new file mode 100644
index 00000000..531951da
index 00000000..78f77dfc
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun4i-a10-uart7.dts
@@ -0,0 +1,21 @@
@@ -0,0 +1,31 @@
+/dts-v1/ /plugin/;
+
+/ {
@ -1621,6 +1669,16 @@ index 00000000..531951da
+ };
+
+ fragment@1 {
+ target = <&pio>;
+ __overlay__ {
+ uart7_pins_a: uart7@0 {
+ pins = "PI20", "PI21";
+ function = "uart7";
+ };
+ };
+ };
+
+ fragment@2 {
+ target = <&uart7>;
+ __overlay__ {
+ pinctrl-names = "default";
@ -1723,10 +1781,10 @@ index 00000000..8ab3fb01
+};
diff --git a/arch/arm/boot/dts/overlay/sun7i-a20-fixup.scr-cmd b/arch/arm/boot/dts/overlay/sun7i-a20-fixup.scr-cmd
new file mode 100644
index 00000000..01348d69
index 00000000..0bf0a121
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun7i-a20-fixup.scr-cmd
@@ -0,0 +1,193 @@
@@ -0,0 +1,141 @@
+# overlays fixup script
+# implements (or rather substitutes) overlay arguments functionality
+# using u-boot scripting, environment variables and "fdt" command
@ -1744,80 +1802,74 @@ index 00000000..01348d69
+test "${tmp_bank}" = "H" && setenv tmp_bank 7;
+test "${tmp_bank}" = "I" && setenv tmp_bank 8'
+
+if test "${param_spinor_spi_bus}" = "0"; then
+ fdt set /soc@01c00000/spi@01c05000 status "okay"
+ fdt set /soc@01c00000/spi@01c05000/spiflash status "okay"
+if test -n "${param_spinor_spi_bus}"; then
+ test "${param_spinor_spi_bus}" = "0" && setenv tmp_spi_path "spi@01c05000"
+ test "${param_spinor_spi_bus}" = "1" && setenv tmp_spi_path "spi@01c06000"
+ test "${param_spinor_spi_bus}" = "2" && setenv tmp_spi_path "spi@01c17000"
+ fdt set /soc@01c00000/${tmp_spi_path} status "okay"
+ fdt set /soc@01c00000/${tmp_spi_path}/spiflash status "okay"
+ if test -n "${param_spinor_max_freq}"; then
+ fdt set /soc@01c00000/${tmp_spi_path}/spiflash spi-max-frequency "<${param_spinor_max_freq}>"
+ fi
+ if test "${param_spinor_spi_bus}" = "0" && test "${param_spinor_spi_cs}" = "1"; then
+ fdt set /soc@01c00000/${tmp_spi_path}/spiflash reg "<1>"
+ fi
+ env delete tmp_spi_path
+fi
+
+if test "${param_spinor_spi_bus}" = "1"; then
+ fdt set /soc@01c00000/spi@01c06000 status "okay"
+ fdt set /soc@01c00000/spi@01c06000/spiflash status "okay"
+if test -n "${param_mcp2515_spi_bus}"; then
+ test "${param_mcp2515_spi_bus}" = "0" && setenv tmp_spi_path "spi@01c05000"
+ test "${param_mcp2515_spi_bus}" = "1" && setenv tmp_spi_path "spi@01c06000"
+ test "${param_mcp2515_spi_bus}" = "2" && setenv tmp_spi_path "spi@01c17000"
+ fdt set /soc@01c00000/${tmp_spi_path} status "okay"
+ fdt set /soc@01c00000/${tmp_spi_path}/mcp2515 status "okay"
+ if test -n "${param_mcp2515_max_freq}"; then
+ fdt set /soc@01c00000/${tmp_spi_path}/mcp2515 spi-max-frequency "<${param_mcp2515_max_freq}>"
+ fi
+ if test "${param_mcp2515_spi_bus}" = "0" && test "${param_mcp2515_spi_cs}" = "1"; then
+ fdt set /soc@01c00000/${tmp_spi_path}/mcp2515 reg "<1>"
+ fi
+ if test -n "${param_mcp2515_int_pin}"; then
+ setenv tmp_bank "${param_mcp2515_int_pin}"
+ setenv tmp_pin "${param_mcp2515_int_pin}"
+ run decompose_pin
+ fdt set /soc@01c00000/pinctrl@01c20800/can0_pin_irq pins "${param_mcp2515_int_pin}"
+ fdt set /soc@01c00000/${tmp_spi_path}/mcp2515 interrupts "<${tmp_bank} ${tmp_pin} 0x2>"
+ env delete tmp_pin tmp_bank tmp_spi_path
+ fi
+ env delete tmp_spi_path
+fi
+
+if test "${param_spinor_spi_bus}" = "2"; then
+ fdt set /soc@01c00000/spi@01c17000 status "okay"
+ fdt set /soc@01c00000/spi@01c17000/spiflash status "okay"
+fi
+
+if test "${param_mcp2515_spi_bus}" = "0"; then
+ fdt set /soc@01c00000/spi@01c05000 status "okay"
+ fdt set /soc@01c00000/spi@01c05000/mcp2515 status "okay"
+fi
+
+if test "${param_mcp2515_spi_bus}" = "1"; then
+ fdt set /soc@01c00000/spi@01c06000 status "okay"
+ fdt set /soc@01c00000/spi@01c06000/mcp2515 status "okay"
+fi
+
+if test "${param_mcp2515_spi_bus}" = "2"; then
+ fdt set /soc@01c00000/spi@01c17000 status "okay"
+ fdt set /soc@01c00000/spi@01c17000/mcp2515 status "okay"
+fi
+
+if test "${param_spidev_spi_bus}" = "0"; then
+ fdt set /soc@01c00000/spi@01c05000 status "okay"
+ fdt set /soc@01c00000/spi@01c05000/spidev status "okay"
+fi
+
+if test "${param_spidev_spi_bus}" = "1"; then
+ fdt set /soc@01c00000/spi@01c06000 status "okay"
+ fdt set /soc@01c00000/spi@01c06000/spidev status "okay"
+fi
+
+if test "${param_spidev_spi_bus}" = "2"; then
+ fdt set /soc@01c00000/spi@01c17000 status "okay"
+ fdt set /soc@01c00000/spi@01c17000/spidev status "okay"
+fi
+
+if test "${param_ds1307_i2c_bus}" = "0"; then
+ fdt set /soc@01c00000/i2c@01c2ac00 status "okay"
+ fdt set /soc@01c00000/i2c@01c2ac00/ds1307@68 status "okay"
+fi
+
+if test "${param_ds1307_i2c_bus}" = "1"; then
+ fdt set /soc@01c00000/i2c@01c2b000 status "okay"
+ fdt set /soc@01c00000/i2c@01c2b000/ds1307@68 status "okay"
+fi
+
+if test "${param_ds1307_i2c_bus}" = "2"; then
+ fdt set /soc@01c00000/i2c@01c2b400 status "okay"
+ fdt set /soc@01c00000/i2c@01c2b400/ds1307@68 status "okay"
+fi
+
+if test "${param_ds1307_i2c_bus}" = "3"; then
+ fdt set /soc@01c00000/i2c@01c2b800 status "okay"
+ fdt set /soc@01c00000/i2c@01c2b800/ds1307@68 status "okay"
+fi
+
+if test "${param_ds1307_i2c_bus}" = "4"; then
+ fdt set /soc@01c00000/i2c@01c2c000 status "okay"
+ fdt set /soc@01c00000/i2c@01c2c000/ds1307@68 status "okay"
+if test -n "${param_spidev_spi_bus}"; then
+ test "${param_spidev_spi_bus}" = "0" && setenv tmp_spi_path "spi@01c05000"
+ test "${param_spidev_spi_bus}" = "1" && setenv tmp_spi_path "spi@01c06000"
+ test "${param_spidev_spi_bus}" = "2" && setenv tmp_spi_path "spi@01c17000"
+ fdt set /soc@01c00000/${tmp_spi_path} status "okay"
+ fdt set /soc@01c00000/${tmp_spi_path}/spidev status "okay"
+ if test -n "${param_spidev_max_freq}"; then
+ fdt set /soc@01c00000/${tmp_spi_path}/spidev spi-max-frequency "<${param_spidev_max_freq}>"
+ fi
+ if test "${param_spidev_spi_bus}" = "0" && test "${param_spidev_spi_cs}" = "1"; then
+ fdt set /soc@01c00000/${tmp_spi_path}/spidev reg "<1>"
+ fi
+ env delete tmp_spi_path
+fi
+
+if test -n "${param_mcp2515_clk_freq}"; then
+ fdt set /clocks/can0_osc_fixed clock-frequency "<${param_mcp2515_clk_freq}>"
+fi
+
+if test -n "${param_ds1307_i2c_bus}"; then
+ test "${param_ds1307_i2c_bus}" = "0" && setenv tmp_i2c_path "i2c@01c2ac00"
+ test "${param_ds1307_i2c_bus}" = "1" && setenv tmp_i2c_path "i2c@01c2b000"
+ test "${param_ds1307_i2c_bus}" = "2" && setenv tmp_i2c_path "i2c@01c2b400"
+ test "${param_ds1307_i2c_bus}" = "3" && setenv tmp_i2c_path "i2c@01c2b800"
+ test "${param_ds1307_i2c_bus}" = "4" && setenv tmp_i2c_path "i2c@01c2c000"
+ fdt set /soc@01c00000/${tmp_i2c_path} status "okay"
+ fdt set /soc@01c00000/${tmp_i2c_path}/ds1307@68 status "okay"
+ env delete tmp_i2c_path
+fi
+
+if test "${param_spi2_bus_pins}" = "b"; then
+ fdt get value tmp_phandle1 /soc@01c00000/pinctrl@01c20800/spi2@1 phandle
+ fdt get value tmp_phandle2 /soc@01c00000/pinctrl@01c20800/spi2_cs0@1 phandle
@ -1826,52 +1878,6 @@ index 00000000..01348d69
+ env delete tmp_phandle1 tmp_phandle2
+fi
+
+if test -n "${param_mcp2515_int_pin}"; then
+ setenv tmp_bank "${param_mcp2515_int_pin}"
+ setenv tmp_pin "${param_mcp2515_int_pin}"
+ run decompose_pin
+ fdt set /soc@01c00000/pinctrl@01c20800/can0_pin_irq pins "${param_mcp2515_int_pin}"
+ if test "${param_mcp2515_spi_bus}" = "0"; then
+ setenv tmp_spi_path "spi@01c05000"
+ fi
+ if test "${param_mcp2515_spi_bus}" = "1"; then
+ setenv tmp_spi_path "spi@01c06000"
+ fi
+ if test "${param_mcp2515_spi_bus}" = "2"; then
+ setenv tmp_spi_path "spi@01c17000"
+ fi
+ fdt set /soc@01c00000/${tmp_spi_path}/mcp2515 interrupts "<${tmp_bank} ${tmp_pin} 0x2>"
+ env delete tmp_pin tmp_bank tmp_spi_path
+fi
+
+if test -n "${param_spidev_max_freq}"; then
+ if test "${param_spidev_spi_bus}" = "0"; then
+ setenv tmp_spi_path "spi@01c05000"
+ fi
+ if test "${param_spidev_spi_bus}" = "1"; then
+ setenv tmp_spi_path "spi@01c06000"
+ fi
+ if test "${param_spidev_spi_bus}" = "2"; then
+ setenv tmp_spi_path "spi@01c17000"
+ fi
+ fdt set /soc@01c00000/${tmp_spi_path}/spidev spi-max-frequency "<${param_spidev_max_freq}>"
+ env delete tmp_spi_path
+fi
+
+if test -n "${param_spinor_max_freq}"; then
+ if test "${param_spinor_spi_bus}" = "0"; then
+ setenv tmp_spi_path "spi@01c05000"
+ fi
+ if test "${param_spinor_spi_bus}" = "1"; then
+ setenv tmp_spi_path "spi@01c06000"
+ fi
+ if test "${param_spinor_spi_bus}" = "2"; then
+ setenv tmp_spi_path "spi@01c17000"
+ fi
+ fdt set /soc@01c00000/${tmp_spi_path}/spiflash spi-max-frequency "<${param_spinor_max_freq}>"
+ env delete tmp_spi_path
+fi
+
+if test -n "${param_pps_pin}"; then
+ setenv tmp_bank "${param_pps_pin}"
+ setenv tmp_pin "${param_pps_pin}"
@ -1922,7 +1928,7 @@ index 00000000..01348d69
+fi
diff --git a/arch/arm/boot/dts/overlay/sun7i-a20-i2c-ds1307.dts b/arch/arm/boot/dts/overlay/sun7i-a20-i2c-ds1307.dts
new file mode 100644
index 00000000..9ac0aae3
index 00000000..5b94cd1b
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun7i-a20-i2c-ds1307.dts
@@ -0,0 +1,81 @@
@ -2359,6 +2365,27 @@ index 00000000..0463f43c
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/overlay/sun7i-a20-spi-add-cs1.dts b/arch/arm/boot/dts/overlay/sun7i-a20-spi-add-cs1.dts
new file mode 100644
index 00000000..c076641c
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun7i-a20-spi-add-cs1.dts
@@ -0,0 +1,15 @@
+/dts-v1/ /plugin/;
+
+/ {
+ compatible = "allwinner,sun7i-a20";
+
+ fragment@0 {
+ target = <&spi0>;
+ __overlay__ {
+ pinctrl-names = "default", "default", "default";
+ pinctrl-0 = <&spi0_pins_a>;
+ pinctrl-1 = <&spi0_cs0_pins_a>;
+ pinctrl-2 = <&spi0_cs1_pins_a>;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/overlay/sun7i-a20-spi-jedec-nor.dts b/arch/arm/boot/dts/overlay/sun7i-a20-spi-jedec-nor.dts
new file mode 100644
index 00000000..dc0e624e