rockchip64: enable orange pi 4 lts DMC driver

This commit is contained in:
Paolo Sabatino 2023-02-05 15:51:43 +00:00 committed by Paolo
parent 03a00c5ce4
commit 06ff3e3f07

View File

@ -1,9 +1,9 @@
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts b/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts
new file mode 100644
index 00000000000..e0490aaa7ba
index 00000000000..43f081ec1ab
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi-4-lts.dts
@@ -0,0 +1,1258 @@
@@ -0,0 +1,1254 @@
+/*
+ * SPDX-License-Identifier: (GPL-2.0+ or MIT)
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
@ -201,21 +201,6 @@ index 00000000000..e0490aaa7ba
+
+ };
+
+ /*
+ dw_hdmi_audio: dw-hdmi-audio {
+ status = "disable";
+ compatible = "rockchip,dw-hdmi-audio";
+ #sound-dai-cells = <0>;
+ };
+
+ hdmi_dp_sound: hdmi-dp-sound {
+ status = "okay";
+ compatible = "rockchip,rk3399-hdmi-dp";
+ rockchip,cpu = <&i2s2>;
+ rockchip,codec = <&hdmi>, <&cdn_dp>;
+ };
+ */
+
+ hdmi-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
@ -383,6 +368,26 @@ index 00000000000..e0490aaa7ba
+ status = "okay";
+ };
+
+ dmc_opp_table: dmc_opp_table {
+ compatible = "operating-points-v2";
+
+ opp00 {
+ opp-hz = /bits/ 64 <328000000>;
+ opp-microvolt = <900000>;
+ };
+
+ opp01 {
+ opp-hz = /bits/ 64 <416000000>;
+ opp-microvolt = <900000>;
+ };
+
+ opp02 {
+ opp-hz = /bits/ 64 <666000000>;
+ opp-microvolt = <900000>;
+ };
+
+ };
+
+};
+
+&cpu_l0 {
@ -442,37 +447,11 @@ index 00000000000..e0490aaa7ba
+ status = "okay";
+ };
+};
+/*
+&spi1 {
+ status = "okay";
+ max-freq = <48000000>;
+ spidev@00 {
+ compatible = "linux,spidev";
+ reg = <0x00>;
+ spi-max-frequency = <48000000>;
+ };
+};
+*/
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
+ status = "okay";
+
+ /*
+ bluetooth {
+ compatible = "brcm,bcm4345c5";
+ clocks = <&rk808 1>;
+ clock-names = "lpo";
+ device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
+ host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
+ max-speed = <1500000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&bt_host_wake &bt_wake &bt_reset>;
+ };
+ */
+
+};
+
+&uart2 {
@ -853,13 +832,6 @@ index 00000000000..e0490aaa7ba
+ status = "okay";
+ };
+
+ /*
+ onewire_ts@2f {
+ compatible = "onewire";
+ reg = <0x2f>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <20 IRQ_TYPE_EDGE_FALLING>;
+ }; */
+};
+
+&i2c7 {
@ -1262,3 +1234,27 @@ index 00000000000..e0490aaa7ba
+ status = "okay";
+};
+
+&dmc {
+ status = "okay";
+ center-supply = <&vdd_log>;
+ operating-points-v2 = <&dmc_opp_table>;
+
+ rockchip,pd-idle-ns = <160>;
+ rockchip,sr-idle-ns = <10240>;
+ rockchip,sr-mc-gate-idle-ns = <40960>;
+ rockchip,srpd-lite-idle-ns = <61440>;
+ rockchip,standby-idle-ns = <81920>;
+
+ rockchip,ddr3_odt_dis_freq = <666000000>;
+ rockchip,lpddr3_odt_dis_freq = <666000000>;
+ rockchip,lpddr4_odt_dis_freq = <666000000>;
+
+ rockchip,sr-mc-gate-idle-dis-freq-hz = <1000000000>;
+ rockchip,srpd-lite-idle-dis-freq-hz = <0>;
+ rockchip,standby-idle-dis-freq-hz = <928000000>;
+
+};
+
+&dfi {
+ status = "okay";
+};