meson64-6.17: rework g12b pinmux/pinctrl; thanks to retro98boy
> The kernel upstream fixed the missing PWM pinctrl C code for g12b and > sm1, but did not add these PWM pinctrl nodes in the device tree. > Therefore, only need to delete the > meson-g12b-pinctrl-Add-missing-pinmux-for-pwm.patch from the repository > and add a meson-g12b-dt-Add-missing-pinmux-node-for-pwm.patch. > This patch does not include all PWM pinctrl nodes, only adding some > g12b PWM pinctrl nodes as in the old patch. Notably, pwm_b_z_pins was > renamed to pwm_b_z0_pins, but this is not used in the build repository. - thus: - added `meson-g12b-dt-Add-missing-pinmux-node-for-pwm.patch` - dropped `meson-g12b-pinctrl-Add-missing-pinmux-for-pwm.patch` - kept `dt/meson-g12b-a311d-cainiao-cniot-core.dts` Co-authored-by: retro98boy <retro98boy@qq.com>
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@ -0,0 +1,64 @@
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From 3f936558703991a4a820f3efd9b40ca5d586dd21 Mon Sep 17 00:00:00 2001
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From: retro98boy <retro98boy@qq.com>
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Date: Wed, 8 Oct 2025 19:06:53 +0800
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Subject: [PATCH] arm64: dts: amlogic: Add several missing g12b pinmux node for
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pwm functions
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Related commits: https://github.com/torvalds/linux/commit/b58ea88d301cd4c0403f298468442dacac4f8c4e
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---
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arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 42 +++++++++++++++++++++
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1 file changed, 42 insertions(+)
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diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
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index 86e6ceb31..067820380 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
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@@ -149,3 +149,45 @@ &pmu {
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&npu {
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power-domains = <&pwrc PWRC_G12A_NNA_ID>;
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};
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+
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+&periphs_pinctrl {
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+ pwm_b_h_pins: pwm-b-h {
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+ mux {
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+ groups = "pwm_b_h";
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+ function = "pwm_b";
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+ bias-disable;
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+ };
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+ };
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+
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+ pwm_b_z0_pins: pwm-b-z0 {
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+ mux {
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+ groups = "pwm_b_z0";
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+ function = "pwm_b";
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+ bias-disable;
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+ };
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+ };
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+
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+ pwm_c_z_pins: pwm-c-z {
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+ mux {
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+ groups = "pwm_c_z";
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+ function = "pwm_c";
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+ bias-disable;
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+ };
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+ };
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+
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+ pwm_d_z_pins: pwm-d-z {
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+ mux {
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+ groups = "pwm_d_z";
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+ function = "pwm_d";
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+ bias-disable;
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+ };
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+ };
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+
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+ pwm_d_a_pins: pwm-d-a {
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+ mux {
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+ groups = "pwm_d_a";
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+ function = "pwm_d";
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+ bias-disable;
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+ };
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+ };
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+};
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--
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2.51.0
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@ -1,135 +0,0 @@
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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Yuntian Zhang <yt@radxa.com>
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Date: Thu, 13 Jan 2022 21:34:10 +0800
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Subject: pinctrl: meson: Add several missing pinmux for pwm functions
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The following pin definitions are mentioned in A311D Quick
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Reference Manual and S922X Public Datasheet, but not in S905Y2
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Quick Reference Manual, so adding them to meson-g12b family.
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They are currently exposed in Radxa Zero 2's GPIO header.
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Signed-off-by: Yuntian Zhang <yt@radxa.com>
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---
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arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 42 ++++++++++
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drivers/pinctrl/meson/pinctrl-meson-g12a.c | 16 +++-
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2 files changed, 55 insertions(+), 3 deletions(-)
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diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
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index 111111111111..222222222222 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
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@@ -149,3 +149,45 @@ &pmu {
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&npu {
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power-domains = <&pwrc PWRC_G12A_NNA_ID>;
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};
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+
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+&periphs_pinctrl {
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+ pwm_b_h_pins: pwm-b-h {
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+ mux {
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+ groups = "pwm_b_h";
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+ function = "pwm_b";
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+ bias-disable;
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+ };
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+ };
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+
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+ pwm_b_z_pins: pwm-b-z {
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+ mux {
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+ groups = "pwm_b_z";
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+ function = "pwm_b";
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+ bias-disable;
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+ };
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+ };
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+
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+ pwm_c_z_pins: pwm-c-z {
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+ mux {
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+ groups = "pwm_c_z";
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+ function = "pwm_c";
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+ bias-disable;
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+ };
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+ };
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+
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+ pwm_d_z_pins: pwm-d-z {
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+ mux {
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+ groups = "pwm_d_z";
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+ function = "pwm_d";
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+ bias-disable;
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+ };
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+ };
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+
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+ pwm_d_a_pins: pwm-d-a {
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+ mux {
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+ groups = "pwm_d_a";
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+ function = "pwm_d";
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+ bias-disable;
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+ };
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+ };
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+};
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diff --git a/drivers/pinctrl/meson/pinctrl-meson-g12a.c b/drivers/pinctrl/meson/pinctrl-meson-g12a.c
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index 111111111111..222222222222 100644
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--- a/drivers/pinctrl/meson/pinctrl-meson-g12a.c
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+++ b/drivers/pinctrl/meson/pinctrl-meson-g12a.c
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@@ -271,17 +271,22 @@ static const unsigned int eth_act_led_pins[] = { GPIOZ_15 };
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static const unsigned int pwm_a_pins[] = { GPIOX_6 };
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/* pwm_b */
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+static const unsigned int pwm_b_h_pins[] = { GPIOH_7 };
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static const unsigned int pwm_b_x7_pins[] = { GPIOX_7 };
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static const unsigned int pwm_b_x19_pins[] = { GPIOX_19 };
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+static const unsigned int pwm_b_z_pins[] = { GPIOZ_0 };
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/* pwm_c */
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static const unsigned int pwm_c_c_pins[] = { GPIOC_4 };
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static const unsigned int pwm_c_x5_pins[] = { GPIOX_5 };
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static const unsigned int pwm_c_x8_pins[] = { GPIOX_8 };
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+static const unsigned int pwm_c_z_pins[] = { GPIOZ_1 };
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/* pwm_d */
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static const unsigned int pwm_d_x3_pins[] = { GPIOX_3 };
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static const unsigned int pwm_d_x6_pins[] = { GPIOX_6 };
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+static const unsigned int pwm_d_z_pins[] = { GPIOZ_2 };
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+static const unsigned int pwm_d_a_pins[] = { GPIOA_4 };
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/* pwm_e */
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static const unsigned int pwm_e_pins[] = { GPIOX_16 };
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@@ -594,6 +599,10 @@ static const struct meson_pmx_group meson_g12a_periphs_groups[] = {
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GROUP(bt565_a_din5, 2),
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GROUP(bt565_a_din6, 2),
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GROUP(bt565_a_din7, 2),
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+ GROUP(pwm_b_z, 5),
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+ GROUP(pwm_c_z, 5),
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+ GROUP(pwm_d_z, 2),
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+ GROUP(pwm_d_a, 3),
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GROUP(tsin_b_valid_z, 3),
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GROUP(tsin_b_sop_z, 3),
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GROUP(tsin_b_din0_z, 3),
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@@ -726,6 +735,7 @@ static const struct meson_pmx_group meson_g12a_periphs_groups[] = {
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GROUP(uart_c_rts, 2),
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GROUP(iso7816_clk_h, 1),
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GROUP(iso7816_data_h, 1),
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+ GROUP(pwm_b_h, 5),
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GROUP(pwm_f_h, 4),
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GROUP(cec_ao_a_h, 4),
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GROUP(cec_ao_b_h, 5),
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@@ -1066,15 +1076,15 @@ static const char * const pwm_a_groups[] = {
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};
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static const char * const pwm_b_groups[] = {
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- "pwm_b_x7", "pwm_b_x19",
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+ "pwm_b_h", "pwm_b_x7", "pwm_b_x19", "pwm_b_z",
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};
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static const char * const pwm_c_groups[] = {
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- "pwm_c_c", "pwm_c_x5", "pwm_c_x8",
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+ "pwm_c_c", "pwm_c_x5", "pwm_c_x8", "pwm_c_z",
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};
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static const char * const pwm_d_groups[] = {
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- "pwm_d_x3", "pwm_d_x6",
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+ "pwm_d_x3", "pwm_d_x6", "pwm_d_z", "pwm_d_a",
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};
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static const char * const pwm_e_groups[] = {
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--
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Armbian
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