DTS tinker dev DSI first pass
DTS updates only.
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parent
638552a987
commit
037e07b303
177
patch/kernel/rockchip-dev/9003_Tinker_DTS_DSI.patch
Normal file
177
patch/kernel/rockchip-dev/9003_Tinker_DTS_DSI.patch
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@ -0,0 +1,177 @@
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diff --git a/arch/arm/boot/dts/rk3288-miniarm.dts b/arch/arm/boot/dts/rk3288-miniarm.dts
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index 348e9be..3896506 100644
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--- a/arch/arm/boot/dts/rk3288-miniarm.dts
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+++ b/arch/arm/boot/dts/rk3288-miniarm.dts
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@@ -194,6 +194,16 @@
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status = "ok";
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};
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+&mipi_dsi {
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+ status = "okay";
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+ mipi_panel: mipi-panel {
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+ compatible ="asus,tc358762";
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+ reg = <0>;
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+ status = "okay";
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+ };
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+};
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+
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+
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&hdmi {
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ddc-i2c-bus = <&i2c5>;
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status = "okay";
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@@ -400,9 +410,15 @@
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&i2c2 {
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status = "okay";
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+ afc0:af-controller@0 {
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+ status = "okay";
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+ compatible = "silicon touch,vm149C-v4l2-i2c-subdev";
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+ reg = < 0x0c >;
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+ };
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+
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eeprom:m24c08@50 {
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- compatible = "at,24c08";
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- reg = <0x50>;
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+ compatible = "at,24c08";
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+ reg = <0x50>;
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};
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};
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@@ -626,6 +642,7 @@
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};
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&usb_host0_ehci {
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+ no-relinquish-port;
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status = "okay";
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};
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diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
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index 0591a6f..6cb09fe 100644
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--- a/arch/arm/boot/dts/rk3288.dtsi
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+++ b/arch/arm/boot/dts/rk3288.dtsi
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@@ -264,44 +264,6 @@
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#iommu-cells = <0>;
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};
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- gpu: mali@ffa30000 {
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- compatible = "arm,malit764",
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- "arm,malit76x",
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- "arm,malit7xx",
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- "arm,mali-midgard";
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- reg = <0xffa30000 0x10000>;
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- interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
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- <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
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- <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
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- interrupt-names = "JOB", "MMU", "GPU";
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- clocks = <&cru ACLK_GPU>;
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- clock-names = "clk_mali";
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- operating-points = <
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- /* KHz uV */
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- 100000 950000
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- 200000 950000
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- 300000 1000000
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- 400000 1100000
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- 500000 1200000
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- 600000 1250000
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- >;
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- #cooling-cells = <2>; /* min followed by max */
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- power-domains = <&power RK3288_PD_GPU>;
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- status = "disabled";
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-
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-
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- gpu_power_model: power_model {
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- compatible = "arm,mali-simple-power-model";
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- voltage = <950>;
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- frequency = <500>;
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- static-power = <300>;
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- dynamic-power = <396>;
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- ts = <32000 4700 (-80) 2>;
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- thermal-zone = "gpu_thermal";
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- };
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-
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- };
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-
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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@@ -360,8 +322,6 @@
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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fifo-depth = <0x100>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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- #address-cells = <1>;
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- #size-cells = <0>;
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reg = <0xff0c0000 0x4000>;
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resets = <&cru SRST_MMC0>;
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reset-names = "reset";
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@@ -376,8 +336,6 @@
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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fifo-depth = <0x100>;
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interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
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- #address-cells = <1>;
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- #size-cells = <0>;
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reg = <0xff0d0000 0x4000>;
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resets = <&cru SRST_SDIO0>;
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reset-names = "reset";
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@@ -392,8 +350,6 @@
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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fifo-depth = <0x100>;
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interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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- #address-cells = <1>;
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- #size-cells = <0>;
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reg = <0xff0e0000 0x4000>;
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resets = <&cru SRST_SDIO1>;
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reset-names = "reset";
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@@ -408,8 +364,6 @@
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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fifo-depth = <0x100>;
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interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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- #address-cells = <1>;
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- #size-cells = <0>;
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reg = <0xff0f0000 0x4000>;
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resets = <&cru SRST_EMMC>;
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reset-names = "reset";
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@@ -1274,6 +1228,44 @@
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};
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};
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+ gpu: mali@ffa30000 {
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+ compatible = "arm,malit764",
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+ "arm,malit76x",
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+ "arm,malit7xx",
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+ "arm,mali-midgard";
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+ reg = <0xffa30000 0x10000>;
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+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupt-names = "JOB", "MMU", "GPU";
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+ clocks = <&cru ACLK_GPU>;
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+ clock-names = "clk_mali";
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+ operating-points = <
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+ /* KHz uV */
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+ 100000 950000
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+ 200000 950000
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+ 300000 1000000
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+ 400000 1100000
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+ 500000 1200000
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+ 600000 1250000
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+ >;
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+ #cooling-cells = <2>; /* min followed by max */
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+ power-domains = <&power RK3288_PD_GPU>;
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+ status = "disabled";
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+
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+
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+ gpu_power_model: power_model {
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+ compatible = "arm,mali-simple-power-model";
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+ voltage = <950>;
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+ frequency = <500>;
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+ static-power = <300>;
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+ dynamic-power = <396>;
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+ ts = <32000 4700 (-80) 2>;
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+ thermal-zone = "gpu_thermal";
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+ };
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+
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+ };
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+
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qos_gpu_r: qos@ffaa0000 {
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compatible = "syscon";
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reg = <0xffaa0000 0x20>;
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