diff --git a/arm-trusted-firmware/plat/sun50iw1p1/plat_pm.c b/arm-trusted-firmware/plat/sun50iw1p1/plat_pm.c
index ec26248..ed53871 100644
--- a/arm-trusted-firmware/plat/sun50iw1p1/plat_pm.c
+++ b/arm-trusted-firmware/plat/sun50iw1p1/plat_pm.c
@@ -254,7 +254,59 @@ static int32_t sunxi_affinst_suspend_finish(uint64_t mpidr,
  ******************************************************************************/
 static void __dead2 sunxi_system_off(void)
 {
-	sunxi_pmic_write(0x32, sunxi_pmic_read(0x32) | 0x80);
+	uint16_t soc_id;
+	uint32_t reg;
+	soc_id = sunxi_get_socid();
+
+	switch (soc_id) {
+	case 0x1689:
+		sunxi_pmic_write(0x32, sunxi_pmic_read(0x32) | 0x80);
+		break;
+	case 0x1718:
+		/* Disable EMAC power: PD6 to low */
+		reg = mmio_read_32(0x01c20800 + 0x6c);
+		reg &= ~(0x7 << 24);
+		reg |= (0x1 << 24);
+		mmio_write_32(0x01f02c00 + 0x6c, reg);
+
+		reg = mmio_read_32(0x01c20800 + 0x7c);
+		reg &= ~(0x1 << 6);
+		mmio_write_32(0x01f02c00 + 0x7c, reg);
+
+		/* Disable DRAM regulator: PL9 to low */
+		reg = mmio_read_32(0x01f02c00 + 0x04);
+		reg &= ~(0x7 << 4);
+		reg |= (0x1 << 4);
+		mmio_write_32(0x01f02c00 + 0x04, reg);
+
+		reg = mmio_read_32(0x01f02c00 + 0x10);
+		reg &= ~(0x1 << 9);
+		mmio_write_32(0x01f02c00 + 0x10, reg);
+
+		/* Disable I/O regulator: PL5 to low - Edit: not needed
+		reg = mmio_read_32(0x01f02c00 + 0x00);
+		reg &= ~(0x7 << 20);
+		reg |= (0x1 << 20);
+		mmio_write_32(0x01f02c00 + 0x00, reg);
+
+		reg = mmio_read_32(0x01f02c00 + 0x10);
+		reg &= ~(0x1 << 5);
+		mmio_write_32(0x01f02c00 + 0x10, reg); */
+
+		/* Disable CPU regulator: PL8 to low */
+		reg = mmio_read_32(0x01f02c00 + 0x04);
+		reg &= ~0x7;
+		reg |= 0x1;
+		mmio_write_32(0x01f02c00 + 0x04, reg);
+
+		reg = mmio_read_32(0x01f02c00 + 0x10);
+		reg &= ~(0x1 << 8);
+		mmio_write_32(0x01f02c00 + 0x10, reg);
+
+		udelay(100);
+		break;
+	}
+
 	ERROR("PSCI system shutdown: still alive ...\n");
 
 	wfi();