diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index 313af45f..5049f156 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -83,8 +83,8 @@ reg = <0x01f01428 0x4>; #clock-cells = <1>; clocks = <&apb0>; - clock-indices = <0>, <1>; - clock-output-names = "apb0_pio", "apb0_ir"; + clock-indices = <0>, <1>, <6>; + clock-output-names = "apb0_pio", "apb0_ir", "apb0_i2c"; }; ir_clk: ir_clk@01f01454 { @@ -288,14 +288,12 @@ }; emac_rgmii_pins: emac0@0 { - allwinner,pins = "PD0", "PD1", "PD2", "PD3", + pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD7", "PD8", "PD9", "PD10", "PD12", "PD13", "PD15", "PD16", "PD17"; - allwinner,function = "emac"; - allwinner,drive = ; - allwinner,pull = ; + function = "emac"; }; mmc0_pins_a: mmc0@0 { @@ -366,6 +364,14 @@ }; }; + thermal-zones { + cpu_thermal: cpu_thermal { + polling-delay-passive = <330>; + polling-delay = <1000>; + thermal-sensors = <&ths 0>; + }; + }; + timer@01c20c00 { compatible = "allwinner,sun4i-a10-timer"; reg = <0x01c20c00 0xa0>; @@ -434,6 +440,18 @@ status = "disabled"; }; + ths: ths@01c25000 { + #thermal-sensor-cells = <0>; + compatible = "allwinner,sun8i-h3-ths"; + reg = <0x01c25000 0x400>, + <0x01c14234 0x4>; + interrupts = ; + resets = <&ccu RST_BUS_THS>; + reset-names = "ahb"; + clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>; + clock-names = "ahb", "ths"; + }; + uart0: serial@01c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; @@ -553,6 +571,20 @@ status = "disabled"; }; + r_i2c: i2c@01f02400 { + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x01f02400 0x400>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&r_i2c_pins_a>; + clocks = <&apb0_gates 6>; + clock-frequency = <100000>; + resets = <&apb0_reset 6>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + r_pio: pinctrl@01f02c00 { compatible = "allwinner,sun8i-h3-r-pinctrl"; reg = <0x01f02c00 0x400>; @@ -569,6 +601,11 @@ pins = "PL11"; function = "s_cir_rx"; }; + + r_i2c_pins_a: r_i2c@0 { + pins = "PL0", "PL1"; + function = "s_twi"; + }; }; emac: ethernet@1c30000 { diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts index 37ac1708..0ccdcaa1 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts @@ -46,6 +46,7 @@ #include #include #include +#include / { model = "Xunlong Orange Pi PC 2"; @@ -111,6 +112,95 @@ status = "okay"; }; +&cpu0 { + operating-points = < + /* kHz uV */ + 1368000 1400000 + 1344000 1400000 + 1296000 1340000 + 1248000 1280000 + 1224000 1260000 + 1200000 1240000 + 1152000 1200000 + 1104000 1170000 + 1080000 1160000 + 1056000 1150000 + 1008000 1100000 + 960000 1080000 + 936000 1060000 + 912000 1050000 + 864000 1040000 + 816000 1000000 + 792000 1000000 + 768000 980000 + 720000 970000 + 672000 970000 + 648000 970000 + 528000 940000 + 480000 940000 + 240000 940000 + 120000 940000 + >; + #cooling-cells = <2>; + cooling-min-level = <0>; + cooling-max-level = <24>; + cpu0-supply = <&vdd_cpu>; +}; + +&cpu_thermal { + trips { + cpu_warm: cpu_warm { + temperature = <65000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_hot: cpu_hot { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_very_hot: cpu_very_hot { + temperature = <90000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit: cpu_crit { + temperature = <105000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + cpu_warm_limit_cpu { + trip = <&cpu_warm>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + cpu_hot_limit_cpu { + trip = <&cpu_hot>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + cpu_very_hot_limit_cpu { + trip = <&cpu_very_hot>; + cooling-device = <&cpu0 18 THERMAL_NO_LIMIT>; /* Limit cpu speed above 90C to 720MHz */ + }; + }; +}; + +&r_i2c { + status = "okay"; + + vdd_cpu: regulator@65 { + compatible = "silergy,sy8106a"; + reg = <0x65>; + regulator-min-microvolt = <940000>; + regulator-max-microvolt = <1400000>; + regulator-ramp-delay = <200>; + regulator-boot-on; + regulator-always-on; + }; +}; + &ehci1 { status = "okay"; }; @@ -190,3 +280,7 @@ allwinner,leds-active-low; status = "okay"; }; + +&codec { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi index 7a31302b..9ed139db 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi @@ -49,11 +49,14 @@ #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu0: cpu@0 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; + clock-latency = <244144>; /* 8 32k periods */ + clock-frequency = <1200000000>; }; cpu@1 { @@ -61,6 +64,7 @@ device_type = "cpu"; reg = <1>; enable-method = "psci"; + clock-frequency = <1200000000>; }; cpu@2 { @@ -68,6 +72,7 @@ device_type = "cpu"; reg = <2>; enable-method = "psci"; + clock-frequency = <1200000000>; }; cpu@3 { @@ -75,6 +80,7 @@ device_type = "cpu"; reg = <3>; enable-method = "psci"; + clock-frequency = <1200000000>; }; };