From ff481f855e7bd889248d97435503df2ab95f8258 Mon Sep 17 00:00:00 2001 From: kskshaf <118548920+kskshaf@users.noreply.github.com> Date: Mon, 2 Mar 2026 01:48:35 +0800 Subject: [PATCH] OrangePi 3B: Add device tree overlay files for OrangePi 3B * Including support for I2C, PWM, SPI, and UART devices. * Since UART2 is reserved by default for serial console debugging, the uart2-m0 overlay is not added. * See more overlays: [orangepi-xunlong/linux-orangepi](https://github.com/orangepi-xunlong/linux-orangepi/tree/orange-pi-5.10-rk35xx/arch/arm64/boot/dts/rockchip/overlay) --- .../archive/rockchip64-6.18/overlay/Makefile | 10 ++++++++++ .../overlay/rockchip-rk3566-i2c2-m1.dtso | 14 ++++++++++++++ .../overlay/rockchip-rk3566-i2c3-m0.dtso | 14 ++++++++++++++ .../overlay/rockchip-rk3566-i2c4-m0.dtso | 14 ++++++++++++++ .../overlay/rockchip-rk3566-pwm11-m1.dtso | 13 +++++++++++++ .../overlay/rockchip-rk3566-pwm15-m1.dtso | 13 +++++++++++++ .../overlay/rockchip-rk3566-pwm7.dtso | 12 ++++++++++++ .../rockchip-rk3566-spi3-m0-cs0-spidev.dtso | 19 +++++++++++++++++++ .../overlay/rockchip-rk3566-uart3-m0.dtso | 13 +++++++++++++ .../overlay/rockchip-rk3566-uart7-m2.dtso | 13 +++++++++++++ .../overlay/rockchip-rk3566-uart9-m2.dtso | 13 +++++++++++++ .../archive/rockchip64-6.19/overlay/Makefile | 10 ++++++++++ .../overlay/rockchip-rk3566-i2c2-m1.dtso | 14 ++++++++++++++ .../overlay/rockchip-rk3566-i2c3-m0.dtso | 14 ++++++++++++++ .../overlay/rockchip-rk3566-i2c4-m0.dtso | 14 ++++++++++++++ .../overlay/rockchip-rk3566-pwm11-m1.dtso | 13 +++++++++++++ .../overlay/rockchip-rk3566-pwm15-m1.dtso | 13 +++++++++++++ .../overlay/rockchip-rk3566-pwm7.dtso | 12 ++++++++++++ .../rockchip-rk3566-spi3-m0-cs0-spidev.dtso | 19 +++++++++++++++++++ .../overlay/rockchip-rk3566-uart3-m0.dtso | 13 +++++++++++++ .../overlay/rockchip-rk3566-uart7-m2.dtso | 13 +++++++++++++ .../overlay/rockchip-rk3566-uart9-m2.dtso | 13 +++++++++++++ 22 files changed, 296 insertions(+) create mode 100644 patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-i2c2-m1.dtso create mode 100644 patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-i2c3-m0.dtso create mode 100644 patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-i2c4-m0.dtso create mode 100644 patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-pwm11-m1.dtso create mode 100644 patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-pwm15-m1.dtso create mode 100644 patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-pwm7.dtso create mode 100644 patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-spi3-m0-cs0-spidev.dtso create mode 100644 patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-uart3-m0.dtso create mode 100644 patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-uart7-m2.dtso create mode 100644 patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-uart9-m2.dtso create mode 100644 patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-i2c2-m1.dtso create mode 100644 patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-i2c3-m0.dtso create mode 100644 patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-i2c4-m0.dtso create mode 100644 patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-pwm11-m1.dtso create mode 100644 patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-pwm15-m1.dtso create mode 100644 patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-pwm7.dtso create mode 100644 patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-spi3-m0-cs0-spidev.dtso create mode 100644 patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-uart3-m0.dtso create mode 100644 patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-uart7-m2.dtso create mode 100644 patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-uart9-m2.dtso diff --git a/patch/kernel/archive/rockchip64-6.18/overlay/Makefile b/patch/kernel/archive/rockchip64-6.18/overlay/Makefile index a05b4b98db..c3cb5ce34e 100644 --- a/patch/kernel/archive/rockchip64-6.18/overlay/Makefile +++ b/patch/kernel/archive/rockchip64-6.18/overlay/Makefile @@ -44,6 +44,16 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \ rockchip-rk3399-uart4.dtbo \ rockchip-rk3399-w1-gpio.dtbo \ rockchip-rk3566-sata2.dtbo \ + rockchip-rk3566-i2c2-m1.dtbo \ + rockchip-rk3566-i2c3-m0.dtbo \ + rockchip-rk3566-i2c4-m0.dtbo \ + rockchip-rk3566-pwm7.dtbo \ + rockchip-rk3566-pwm11-m1.dtbo \ + rockchip-rk3566-pwm15-m1.dtbo \ + rockchip-rk3566-spi3-m0-cs0-spidev.dtbo \ + rockchip-rk3566-uart3-m0.dtbo \ + rockchip-rk3566-uart7-m2.dtbo \ + rockchip-rk3566-uart9-m2.dtbo \ rockchip-rk3568-nanopi-r5c-leds.dtbo \ rockchip-rk3568-nanopi-r5s-leds.dtbo \ rockchip-rk3568-hk-i2c0.dtbo \ diff --git a/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-i2c2-m1.dtso b/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-i2c2-m1.dtso new file mode 100644 index 0000000000..c9e877b27c --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-i2c2-m1.dtso @@ -0,0 +1,14 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&i2c2>; + + __overlay__ { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2m1_xfer>; + }; + }; +}; diff --git a/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-i2c3-m0.dtso b/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-i2c3-m0.dtso new file mode 100644 index 0000000000..c9fb6b4e5c --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-i2c3-m0.dtso @@ -0,0 +1,14 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&i2c3>; + + __overlay__ { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c3m0_xfer>; + }; + }; +}; diff --git a/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-i2c4-m0.dtso b/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-i2c4-m0.dtso new file mode 100644 index 0000000000..db4d12aa78 --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-i2c4-m0.dtso @@ -0,0 +1,14 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&i2c4>; + + __overlay__ { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c4m0_xfer>; + }; + }; +}; diff --git a/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-pwm11-m1.dtso b/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-pwm11-m1.dtso new file mode 100644 index 0000000000..eec9557064 --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-pwm11-m1.dtso @@ -0,0 +1,13 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&pwm11>; + + __overlay__ { + status = "okay"; + pinctrl-0 = <&pwm11m1_pins>; + }; + }; +}; diff --git a/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-pwm15-m1.dtso b/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-pwm15-m1.dtso new file mode 100644 index 0000000000..7d3de70b05 --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-pwm15-m1.dtso @@ -0,0 +1,13 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&pwm15>; + + __overlay__ { + status = "okay"; + pinctrl-0 = <&pwm15m1_pins>; + }; + }; +}; diff --git a/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-pwm7.dtso b/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-pwm7.dtso new file mode 100644 index 0000000000..1fd0e15583 --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-pwm7.dtso @@ -0,0 +1,12 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&pwm7>; + + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-spi3-m0-cs0-spidev.dtso b/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-spi3-m0-cs0-spidev.dtso new file mode 100644 index 0000000000..cd23cd0782 --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-spi3-m0-cs0-spidev.dtso @@ -0,0 +1,19 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&spi3>; + + __overlay__ { + status = "okay"; + + spidev@0 { + compatible = "rockchip,spidev"; + status = "okay"; + reg = <0>; + spi-max-frequency = <50000000>; + }; + }; + }; +}; diff --git a/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-uart3-m0.dtso b/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-uart3-m0.dtso new file mode 100644 index 0000000000..c2e98cb61e --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-uart3-m0.dtso @@ -0,0 +1,13 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&uart3>; + + __overlay__ { + status = "okay"; + pinctrl-0 = <&uart3m0_xfer>; + }; + }; +}; diff --git a/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-uart7-m2.dtso b/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-uart7-m2.dtso new file mode 100644 index 0000000000..6a56f61d13 --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-uart7-m2.dtso @@ -0,0 +1,13 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&uart7>; + + __overlay__ { + status = "okay"; + pinctrl-0 = <&uart7m2_xfer>; + }; + }; +}; diff --git a/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-uart9-m2.dtso b/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-uart9-m2.dtso new file mode 100644 index 0000000000..4a7f4b7a1c --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.18/overlay/rockchip-rk3566-uart9-m2.dtso @@ -0,0 +1,13 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&uart9>; + + __overlay__ { + status = "okay"; + pinctrl-0 = <&uart9m2_xfer>; + }; + }; +}; diff --git a/patch/kernel/archive/rockchip64-6.19/overlay/Makefile b/patch/kernel/archive/rockchip64-6.19/overlay/Makefile index a05b4b98db..c3cb5ce34e 100644 --- a/patch/kernel/archive/rockchip64-6.19/overlay/Makefile +++ b/patch/kernel/archive/rockchip64-6.19/overlay/Makefile @@ -44,6 +44,16 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \ rockchip-rk3399-uart4.dtbo \ rockchip-rk3399-w1-gpio.dtbo \ rockchip-rk3566-sata2.dtbo \ + rockchip-rk3566-i2c2-m1.dtbo \ + rockchip-rk3566-i2c3-m0.dtbo \ + rockchip-rk3566-i2c4-m0.dtbo \ + rockchip-rk3566-pwm7.dtbo \ + rockchip-rk3566-pwm11-m1.dtbo \ + rockchip-rk3566-pwm15-m1.dtbo \ + rockchip-rk3566-spi3-m0-cs0-spidev.dtbo \ + rockchip-rk3566-uart3-m0.dtbo \ + rockchip-rk3566-uart7-m2.dtbo \ + rockchip-rk3566-uart9-m2.dtbo \ rockchip-rk3568-nanopi-r5c-leds.dtbo \ rockchip-rk3568-nanopi-r5s-leds.dtbo \ rockchip-rk3568-hk-i2c0.dtbo \ diff --git a/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-i2c2-m1.dtso b/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-i2c2-m1.dtso new file mode 100644 index 0000000000..c9e877b27c --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-i2c2-m1.dtso @@ -0,0 +1,14 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&i2c2>; + + __overlay__ { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2m1_xfer>; + }; + }; +}; diff --git a/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-i2c3-m0.dtso b/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-i2c3-m0.dtso new file mode 100644 index 0000000000..c9fb6b4e5c --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-i2c3-m0.dtso @@ -0,0 +1,14 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&i2c3>; + + __overlay__ { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c3m0_xfer>; + }; + }; +}; diff --git a/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-i2c4-m0.dtso b/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-i2c4-m0.dtso new file mode 100644 index 0000000000..db4d12aa78 --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-i2c4-m0.dtso @@ -0,0 +1,14 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&i2c4>; + + __overlay__ { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c4m0_xfer>; + }; + }; +}; diff --git a/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-pwm11-m1.dtso b/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-pwm11-m1.dtso new file mode 100644 index 0000000000..eec9557064 --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-pwm11-m1.dtso @@ -0,0 +1,13 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&pwm11>; + + __overlay__ { + status = "okay"; + pinctrl-0 = <&pwm11m1_pins>; + }; + }; +}; diff --git a/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-pwm15-m1.dtso b/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-pwm15-m1.dtso new file mode 100644 index 0000000000..7d3de70b05 --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-pwm15-m1.dtso @@ -0,0 +1,13 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&pwm15>; + + __overlay__ { + status = "okay"; + pinctrl-0 = <&pwm15m1_pins>; + }; + }; +}; diff --git a/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-pwm7.dtso b/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-pwm7.dtso new file mode 100644 index 0000000000..1fd0e15583 --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-pwm7.dtso @@ -0,0 +1,12 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&pwm7>; + + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-spi3-m0-cs0-spidev.dtso b/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-spi3-m0-cs0-spidev.dtso new file mode 100644 index 0000000000..cd23cd0782 --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-spi3-m0-cs0-spidev.dtso @@ -0,0 +1,19 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&spi3>; + + __overlay__ { + status = "okay"; + + spidev@0 { + compatible = "rockchip,spidev"; + status = "okay"; + reg = <0>; + spi-max-frequency = <50000000>; + }; + }; + }; +}; diff --git a/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-uart3-m0.dtso b/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-uart3-m0.dtso new file mode 100644 index 0000000000..c2e98cb61e --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-uart3-m0.dtso @@ -0,0 +1,13 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&uart3>; + + __overlay__ { + status = "okay"; + pinctrl-0 = <&uart3m0_xfer>; + }; + }; +}; diff --git a/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-uart7-m2.dtso b/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-uart7-m2.dtso new file mode 100644 index 0000000000..6a56f61d13 --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-uart7-m2.dtso @@ -0,0 +1,13 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&uart7>; + + __overlay__ { + status = "okay"; + pinctrl-0 = <&uart7m2_xfer>; + }; + }; +}; diff --git a/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-uart9-m2.dtso b/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-uart9-m2.dtso new file mode 100644 index 0000000000..4a7f4b7a1c --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.19/overlay/rockchip-rk3566-uart9-m2.dtso @@ -0,0 +1,13 @@ +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&uart9>; + + __overlay__ { + status = "okay"; + pinctrl-0 = <&uart9m2_xfer>; + }; + }; +};