From fe6969b057d36a91f06c96b0026cde0031e49e42 Mon Sep 17 00:00:00 2001 From: zador-blood-stained Date: Fri, 14 Jul 2017 12:06:54 +0300 Subject: [PATCH] Add proper u-boot config for Zero Plus 2 H3 Fixes #715 --- config/boards/orangepizeroplus2-h3.conf | 2 +- .../add-orangepi-zeroplus2_h3.patch | 218 ++++++++++++++++++ 2 files changed, 219 insertions(+), 1 deletion(-) create mode 100644 patch/u-boot/u-boot-sunxi/add-orangepi-zeroplus2_h3.patch diff --git a/config/boards/orangepizeroplus2-h3.conf b/config/boards/orangepizeroplus2-h3.conf index c8b681d1d4..20c9ffaf0f 100644 --- a/config/boards/orangepizeroplus2-h3.conf +++ b/config/boards/orangepizeroplus2-h3.conf @@ -1,7 +1,7 @@ # H3 quad core 512MB SoC Wi-Fi/BT BOARD_NAME="Orange Pi Zero Plus 2" LINUXFAMILY="sun8i" -BOOTCONFIG="orangepi_zero_plus2_defconfig" +BOOTCONFIG="orangepi_zero_plus2_h3_defconfig" # MODULES="#w1-sunxi #w1-gpio #w1-therm #sunxi-cir hci_uart rfcomm hidp dhd g_serial" MODULES_NEXT="brcmfmac g_serial" diff --git a/patch/u-boot/u-boot-sunxi/add-orangepi-zeroplus2_h3.patch b/patch/u-boot/u-boot-sunxi/add-orangepi-zeroplus2_h3.patch new file mode 100644 index 0000000000..0578648203 --- /dev/null +++ b/patch/u-boot/u-boot-sunxi/add-orangepi-zeroplus2_h3.patch @@ -0,0 +1,218 @@ +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index 9cc5c1e0aa..a3ef6854c2 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -318,6 +318,7 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \ + sun8i-h3-orangepi-pc-plus.dtb \ + sun8i-h3-orangepi-plus.dtb \ + sun8i-h3-orangepi-plus2e.dtb \ ++ sun8i-h3-orangepi-zeroplus.dtb \ + sun8i-h3-nanopi-m1.dtb \ + sun8i-h3-nanopi-m1-plus.dtb \ + sun8i-h3-nanopi-neo.dtb \ +diff --git a/arch/arm/dts/sun8i-h3-orangepi-zeroplus.dts b/arch/arm/dts/sun8i-h3-orangepi-zeroplus.dts +new file mode 100644 +index 0000000000..b03e3a51a2 +--- /dev/null ++++ b/arch/arm/dts/sun8i-h3-orangepi-zeroplus.dts +@@ -0,0 +1,175 @@ ++/* ++ * Copyright (C) 2016 Icenowy Zheng ++ * ++ * Based on sun8i-h3-orangepi-one.dts, which is: ++ * Copyright (C) 2016 Hans de Goede ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++#include "sun8i-h3.dtsi" ++#include "sunxi-common-regulators.dtsi" ++ ++#include ++#include ++#include ++ ++/ { ++ model = "Xunlong Orange Pi Zero Plus"; ++ compatible = "xunlong,orangepi-zeroplus", "allwinner,sun8i-h3"; ++ ++ aliases { ++ serial0 = &uart0; ++ /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ ++ ethernet1 = &brcmf; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ pwr_led { ++ label = "orangepi:green:pwr"; ++ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; ++ default-state = "on"; ++ }; ++ ++ status_led { ++ label = "orangepi:red:status"; ++ gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; ++ }; ++ }; ++ ++ wifi_pwrseq: wifi_pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ pinctrl-names = "default"; ++ reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; ++ post-power-on-delay-ms = <50>; ++ }; ++}; ++ ++&ehci1 { ++ status = "okay"; ++}; ++ ++&ehci2 { ++ status = "okay"; ++}; ++ ++&ehci3 { ++ status = "okay"; ++}; ++ ++&emac { ++ phy = <&phy1>; ++ phy-mode = "mii"; ++ allwinner,use-internal-phy; ++ allwinner,leds-active-low; ++ status = "okay"; ++ phy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++}; ++ ++&mmc0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins_a>; ++ vmmc-supply = <®_vcc3v3>; ++ bus-width = <4>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ ++ cd-inverted; ++ status = "okay"; ++}; ++ ++&mmc1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc1_pins_a>; ++ vmmc-supply = <®_vcc3v3>; ++ vqmmc-supply = <®_vcc3v3>; ++ mmc-pwrseq = <&wifi_pwrseq>; ++ bus-width = <4>; ++ non-removable; ++ status = "okay"; ++ ++ brcmf: bcrmf@1 { ++ reg = <1>; ++ compatible = "brcm,bcm4329-fmac"; ++ interrupt-parent = <&r_pio>; ++ interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 / EINT7 */ ++ interrupt-names = "host-wake"; ++ }; ++}; ++ ++&mmc2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc2_8bit_pins>; ++ vmmc-supply = <®_vcc3v3>; ++ bus-width = <8>; ++ non-removable; ++ cap-mmc-hw-reset; ++ status = "okay"; ++}; ++ ++&ohci1 { ++ status = "okay"; ++}; ++ ++&ohci2 { ++ status = "okay"; ++}; ++ ++&ohci3 { ++ status = "okay"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins_a>; ++ status = "okay"; ++}; ++ ++&usbphy { ++ /* USB VBUS is always on */ ++ status = "okay"; ++}; ++ +diff --git a/configs/orangepi_zero_plus2_h3_defconfig b/configs/orangepi_zero_plus2_h3_defconfig +new file mode 100644 +index 0000000000..9257b7c1ed +--- /dev/null ++++ b/configs/orangepi_zero_plus2_h3_defconfig +@@ -0,0 +1,19 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_SUNXI=y ++CONFIG_MACH_SUN8I_H3=y ++CONFIG_DRAM_CLK=408 ++CONFIG_DRAM_ZQ=3881979 ++CONFIG_DRAM_ODT_EN=y ++CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-zeroplus" ++CONFIG_MMC_SUNXI_SLOT_EXTRA=2 ++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ++CONFIG_SPL=y ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_SPL_SPI_SUNXI=y ++# CONFIG_CMD_IMLS is not set ++# CONFIG_CMD_FLASH is not set ++# CONFIG_CMD_FPGA is not set ++# CONFIG_SPL_DOS_PARTITION is not set ++# CONFIG_SPL_ISO_PARTITION is not set ++# CONFIG_SPL_EFI_PARTITION is not set ++CONFIG_USB_EHCI_HCD=y