From f7e9d60ff2514265a8ace812339480fd424d4cfb Mon Sep 17 00:00:00 2001
From: Martin Ayotte <martinayotte@yahoo.ca>
Date: Fri, 9 Nov 2018 14:58:03 -0500
Subject: [PATCH] fixes for a64-olinuxino eMMC

---
 .../add-a64-olinuxino-emmc-support.patch      | 21 +++++
 .../add-a64-olinuxino-spl-spi.patch           | 13 +++
 ...-olinuxino-usb-boot-support.patch.disabled | 86 -------------------
 3 files changed, 34 insertions(+), 86 deletions(-)
 create mode 100644 patch/u-boot/u-boot-sun50iw2/add-a64-olinuxino-emmc-support.patch
 create mode 100644 patch/u-boot/u-boot-sun50iw2/add-a64-olinuxino-spl-spi.patch
 delete mode 100644 patch/u-boot/u-boot-sun50iw2/add-a64-olinuxino-usb-boot-support.patch.disabled

diff --git a/patch/u-boot/u-boot-sun50iw2/add-a64-olinuxino-emmc-support.patch b/patch/u-boot/u-boot-sun50iw2/add-a64-olinuxino-emmc-support.patch
new file mode 100644
index 0000000000..d2589b5e07
--- /dev/null
+++ b/patch/u-boot/u-boot-sun50iw2/add-a64-olinuxino-emmc-support.patch
@@ -0,0 +1,21 @@
+diff --git a/arch/arm/dts/sun50i-a64-olinuxino.dts b/arch/arm/dts/sun50i-a64-olinuxino.dts
+index f7a4bcc..9d77afb 100644
+--- a/arch/arm/dts/sun50i-a64-olinuxino.dts
++++ b/arch/arm/dts/sun50i-a64-olinuxino.dts
+@@ -155,6 +155,16 @@
+ 	};
+ };
+ 
++&mmc2 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&mmc2_pins>;
++	vmmc-supply = <&reg_dcdc1>;
++	bus-width = <8>;
++	non-removable;
++	cap-mmc-hw-reset;
++	status = "okay";
++};
++
+ &ohci0 {
+ 	status = "okay";
+ };
diff --git a/patch/u-boot/u-boot-sun50iw2/add-a64-olinuxino-spl-spi.patch b/patch/u-boot/u-boot-sun50iw2/add-a64-olinuxino-spl-spi.patch
new file mode 100644
index 0000000000..c6b949cc65
--- /dev/null
+++ b/patch/u-boot/u-boot-sun50iw2/add-a64-olinuxino-spl-spi.patch
@@ -0,0 +1,13 @@
+diff --git a/configs/a64-olinuxino_defconfig b/configs/a64-olinuxino_defconfig
+index 01fcb86..528fe16 100644
+--- a/configs/a64-olinuxino_defconfig
++++ b/configs/a64-olinuxino_defconfig
+@@ -1,6 +1,8 @@
+ CONFIG_ARM=y
+ CONFIG_ARCH_SUNXI=y
+ CONFIG_SPL=y
++CONFIG_SPL_SPI_FLASH_SUPPORT=y
++CONFIG_SPL_SPI_SUNXI=y
+ CONFIG_MACH_SUN50I=y
+ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
+ CONFIG_MMC_SUNXI_SLOT_EXTRA=2
diff --git a/patch/u-boot/u-boot-sun50iw2/add-a64-olinuxino-usb-boot-support.patch.disabled b/patch/u-boot/u-boot-sun50iw2/add-a64-olinuxino-usb-boot-support.patch.disabled
deleted file mode 100644
index 36e854abd7..0000000000
--- a/patch/u-boot/u-boot-sun50iw2/add-a64-olinuxino-usb-boot-support.patch.disabled
+++ /dev/null
@@ -1,86 +0,0 @@
-diff --git a/arch/arm/dts/sun50i-a64-olinuxino.dts b/arch/arm/dts/sun50i-a64-olinuxino.dts
-index 7bd4730..b10616e 100644
---- a/arch/arm/dts/sun50i-a64-olinuxino.dts
-+++ b/arch/arm/dts/sun50i-a64-olinuxino.dts
-@@ -58,6 +58,17 @@
- 		stdout-path = "serial0:115200n8";
- 	};
- 
-+	reg_usb1_vbus: usb1-vbus {
-+		compatible = "regulator-fixed";
-+		regulator-name = "usb1-vbus";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		regulator-boot-on;
-+		enable-active-high;
-+		gpio = <&pio 6 9 GPIO_ACTIVE_HIGH>; /* PG9 */
-+		status = "okay";
-+	};
-+
- 	reg_vcc3v3: vcc3v3 {
- 		compatible = "regulator-fixed";
- 		regulator-name = "vcc3v3";
-@@ -66,6 +66,14 @@
- 	};
- };
- 
-+&ehci0 {
-+	status = "okay";
-+};
-+
-+&ehci1 {
-+	status = "okay";
-+};
-+
- &mmc0 {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&mmc0_pins>;
-@@ -77,8 +77,21 @@
- 	status = "okay";
- };
- 
-+&ohci0 {
-+	status = "okay";
-+};
-+
-+&ohci1 {
-+	status = "okay";
-+};
-+
- &uart0 {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&uart0_pins_a>;
- 	status = "okay";
- };
-+
-+&usbphy {
-+	status = "okay";
-+	usb1_vbus-supply = <&reg_usb1_vbus>;
-+};
-diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
-index 0ddbdbe460..42ffb6cbcb 100644
---- a/drivers/usb/host/ohci-sunxi.c
-+++ b/drivers/usb/host/ohci-sunxi.c
-@@ -128,10 +128,18 @@ static int ohci_usb_remove(struct udevice *dev)
- 	if (ret)
- 		return ret;
- 
--	if (priv->cfg->has_reset)
--		clrbits_le32(priv->reset0_cfg, priv->ahb_gate_mask);
--	clrbits_le32(&priv->ccm->usb_clk_cfg, priv->usb_gate_mask);
--	clrbits_le32(&priv->ccm->ahb_gate0, priv->ahb_gate_mask);
-+	/*
-+	* For those SoCs that share the clock and reset gates with the EHCI
-+	* controller, we should not turn them off here, to prevent the
-+	* other one hanging (when the EHCI driver tries to shut itself down).
-+	*/
-+	if (!priv->cfg->extra_ahb_gate_mask) {
-+		if (priv->cfg->has_reset)
-+			clrbits_le32(priv->reset0_cfg, priv->ahb_gate_mask);
-+		clrbits_le32(&priv->ccm->ahb_gate0, priv->ahb_gate_mask);
-+	}
-+	if (!priv->cfg->extra_usb_gate_mask)
-+		clrbits_le32(&priv->ccm->usb_clk_cfg, priv->usb_gate_mask);
- 
- 	return 0;
- }