diff --git a/patch/hb-i2c-spi.patch b/patch/hb-i2c-spi.patch index 24e9435a79..ac0c61a576 100644 --- a/patch/hb-i2c-spi.patch +++ b/patch/hb-i2c-spi.patch @@ -1,104 +1,65 @@ --- linux-linaro-stable-mx6/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi 2014-09-16 12:27:09.500971944 -0500 +++ linux-imx6-3.14/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi 2014-09-16 10:11:41.773085665 -0500 -@@ -128,6 +128,31 @@ +@@ -128,6 +128,30 @@ }; }; +&i2c3 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hummingboard_i2c3>; -+ status = "okay"; ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hummingboard_i2c3>; ++ status = "okay"; +}; + +&ecspi2 { -+ fsl,spi-num-chipselects = <2>; -+ cs-gpios = <&gpio2 26 1>, <&gpio2 27 1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hummingboard_spi>; -+ status = "okay"; -+ spidev@0x00 { -+ compatible = "spidev"; -+ spi-max-frequency = <5000000>; -+ reg = <0>; -+ }; -+ spidev@0x01 { -+ compatible = "spidev"; -+ spi-max-frequency = <5000000>; -+ reg = <1>; -+ }; ++ fsl,spi-num-chipselects = <2>; ++ cs-gpios = <&gpio2 26 1>, <&gpio2 27 1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hummingboard_spi>; ++ status = "okay"; ++ spidev@0x00 { ++ compatible = "spidev"; ++ spi-max-frequency = <5000000>; ++ reg = <0>; ++ }; ++ spidev@0x01 { ++ compatible = "spidev"; ++ spi-max-frequency = <5000000>; ++ reg = <1>; ++ }; +}; -+ &audmux { status = "okay"; }; -@@ -153,8 +178,8 @@ - sgtl5000: sgtl5000@0a { - clocks = <&clks 201>; - compatible = "fsl,sgtl5000"; -- pinctrl-0 = <&pinctrl_hummingboard_sgtl5000>; - pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hummingboard_sgtl5000>; - reg = <0x0a>; - VDDA-supply = <®_3p3v>; - VDDIO-supply = <®_3p3v>; -@@ -195,6 +220,17 @@ +@@ -195,6 +219,17 @@ >; }; -+ pinctrl_hummingboard_spi: hummingboard_spi { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1 -+ MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1 -+ MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1 -+ /* MX6QDL_PAD_EIM_RW__ECSPI2_SS0 0x100b1 */ -+ MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1 -+ MX6QDL_PAD_EIM_LBA__ECSPI2_SS1 0x100b1 -+ >; -+ }; -+ ++ pinctrl_hummingboard_spi: hummingboard_spi { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1 ++ MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1 ++ MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1 ++ /* MX6QDL_PAD_EIM_RW__ECSPI2_SS0 0x100b1 */ ++ MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1 ++ MX6QDL_PAD_EIM_LBA__ECSPI2_SS1 0x100b1 ++ >; ++ }; ++ pinctrl_hummingboard_gpio3_5: hummingboard-gpio3_5 { fsl,pins = < MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x80000000 -@@ -221,6 +257,13 @@ +@@ -221,6 +256,13 @@ >; }; -+ pinctrl_hummingboard_i2c3: hummingboard-i2c3 { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ ++ pinctrl_hummingboard_i2c3: hummingboard-i2c3 { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 ++ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 ++ >; ++ }; ++ pinctrl_hummingboard_sgtl5000: hummingboard-sgtl5000 { fsl,pins = < - MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0 /*brk*/ -@@ -267,12 +310,6 @@ - MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059 - >; - }; -- -- pinctrl_hummingboard_pcie_reset: hummingboard-pcie-reset { -- fsl,pins = < -- MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x80000000 -- >; -- }; - }; - }; - -@@ -328,14 +365,3 @@ - fsl,cpu_pdnscr_iso2sw = <0x1>; - fsl,cpu_pdnscr_iso = <0x1>; - }; -- --&pcie { -- pinctrl-names = "default"; -- pinctrl-0 = < -- &pinctrl_hummingboard_pcie_reset -- >; -- reset-gpio = <&gpio3 4 0>; -- status = "okay"; -- no-msi; --}; -- + MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0 /*brk*/