diff --git a/patch/u-boot/u-boot-sun50i-dev/board_pine64so/atf-set-lpddr3-dram-voltage.patch b/patch/u-boot/u-boot-sun50i-dev/board_pine64so/atf-set-lpddr3-dram-voltage.patch
index b1ce18649f..9b5b814e2e 100644
--- a/patch/u-boot/u-boot-sun50i-dev/board_pine64so/atf-set-lpddr3-dram-voltage.patch
+++ b/patch/u-boot/u-boot-sun50i-dev/board_pine64so/atf-set-lpddr3-dram-voltage.patch
@@ -1,13 +1,21 @@
 diff --git a/arm-trusted-firmware/plat/sun50iw1p1/sunxi_power.c b/arm-trusted-firmware/plat/sun50iw1p1/sunxi_power.c
-index 11badcd..f44a866 100644
+index 0c2487e..30708f4 100644
 --- a/arm-trusted-firmware/plat/sun50iw1p1/sunxi_power.c
 +++ b/arm-trusted-firmware/plat/sun50iw1p1/sunxi_power.c
-@@ -251,7 +251,7 @@ static int pmic_setup(void)
- 		}
- 	}
- 
--	sunxi_pmic_write(0x24, 0xb3);	/* DCDC5 = DDR RAM voltage = 1.5V */
+@@ -258,12 +258,10 @@ static int pmic_setup(void)
+ 	 * changes. This should be further confined once we are able to
+ 	 * reliably detect a Pine64 board.
+ 	 */
+-	ret = sunxi_pmic_read(0x24);	/* read DCDC5 register */
+-	if ((ret & 0x7f) == 0x26) {	/* check for 1.24V value */
+-		NOTICE("PMIC: fixing DRAM voltage from 1.24V to 1.36V\n");
+-		sunxi_pmic_write(0x24, 0x2c);
+-	}
+- 
++
++	NOTICE("PMIC: setting DRAM voltage to 1.24V\n");
 +	sunxi_pmic_write(0x24, 0x25);	/* DCDC5 = LPDDR RAM voltage = 1.24V */
++
+ 	sunxi_pmic_write(0x15, 0x1a);	/* DLDO1 = VCC3V3_HDMI voltage = 3.3V */
  
  	return 0;
- }