diff --git a/patch/kernel/rockchip64-current/rk3399-add-overclock-overlay.patch b/patch/kernel/rockchip64-current/rk3399-add-overclock-overlay.patch
new file mode 100644
index 0000000000..04d50620c5
--- /dev/null
+++ b/patch/kernel/rockchip64-current/rk3399-add-overclock-overlay.patch
@@ -0,0 +1,74 @@
+From a9a60c0bccd0c2b9d35594934eae5e25b4a00b53 Mon Sep 17 00:00:00 2001
+From: tonymac32 <tonymckahan@gmail.com>
+Date: Wed, 16 Dec 2020 01:32:03 -0500
+Subject: [PATCH] rk3399-add-2ghz-opp-overlay
+
+Signed-off-by: tonymac32 <tonymckahan@gmail.com>
+---
+ arch/arm64/boot/dts/rockchip/overlay/Makefile |  1 +
+ .../rockchip/overlay/README.rockchip-overlays |  5 ++++
+ .../overlay/rockchip-rk3399-opp-2ghz.dts      | 24 +++++++++++++++++++
+ 3 files changed, 30 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3399-opp-2ghz.dts
+
+diff --git a/arch/arm64/boot/dts/rockchip/overlay/Makefile b/arch/arm64/boot/dts/rockchip/overlay/Makefile
+index 0fce5206d..9bc4942bd 100644
+--- a/arch/arm64/boot/dts/rockchip/overlay/Makefile
++++ b/arch/arm64/boot/dts/rockchip/overlay/Makefile
+@@ -3,6 +3,7 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
+ 	rockchip-i2c7.dtbo \
+ 	rockchip-i2c8.dtbo \
+ 	rockchip-pcie-gen2.dtbo \
++	rockchip-rk3399-opp-2ghz.dtbo \
+ 	rockchip-spi-jedec-nor.dtbo \
+ 	rockchip-spi-spidev.dtbo \
+ 	rockchip-uart4.dtbo \
+diff --git a/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays b/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays
+index 48ca48fc3..ce0b84e00 100644
+--- a/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays
++++ b/arch/arm64/boot/dts/rockchip/overlay/README.rockchip-overlays
+@@ -29,6 +29,11 @@ I2C8 pins (SCL, SDA): GPIO1-C5, GPIO1-C4
+ Enables PCIe Gen2 link speed on RK3399.
+ WARNING! Not officially supported by Rockchip!!!
+ 
++### rk3399-opp-2ghz
++
++Adds the 2GHz big and 1.5 GHz LITTLE opps for overclocking
++WARNING! Not officially supported by Rockchip!!!
++
+ ### spi-jedec-nor
+ 
+ Activates MTD support for JEDEC compatible SPI NOR flash chips on SPI bus
+diff --git a/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3399-opp-2ghz.dts b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3399-opp-2ghz.dts
+new file mode 100644
+index 000000000..1d7584b60
+--- /dev/null
++++ b/arch/arm64/boot/dts/rockchip/overlay/rockchip-rk3399-opp-2ghz.dts
+@@ -0,0 +1,24 @@
++/dts-v1/;
++
++/ {
++    compatible = "rockchip,rk3399";
++    fragment@0 {
++        target-path = "/opp-table0";
++        __overlay__ {
++		opp06 {
++			opp-hz = /bits/ 64 <1512000000>;
++			opp-microvolt = <1200000>;
++		};
++        };
++    };
++
++    fragment@1 {
++        target-path = "/opp-table1";
++        __overlay__ {
++		opp08 {
++			opp-hz = /bits/ 64 <2016000000>;
++			opp-microvolt = <1300000>;
++		};
++        };
++    };
++};
+-- 
+Created with Armbian build tools https://github.com/armbian/build
+
diff --git a/patch/kernel/rockchip64-current/rk3399-enable_1.5_2.0_ghz_cpufreq_opp.patch b/patch/kernel/rockchip64-current/rk3399-enable_1.5_2.0_ghz_cpufreq_opp.patch
deleted file mode 100644
index ee91e34373..0000000000
--- a/patch/kernel/rockchip64-current/rk3399-enable_1.5_2.0_ghz_cpufreq_opp.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-diff --git a/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi
-index d6f1095..30f353c 100644
---- a/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi
-+++ b/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi
-@@ -33,6 +33,10 @@
- 			opp-hz = /bits/ 64 <1416000000>;
- 			opp-microvolt = <1125000>;
- 		};
-+		opp06 {
-+			opp-hz = /bits/ 64 <1512000000>;
-+			opp-microvolt = <1200000>;
-+		};
- 	};
- 
- 	cluster1_opp: opp-table1 {
-@@ -72,6 +76,10 @@
- 			opp-hz = /bits/ 64 <1800000000>;
- 			opp-microvolt = <1200000>;
- 		};
-+		opp08 {
-+			opp-hz = /bits/ 64 <2016000000>;
-+			opp-microvolt = <1300000>;
-+		};
- 	};
- 
- 	gpu_opp_table: opp-table2 {