diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-analog-codec.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-analog-codec.dtso new file mode 100644 index 0000000000..9254e22e0e --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-analog-codec.dtso @@ -0,0 +1,13 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun4i-a10"; + + fragment@0 { + target = <&codec>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-can.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-can.dtso new file mode 100644 index 0000000000..1a9511d195 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-can.dtso @@ -0,0 +1,15 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun4i-a10"; + + fragment@0 { + target = <&can0>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&can0_ph_pins>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-i2c1.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-i2c1.dtso new file mode 100644 index 0000000000..4c104bf4a5 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-i2c1.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun4i-a10"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + i2c1 = "/soc@1c00000/i2c@1c2b000"; + }; + }; + + fragment@1 { + target = <&i2c1>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-i2c2.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-i2c2.dtso new file mode 100644 index 0000000000..1c2c3e9aca --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-i2c2.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun4i-a10"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + i2c2 = "/soc@1c00000/i2c@1c2b400"; + }; + }; + + fragment@1 { + target = <&i2c2>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-nand.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-nand.dtso new file mode 100644 index 0000000000..f0d4c2f348 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-nand.dtso @@ -0,0 +1,103 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun4i-a10"; + + fragment@0 { + target = <&pio>; + __overlay__ { + nand_pins_a: nand_pins@0 { + pins = "PC0", "PC1", "PC2", + "PC5", "PC8", "PC9", "PC10", + "PC11", "PC12", "PC13", "PC14", + "PC15", "PC16"; + function = "nand0"; + }; + + nand_cs0_pins_a: nand_cs@0 { + pins = "PC4"; + function = "nand0"; + }; + + nand_cs1_pins_a: nand_cs@1 { + pins = "PC3"; + function = "nand0"; + }; + + nand_cs2_pins_a: nand_cs@2 { + pins = "PC17"; + function = "nand0"; + }; + + nand_cs3_pins_a: nand_cs@3 { + pins = "PC18"; + function = "nand0"; + }; + + nand_rb0_pins_a: nand_rb@0 { + pins = "PC6"; + function = "nand0"; + }; + + nand_rb1_pins_a: nand_rb@1 { + pins = "PC7"; + function = "nand0"; + }; + }; + }; + + fragment@1 { + target = <&nfc>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&nand_pins_a>, <&nand_cs0_pins_a>, <&nand_rb0_pins_a>; + status = "okay"; + + nand@0 { + reg = <0>; + allwinner,rb = <0>; + nand-ecc-mode = "hw"; + nand-on-flash-bbt; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <2>; + #size-cells = <2>; + + partition@0 { + label = "SPL"; + reg = <0x0 0x0 0x0 0x400000>; + }; + + partition@400000 { + label = "SPL.backup"; + reg = <0x0 0x400000 0x0 0x400000>; + }; + + partition@800000 { + label = "U-Boot"; + reg = <0x0 0x800000 0x0 0x400000>; + }; + + partition@c00000 { + label = "U-Boot.backup"; + reg = <0x0 0xc00000 0x0 0x400000>; + }; + + partition@1000000 { + label = "env"; + reg = <0x0 0x1000000 0x0 0x400000>; + }; + + partition@1400000 { + label = "rootfs"; + reg = <0x0 0xa00000 0x01 0xff000000>; + }; + }; + }; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-pps-gpio.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-pps-gpio.dtso new file mode 100644 index 0000000000..6031fc53e5 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-pps-gpio.dtso @@ -0,0 +1,29 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun4i-a10"; + + fragment@0 { + target = <&pio>; + __overlay__ { + pps_pins: pps_pins { + pins = "PI15"; + function = "gpio_in"; + }; + }; + }; + + fragment@1 { + target-path = "/"; + __overlay__ { + pps@0 { + compatible = "pps-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pps_pins>; + gpios = <&pio 8 15 0>; /* PI15 */ + status = "okay"; + }; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-pwm.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-pwm.dtso new file mode 100644 index 0000000000..ba885004fe --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-pwm.dtso @@ -0,0 +1,15 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun4i-a10"; + + fragment@0 { + target = <&pwm>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pin>, <&pwm1_pin>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-spdif-out.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-spdif-out.dtso new file mode 100644 index 0000000000..234dfc880f --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-spdif-out.dtso @@ -0,0 +1,38 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun4i-a10"; + + fragment@0 { + target = <&spdif>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx_pin>; + status = "okay"; + }; + }; + + fragment@1 { + target-path = "/"; + __overlay__ { + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "On-board SPDIF"; + + simple-audio-card,cpu { + sound-dai = <&spdif>; + }; + + simple-audio-card,codec { + sound-dai = <&spdif_out>; + }; + }; + + spdif_out: spdif-out { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dit"; + }; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-spi-jedec-nor.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-spi-jedec-nor.dtso new file mode 100644 index 0000000000..ee4ff6f453 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-spi-jedec-nor.dtso @@ -0,0 +1,57 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun4i-a10"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi0 = "/soc@1c00000/spi@1c05000"; + spi1 = "/soc@1c00000/spi@1c06000"; + spi2 = "/soc@1c00000/spi@1c17000"; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spiflash@0 { + compatible = "jedec,spi-nor"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + fragment@2 { + target = <&spi1>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spiflash@0 { + compatible = "jedec,spi-nor"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + fragment@3 { + target = <&spi2>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spiflash@0 { + compatible = "jedec,spi-nor"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-spi-spidev.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-spi-spidev.dtso new file mode 100644 index 0000000000..eac4f1e2d2 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-spi-spidev.dtso @@ -0,0 +1,57 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun4i-a10"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi0 = "/soc@1c00000/spi@1c05000"; + spi1 = "/soc@1c00000/spi@1c06000"; + spi2 = "/soc@1c00000/spi@1c17000"; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spidev@0 { + compatible = "armbian,spi-dev"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + fragment@2 { + target = <&spi1>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spidev@0 { + compatible = "armbian,spi-dev"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + fragment@3 { + target = <&spi2>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spidev@0 { + compatible = "armbian,spi-dev"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-spi0.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-spi0.dtso new file mode 100644 index 0000000000..cad50d8a29 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-spi0.dtso @@ -0,0 +1,23 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi0 = "/soc@1c00000/spi@1c05000"; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + status = "okay"; + pinctrl-names = "default", "default"; + pinctrl-0 = <&spi0_pi_pins>; + pinctrl-1 = <&spi0_cs0_pi_pin>; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-spi1.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-spi1.dtso new file mode 100644 index 0000000000..8c606d6b06 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-spi1.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi1 = "/soc@1c00000/spi@1c06000"; + }; + }; + + fragment@1 { + target = <&spi1>; + __overlay__ { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins>, <&spi1_cs0_pin>; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-spi2.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-spi2.dtso new file mode 100644 index 0000000000..145f285588 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-spi2.dtso @@ -0,0 +1,23 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi2 = "/soc@1c00000/spi@1c17000"; + }; + }; + + fragment@1 { + target = <&spi2>; + __overlay__ { + status = "okay"; + pinctrl-names = "default", "default"; + pinctrl-0 = <&spi2_pins_a>; + pinctrl-1 = <&spi2_cs0_pins_a>; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-uart2.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-uart2.dtso new file mode 100644 index 0000000000..89bb44d5ae --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-uart2.dtso @@ -0,0 +1,37 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun4i-a10"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial2 = "/soc@1c00000/serial@1c28800"; + }; + }; + + fragment@1 { + target = <&pio>; + __overlay__ { + uart2_pins_a: uart2@0 { + pins = "PI16", "PI17", "PI18", "PI19"; + function = "uart2"; + }; + + uart2_pins_a_2: uart2@1 { + pins = "PI18", "PI19"; + function = "uart2"; + }; + }; + }; + + fragment@2 { + target = <&uart2>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins_a_2>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-uart3.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-uart3.dtso new file mode 100644 index 0000000000..f599d92082 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-uart3.dtso @@ -0,0 +1,47 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun4i-a10"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial3 = "/soc@1c00000/serial@1c28c00"; + }; + }; + + fragment@1 { + target = <&pio>; + __overlay__ { + uart3_pins_a: uart3@0 { + pins = "PG6", "PG7"; + function = "uart3"; + }; + + uart3_pins_a_rts_cts: uart3@1 { + pins = "PG8", "PG9"; + function = "uart3"; + }; + + uart3_pins_b: uart3@2 { + pins = "PH0", "PH1"; + function = "uart3"; + }; + + uart3_pins_b_rts_cts: uart3@3 { + pins = "PH2", "PH3"; + function = "uart3"; + }; + }; + }; + + fragment@2 { + target = <&uart3>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins_a>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-uart4.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-uart4.dtso new file mode 100644 index 0000000000..b5e562a647 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-uart4.dtso @@ -0,0 +1,37 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun4i-a10"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial4 = "/soc@1c00000/serial@1c29000"; + }; + }; + + fragment@1 { + target = <&pio>; + __overlay__ { + uart4_pins_a: uart4@0 { + pins = "PG10", "PG11"; + function = "uart4"; + }; + + uart4_pins_b: uart4@1 { + pins = "PH4", "PH5"; + function = "uart4"; + }; + }; + }; + + fragment@2 { + target = <&uart4>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pins_a>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-uart5.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-uart5.dtso new file mode 100644 index 0000000000..12c3f9699b --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-uart5.dtso @@ -0,0 +1,32 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun4i-a10"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial5 = "/soc@1c00000/serial@1c29400"; + }; + }; + + fragment@1 { + target = <&pio>; + __overlay__ { + uart5_pins_a: uart5@0 { + pins = "PH6", "PH7"; + function = "uart5"; + }; + }; + }; + + fragment@2 { + target = <&uart5>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart5_pins_a>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-uart6.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-uart6.dtso new file mode 100644 index 0000000000..6be41d5055 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-uart6.dtso @@ -0,0 +1,32 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun4i-a10"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial6 = "/soc@1c00000/serial@1c29800"; + }; + }; + + fragment@1 { + target = <&pio>; + __overlay__ { + uart6_pins_a: uart6@0 { + pins = "PI12", "PI13"; + function = "uart6"; + }; + }; + }; + + fragment@2 { + target = <&uart6>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart6_pins_a>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-uart7.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-uart7.dtso new file mode 100644 index 0000000000..967f6afbe7 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-uart7.dtso @@ -0,0 +1,32 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun4i-a10"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial7 = "/soc@1c00000/serial@1c29c00"; + }; + }; + + fragment@1 { + target = <&pio>; + __overlay__ { + uart7_pins_a: uart7@0 { + pins = "PI20", "PI21"; + function = "uart7"; + }; + }; + }; + + fragment@2 { + target = <&uart7>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart7_pins_a>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-w1-gpio.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-w1-gpio.dtso new file mode 100644 index 0000000000..41da08c60a --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun4i-a10-w1-gpio.dtso @@ -0,0 +1,29 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun4i-a10"; + + fragment@0 { + target = <&pio>; + __overlay__ { + w1_pins: w1_pins { + pins = "PI15"; + function = "gpio_in"; + }; + }; + }; + + fragment@1 { + target-path = "/"; + __overlay__ { + onewire@0 { + compatible = "w1-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&w1_pins>; + gpios = <&pio 8 15 0>; /* PI15 */ + status = "okay"; + }; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-analog-codec.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-analog-codec.dtso new file mode 100644 index 0000000000..60e2717fc5 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-analog-codec.dtso @@ -0,0 +1,13 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun4i-a13"; + + fragment@0 { + target = <&codec>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-i2c1.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-i2c1.dtso new file mode 100644 index 0000000000..444c32ca01 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-i2c1.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun5i-a13"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + i2c1 = "/soc@1c00000/i2c@1c2b000"; + }; + }; + + fragment@1 { + target = <&i2c1>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-i2c2.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-i2c2.dtso new file mode 100644 index 0000000000..7a30681ca2 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-i2c2.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun5i-a13"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + i2c2 = "/soc@1c00000/i2c@1c2b400"; + }; + }; + + fragment@1 { + target = <&i2c2>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-nand.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-nand.dtso new file mode 100644 index 0000000000..0c5fc89a10 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-nand.dtso @@ -0,0 +1,60 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun5i-a13"; + + fragment@0 { + target = <&nfc>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&nand_pins>, <&nand_cs0_pin>, <&nand_rb0_pin>; + status = "okay"; + + nand@0 { + reg = <0>; + allwinner,rb = <0>; + nand-ecc-mode = "hw"; + nand-on-flash-bbt; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <2>; + #size-cells = <2>; + + partition@0 { + label = "SPL"; + reg = <0x0 0x0 0x0 0x400000>; + }; + + partition@400000 { + label = "SPL.backup"; + reg = <0x0 0x400000 0x0 0x400000>; + }; + + partition@800000 { + label = "U-Boot"; + reg = <0x0 0x800000 0x0 0x400000>; + }; + + partition@c00000 { + label = "U-Boot.backup"; + reg = <0x0 0xc00000 0x0 0x400000>; + }; + + partition@1000000 { + label = "env"; + reg = <0x0 0x1000000 0x0 0x400000>; + }; + + partition@1400000 { + label = "rootfs"; + reg = <0x0 0xa00000 0x01 0xff000000>; + }; + }; + }; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-pwm.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-pwm.dtso new file mode 100644 index 0000000000..54f5d5123e --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-pwm.dtso @@ -0,0 +1,15 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun5i-a13"; + + fragment@0 { + target = <&pwm>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pin>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-spi-jedec-nor.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-spi-jedec-nor.dtso new file mode 100644 index 0000000000..8cebb0b988 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-spi-jedec-nor.dtso @@ -0,0 +1,57 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun5i-a13"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi0 = "/soc/spi@1c05000"; + spi1 = "/soc/spi@1c06000"; + spi2 = "/soc/spi@1c17000"; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spiflash@0 { + compatible = "jedec,spi-nor"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + fragment@2 { + target = <&spi1>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spiflash@0 { + compatible = "jedec,spi-nor"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + fragment@3 { + target = <&spi2>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spiflash@0 { + compatible = "jedec,spi-nor"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-spi-spidev.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-spi-spidev.dtso new file mode 100644 index 0000000000..ad0685f8af --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-spi-spidev.dtso @@ -0,0 +1,57 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun5i-a10"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi0 = "/soc/spi@1c05000"; + spi1 = "/soc/spi@1c06000"; + spi2 = "/soc/spi@1c17000"; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spidev@0 { + compatible = "armbian,spi-dev"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + fragment@2 { + target = <&spi1>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spidev@0 { + compatible = "armbian,spi-dev"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + fragment@3 { + target = <&spi2>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spidev@0 { + compatible = "armbian,spi-dev"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-spi0.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-spi0.dtso new file mode 100644 index 0000000000..b23a754c00 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-spi0.dtso @@ -0,0 +1,38 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun5i-a13"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi0 = "/soc/spi@1c05000"; + }; + }; + + fragment@1 { + target = <&pio>; + __overlay__ { + spi0_pins_a: spi0@0 { + pins = "PC0", "PC1", "PC2"; + function = "spi0"; + }; + + spi0_cs0_pins_a: spi0-cs0@0 { + pins = "PC3"; + function = "spi0"; + }; + }; + }; + + fragment@2 { + target = <&spi0>; + __overlay__ { + status = "okay"; + pinctrl-names = "default", "default"; + pinctrl-0 = <&spi0_pins_a>; + pinctrl-1 = <&spi0_cs0_pins_a>; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-spi1.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-spi1.dtso new file mode 100644 index 0000000000..cc0af5db3f --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-spi1.dtso @@ -0,0 +1,39 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun5i-a13"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi1 = "/soc/spi@1c06000"; + }; + }; + + fragment@1 { + target = <&pio>; + __overlay__ { + spi1_pins_a: spi1@0 { + pins = "PG10", "PG11", "PG12"; + function = "spi1"; + }; + + spi1_cs0_pins_a: spi1-cs0@0 { + pins = "PG9"; + function = "spi1"; + }; + }; + }; + + fragment@2 { + target = <&spi1>; + __overlay__ { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins_a>, <&spi1_cs0_pins_a>; + }; + }; + + +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-spi2.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-spi2.dtso new file mode 100644 index 0000000000..6cf5c41a9e --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-spi2.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun5i-a13"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi2 = "/soc/spi@1c17000"; + }; + }; + + fragment@1 { + target = <&spi2>; + __overlay__ { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pe_pins>, <&spi2_cs0_pe_pin>; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-uart0.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-uart0.dtso new file mode 100644 index 0000000000..6edad42bfc --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-uart0.dtso @@ -0,0 +1,32 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun5i-a13"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + uart0 = "/soc@1c00000/serial@1c28000"; + }; + }; + + fragment@1 { + target = <&pio>; + __overlay__ { + uart0_pa_pins: uart0@0 { + pins = "PF2", "PF4"; + function = "uart0"; + }; + }; + }; + + fragment@2 { + target = <&uart0>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pa_pins>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-uart1.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-uart1.dtso new file mode 100644 index 0000000000..675b701ed5 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-uart1.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun5i-a13"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + uart1 = "/soc@1c00000/serial@1c28400"; + }; + }; + + fragment@1 { + target = <&uart1>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pe_pins>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-uart2.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-uart2.dtso new file mode 100644 index 0000000000..b3c4e3d7a0 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-uart2.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun5i-a13"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + uart2 = "/soc@1c00000/serial@1c28800"; + }; + }; + + fragment@1 { + target = <&uart2>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pd_pins>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-uart3.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-uart3.dtso new file mode 100644 index 0000000000..15c25d0c59 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun5i-a13-uart3.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun5i-a13"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + uart3 = "/soc@1c00000/serial@1c28c00"; + }; + }; + + fragment@1 { + target = <&uart3>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pg_pins>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-analog-codec.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-analog-codec.dtso new file mode 100644 index 0000000000..e1a70c5102 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-analog-codec.dtso @@ -0,0 +1,13 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target = <&codec>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-can.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-can.dtso new file mode 100644 index 0000000000..65aebcd414 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-can.dtso @@ -0,0 +1,15 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target = <&can0>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&can0_pins_a>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-i2c1.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-i2c1.dtso new file mode 100644 index 0000000000..c5f6e9732d --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-i2c1.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + i2c1 = "/soc@1c00000/i2c@1c2b000"; + }; + }; + + fragment@1 { + target = <&i2c1>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-i2c2.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-i2c2.dtso new file mode 100644 index 0000000000..fa93d1ed9b --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-i2c2.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + i2c2 = "/soc@1c00000/i2c@1c2b400"; + }; + }; + + fragment@1 { + target = <&i2c2>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-i2c3.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-i2c3.dtso new file mode 100644 index 0000000000..945795c338 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-i2c3.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + i2c3 = "/soc@1c00000/i2c@1c2b800"; + }; + }; + + fragment@1 { + target = <&i2c3>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_pins>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-i2c4.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-i2c4.dtso new file mode 100644 index 0000000000..4fcf08c246 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-i2c4.dtso @@ -0,0 +1,32 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + i2c4 = "/soc@1c00000/i2c@1c2c000"; + }; + }; + + fragment@1 { + target = <&pio>; + __overlay__ { + i2c4_pins_a: i2c4@0 { + pins = "PI2", "PI3"; + function = "i2c4"; + }; + }; + }; + + fragment@2 { + target = <&i2c4>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_pins>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-i2s0.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-i2s0.dtso new file mode 100644 index 0000000000..1a19a2417d --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-i2s0.dtso @@ -0,0 +1,25 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target = <&pio>; + __overlay__ { + i2s0_pins: i2s0 { + pins = "PB5", "PB6", "PB7", "PB8", "PB9", "PB10", "PB11", "PB12"; + function = "i2s0"; + }; + }; + }; + + fragment@1 { + target = <&i2s0>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_pins>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-i2s1.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-i2s1.dtso new file mode 100644 index 0000000000..e6f0a22b79 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-i2s1.dtso @@ -0,0 +1,25 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target = <&pio>; + __overlay__ { + i2s1_pins: i2s1 { + pins = "PA9", "PA14", "PA15", "PA16", "PA17"; + function = "i2s1"; + }; + }; + }; + + fragment@1 { + target = <&i2s1>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&i2s1_pins>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-mmc2.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-mmc2.dtso new file mode 100644 index 0000000000..ede92f243a --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-mmc2.dtso @@ -0,0 +1,18 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target = <&mmc2>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 0 1>; /* PH0, active low */ + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-nand.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-nand.dtso new file mode 100644 index 0000000000..ffa49cc694 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-nand.dtso @@ -0,0 +1,103 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target = <&pio>; + __overlay__ { + nand_pins_a: nand_pins@0 { + pins = "PC0", "PC1", "PC2", + "PC5", "PC8", "PC9", "PC10", + "PC11", "PC12", "PC13", "PC14", + "PC15", "PC16"; + function = "nand0"; + }; + + nand_cs0_pins_a: nand_cs@0 { + pins = "PC4"; + function = "nand0"; + }; + + nand_cs1_pins_a: nand_cs@1 { + pins = "PC3"; + function = "nand0"; + }; + + nand_cs2_pins_a: nand_cs@2 { + pins = "PC17"; + function = "nand0"; + }; + + nand_cs3_pins_a: nand_cs@3 { + pins = "PC18"; + function = "nand0"; + }; + + nand_rb0_pins_a: nand_rb@0 { + pins = "PC6"; + function = "nand0"; + }; + + nand_rb1_pins_a: nand_rb@1 { + pins = "PC7"; + function = "nand0"; + }; + }; + }; + + fragment@1 { + target = <&nfc>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&nand_pins_a>, <&nand_cs0_pins_a>, <&nand_rb0_pins_a>; + status = "okay"; + + nand@0 { + reg = <0>; + allwinner,rb = <0>; + nand-ecc-mode = "hw"; + nand-on-flash-bbt; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <2>; + #size-cells = <2>; + + partition@0 { + label = "SPL"; + reg = <0x0 0x0 0x0 0x400000>; + }; + + partition@400000 { + label = "SPL.backup"; + reg = <0x0 0x400000 0x0 0x400000>; + }; + + partition@800000 { + label = "U-Boot"; + reg = <0x0 0x800000 0x0 0x400000>; + }; + + partition@c00000 { + label = "U-Boot.backup"; + reg = <0x0 0xc00000 0x0 0x400000>; + }; + + partition@1000000 { + label = "env"; + reg = <0x0 0x1000000 0x0 0x400000>; + }; + + partition@1400000 { + label = "rootfs"; + reg = <0x0 0xa00000 0x01 0xff000000>; + }; + }; + }; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-pps-gpio.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-pps-gpio.dtso new file mode 100644 index 0000000000..fe3e2bd964 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-pps-gpio.dtso @@ -0,0 +1,29 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target = <&pio>; + __overlay__ { + pps_pins: pps_pins { + pins = "PI15"; + function = "gpio_in"; + }; + }; + }; + + fragment@1 { + target-path = "/"; + __overlay__ { + pps@0 { + compatible = "pps-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pps_pins>; + gpios = <&pio 8 15 0>; /* PI15 */ + status = "okay"; + }; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-pwm.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-pwm.dtso new file mode 100644 index 0000000000..b0cfe4deae --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-pwm.dtso @@ -0,0 +1,15 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target = <&pwm>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pin>, <&pwm1_pin>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-spdif-out.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-spdif-out.dtso new file mode 100644 index 0000000000..11a09396bd --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-spdif-out.dtso @@ -0,0 +1,38 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target = <&spdif>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx_pin>; + status = "okay"; + }; + }; + + fragment@1 { + target-path = "/"; + __overlay__ { + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "On-board SPDIF"; + + simple-audio-card,cpu { + sound-dai = <&spdif>; + }; + + simple-audio-card,codec { + sound-dai = <&spdif_out>; + }; + }; + + spdif_out: spdif-out { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dit"; + }; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-spi-add-cs1.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-spi-add-cs1.dtso new file mode 100644 index 0000000000..c0a4ba2b3d --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-spi-add-cs1.dtso @@ -0,0 +1,16 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target = <&spi0>; + __overlay__ { + pinctrl-names = "default", "default", "default"; + pinctrl-0 = <&spi0_pi_pins>; + pinctrl-1 = <&spi0_cs0_pi_pin>; + pinctrl-2 = <&spi0_cs1_pi_pin>; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-spi-jedec-nor.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-spi-jedec-nor.dtso new file mode 100644 index 0000000000..b91097eca5 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-spi-jedec-nor.dtso @@ -0,0 +1,57 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi0 = "/soc@1c00000/spi@1c05000"; + spi1 = "/soc@1c00000/spi@1c06000"; + spi2 = "/soc@1c00000/spi@1c17000"; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spiflash@0 { + compatible = "jedec,spi-nor"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + fragment@2 { + target = <&spi1>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spiflash@0 { + compatible = "jedec,spi-nor"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + fragment@3 { + target = <&spi2>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spiflash@0 { + compatible = "jedec,spi-nor"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-spi-spidev.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-spi-spidev.dtso new file mode 100644 index 0000000000..341fe3229f --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-spi-spidev.dtso @@ -0,0 +1,57 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi0 = "/soc@1c00000/spi@1c05000"; + spi1 = "/soc@1c00000/spi@1c06000"; + spi2 = "/soc@1c00000/spi@1c17000"; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spidev@0 { + compatible = "armbian,spi-dev"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + fragment@2 { + target = <&spi1>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spidev@0 { + compatible = "armbian,spi-dev"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + fragment@3 { + target = <&spi2>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spidev@0 { + compatible = "armbian,spi-dev"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-spi0.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-spi0.dtso new file mode 100644 index 0000000000..cad50d8a29 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-spi0.dtso @@ -0,0 +1,23 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi0 = "/soc@1c00000/spi@1c05000"; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + status = "okay"; + pinctrl-names = "default", "default"; + pinctrl-0 = <&spi0_pi_pins>; + pinctrl-1 = <&spi0_cs0_pi_pin>; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-spi1.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-spi1.dtso new file mode 100644 index 0000000000..f0218eb9f7 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-spi1.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi1 = "/soc@1c00000/spi@1c06000"; + }; + }; + + fragment@1 { + target = <&spi1>; + __overlay__ { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pi_pins>, <&spi1_cs0_pi_pin>; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-spi2.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-spi2.dtso new file mode 100644 index 0000000000..effba42b48 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-spi2.dtso @@ -0,0 +1,23 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi2 = "/soc@1c00000/spi@1c17000"; + }; + }; + + fragment@1 { + target = <&spi2>; + __overlay__ { + status = "okay"; + pinctrl-names = "default", "default"; + pinctrl-0 = <&spi2_pb_pins>; + pinctrl-1 = <&spi2_pb_cs0_pin>; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-uart2.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-uart2.dtso new file mode 100644 index 0000000000..79d1dca7a3 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-uart2.dtso @@ -0,0 +1,32 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial2 = "/soc@1c00000/serial@1c28800"; + }; + }; + + fragment@1 { + target = <&pio>; + __overlay__ { + uart2_pins_a_2: uart2@1 { + pins = "PI18", "PI19"; + function = "uart2"; + }; + }; + }; + + fragment@2 { + target = <&uart2>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins_a_2>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-uart3.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-uart3.dtso new file mode 100644 index 0000000000..703acbcf37 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-uart3.dtso @@ -0,0 +1,42 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial3 = "/soc@1c00000/serial@1c28c00"; + }; + }; + + fragment@1 { + target = <&pio>; + __overlay__ { + uart3_pins_a_2: uart3@2 { + pins = "PG6", "PG7"; + function = "uart3"; + }; + + uart3_pins_a_rts_cts: uart3@1 { + pins = "PG8", "PG9"; + function = "uart3"; + }; + + uart3_pins_b_rts_cts: uart3@3 { + pins = "PH2", "PH3"; + function = "uart3"; + }; + }; + }; + + fragment@2 { + target = <&uart3>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins_a_2>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-uart4.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-uart4.dtso new file mode 100644 index 0000000000..19180341a6 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-uart4.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial4 = "/soc@1c00000/serial@1c29000"; + }; + }; + + fragment@1 { + target = <&uart4>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pg_pins>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-uart5.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-uart5.dtso new file mode 100644 index 0000000000..a1369eee29 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-uart5.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial5 = "/soc@1c00000/serial@1c29400"; + }; + }; + + fragment@1 { + target = <&uart5>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart5_pi_pins>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-uart6.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-uart6.dtso new file mode 100644 index 0000000000..fb9efe2a94 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-uart6.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial6 = "/soc@1c00000/serial@1c29800"; + }; + }; + + fragment@1 { + target = <&uart6>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart6_pi_pins>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-uart7.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-uart7.dtso new file mode 100644 index 0000000000..bbdca3ec67 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-uart7.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial7 = "/soc@1c00000/serial@1c29c00"; + }; + }; + + fragment@1 { + target = <&uart7>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart7_pi_pins>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-w1-gpio.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-w1-gpio.dtso new file mode 100644 index 0000000000..7d77606a16 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun7i-a20-w1-gpio.dtso @@ -0,0 +1,29 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun7i-a20"; + + fragment@0 { + target = <&pio>; + __overlay__ { + w1_pins: w1_pins { + pins = "PI15"; + function = "gpio_in"; + }; + }; + }; + + fragment@1 { + target-path = "/"; + __overlay__ { + onewire@0 { + compatible = "w1-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&w1_pins>; + gpios = <&pio 8 15 0>; /* PI15 */ + status = "okay"; + }; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-analog-codec.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-analog-codec.dtso new file mode 100644 index 0000000000..36dbc31ae2 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-analog-codec.dtso @@ -0,0 +1,17 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3"; + + fragment@0 { + target = <&codec>; + __overlay__ { + allwinner,audio-routing = + "Line Out", "LINEOUT", + "MIC1", "Mic", + "Mic", "MBIAS"; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-cir.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-cir.dtso new file mode 100644 index 0000000000..bf4a0eafa1 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-cir.dtso @@ -0,0 +1,15 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3"; + + fragment@0 { + target = <&ir>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&r_ir_rx_pin>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-cpu-clock-1.2GHz-1.3v.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-cpu-clock-1.2GHz-1.3v.dtso new file mode 100644 index 0000000000..b07e694c78 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-cpu-clock-1.2GHz-1.3v.dtso @@ -0,0 +1,31 @@ +// DT overlay for CPU frequency operating points to up to 1.2GHz at a maximum CPU voltage of 1.3v + +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&cpu0_opp_table>; + + __overlay__ { + compatible = "operating-points-v2"; + opp-shared; + + // in order to match the existing DT cooling-maps, update the existing OP table in-place + // with the new voltages + + opp-1104000000 { + opp-hz = /bits/ 64 <1104000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + }; + }; +}; + diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-cpu-clock-1.368GHz-1.3v.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-cpu-clock-1.368GHz-1.3v.dtso new file mode 100644 index 0000000000..e3fd7e5c85 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-cpu-clock-1.368GHz-1.3v.dtso @@ -0,0 +1,67 @@ +// DT overlay for CPU frequency operating points to 1.3GHz at a maximum CPU voltage of 1.3v + +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&cpu0_opp_table>; + + __overlay__ { + compatible = "operating-points-v2"; + opp-shared; + + // in order to match the DT cooling-maps, update the existing OP table in-place + // with the new voltages + + opp-1056000000 { + opp-hz = /bits/ 64 <1056000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-1104000000 { + opp-hz = /bits/ 64 <1104000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-1152000000 { + opp-hz = /bits/ 64 <1152000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-1224000000 { + opp-hz = /bits/ 64 <1224000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-1248000000 { + opp-hz = /bits/ 64 <1248000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-1296000000 { + opp-hz = /bits/ 64 <1296000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-1368000000 { + opp-hz = /bits/ 64 <1368000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + }; + }; +}; + diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-cpu-clock-1.3GHz-1.3v.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-cpu-clock-1.3GHz-1.3v.dtso new file mode 100644 index 0000000000..413222831e --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-cpu-clock-1.3GHz-1.3v.dtso @@ -0,0 +1,61 @@ +// DT overlay for CPU frequency operating points to 1.3GHz at a maximum CPU voltage of 1.3v + +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&cpu0_opp_table>; + + __overlay__ { + compatible = "operating-points-v2"; + opp-shared; + + // in order to match the DT cooling-maps, update the existing OP table in-place + // with the new voltages + + opp-1056000000 { + opp-hz = /bits/ 64 <1056000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-1104000000 { + opp-hz = /bits/ 64 <1104000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-1152000000 { + opp-hz = /bits/ 64 <1152000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-1224000000 { + opp-hz = /bits/ 64 <1224000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-1248000000 { + opp-hz = /bits/ 64 <1248000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-1296000000 { + opp-hz = /bits/ 64 <1296000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + }; + }; +}; + diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-i2c0.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-i2c0.dtso new file mode 100644 index 0000000000..a36ac86676 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-i2c0.dtso @@ -0,0 +1,20 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + i2c0 = "/soc/i2c@1c2ac00"; + }; + }; + + fragment@1 { + target = <&i2c0>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-i2c1.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-i2c1.dtso new file mode 100644 index 0000000000..258c86de07 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-i2c1.dtso @@ -0,0 +1,20 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + i2c1 = "/soc/i2c@1c2b000"; + }; + }; + + fragment@1 { + target = <&i2c1>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-i2c2.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-i2c2.dtso new file mode 100644 index 0000000000..a1e3284984 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-i2c2.dtso @@ -0,0 +1,20 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + i2c2 = "/soc/i2c@1c2b400"; + }; + }; + + fragment@1 { + target = <&i2c2>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-pps-gpio.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-pps-gpio.dtso new file mode 100644 index 0000000000..16a737b029 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-pps-gpio.dtso @@ -0,0 +1,29 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3"; + + fragment@0 { + target = <&pio>; + __overlay__ { + pps_pins: pps_pins { + pins = "PD14"; + function = "gpio_in"; + }; + }; + }; + + fragment@1 { + target-path = "/"; + __overlay__ { + pps@0 { + compatible = "pps-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pps_pins>; + gpios = <&pio 3 14 0>; /* PD14 */ + status = "okay"; + }; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-pwm.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-pwm.dtso new file mode 100644 index 0000000000..ed3b8e6062 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-pwm.dtso @@ -0,0 +1,39 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3"; + + fragment@0 { + target-path = "/chosen"; + __overlay__ { + /delete-property/ stdout-path; + }; + }; + + fragment@1 { + target = <&uart0>; + __overlay__ { + status = "disabled"; + }; + }; + + fragment@2 { + target = <&pio>; + __overlay__ { + pwm0_pin: pwm0 { + pins = "PA5"; + function = "pwm0"; + }; + }; + }; + + fragment@3 { + target = <&pwm>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pin>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-spdif-out.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-spdif-out.dtso new file mode 100644 index 0000000000..35b2d56770 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-spdif-out.dtso @@ -0,0 +1,38 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3"; + + fragment@0 { + target = <&spdif>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx_pin>; + status = "okay"; + }; + }; + + fragment@1 { + target-path = "/"; + __overlay__ { + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "On-board SPDIF"; + + simple-audio-card,cpu { + sound-dai = <&spdif>; + }; + + simple-audio-card,codec { + sound-dai = <&spdif_out>; + }; + }; + + spdif_out: spdif-out { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dit"; + }; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-spi-add-cs1.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-spi-add-cs1.dtso new file mode 100644 index 0000000000..bd8e256172 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-spi-add-cs1.dtso @@ -0,0 +1,41 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3"; + + fragment@0 { + target = <&pio>; + __overlay__ { + spi0_cs1: spi0_cs1 { + pins = "PA21"; + function = "gpio_out"; + output-high; + }; + + spi1_cs1: spi1_cs1 { + pins = "PA10"; + function = "gpio_out"; + output-high; + }; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + pinctrl-names = "default", "default"; + pinctrl-1 = <&spi0_cs1>; + cs-gpios = <0>, <&pio 0 21 0>; /* PA21 */ + }; + }; + + fragment@2 { + target = <&spi1>; + __overlay__ { + pinctrl-names = "default", "default"; + pinctrl-1 = <&spi1_cs1>; + cs-gpios = <0>, <&pio 0 10 0>; /* PA10 */ + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-spi-jedec-nor.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-spi-jedec-nor.dtso new file mode 100644 index 0000000000..95fa5f2ca1 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-spi-jedec-nor.dtso @@ -0,0 +1,42 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi0 = "/soc/spi@1c68000"; + spi1 = "/soc/spi@1c69000"; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spiflash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <1000000>; + status = "disabled"; + }; + }; + }; + + fragment@2 { + target = <&spi1>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spiflash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <1000000>; + status = "disabled"; + }; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-spi-spidev.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-spi-spidev.dtso new file mode 100644 index 0000000000..c79beb95ec --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-spi-spidev.dtso @@ -0,0 +1,42 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi0 = "/soc/spi@1c68000"; + spi1 = "/soc/spi@1c69000"; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spidev@0 { + compatible = "armbian,spi-dev"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + fragment@2 { + target = <&spi1>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spidev@0 { + compatible = "armbian,spi-dev"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-uart1.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-uart1.dtso new file mode 100644 index 0000000000..3c10d4db42 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-uart1.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial1 = "/soc/serial@1c28400"; + }; + }; + + fragment@1 { + target = <&uart1>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-uart2.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-uart2.dtso new file mode 100644 index 0000000000..f16e618629 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-uart2.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial2 = "/soc/serial@1c28800"; + }; + }; + + fragment@1 { + target = <&uart2>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-uart3.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-uart3.dtso new file mode 100644 index 0000000000..b1aef575e0 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-uart3.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial3 = "/soc/serial@1c28c00"; + }; + }; + + fragment@1 { + target = <&uart3>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-usbhost0.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-usbhost0.dtso new file mode 100644 index 0000000000..6bd8aedbee --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-usbhost0.dtso @@ -0,0 +1,27 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3"; + + fragment@0 { + target = <&ehci0>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@1 { + target = <&ohci0>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@2 { + target = <&usbphy>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-usbhost1.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-usbhost1.dtso new file mode 100644 index 0000000000..4c7222b10b --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-usbhost1.dtso @@ -0,0 +1,27 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3"; + + fragment@0 { + target = <&ehci1>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@1 { + target = <&ohci1>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@2 { + target = <&usbphy>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-usbhost2.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-usbhost2.dtso new file mode 100644 index 0000000000..2b83ec933a --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-usbhost2.dtso @@ -0,0 +1,27 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3"; + + fragment@0 { + target = <&ehci2>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@1 { + target = <&ohci2>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@2 { + target = <&usbphy>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-usbhost3.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-usbhost3.dtso new file mode 100644 index 0000000000..e2f28ab1ae --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-usbhost3.dtso @@ -0,0 +1,27 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3"; + + fragment@0 { + target = <&ehci3>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@1 { + target = <&ohci3>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@2 { + target = <&usbphy>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-w1-gpio.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-w1-gpio.dtso new file mode 100644 index 0000000000..f4ccb7fba9 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-h3-w1-gpio.dtso @@ -0,0 +1,29 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3"; + + fragment@0 { + target = <&pio>; + __overlay__ { + w1_pins: w1_pins { + pins = "PD14"; + function = "gpio_in"; + }; + }; + }; + + fragment@1 { + target-path = "/"; + __overlay__ { + onewire@0 { + compatible = "w1-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&w1_pins>; + gpios = <&pio 3 14 0>; /* PD14 */ + status = "okay"; + }; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-i2c2.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-i2c2.dtso new file mode 100644 index 0000000000..a1e3284984 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-i2c2.dtso @@ -0,0 +1,20 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + i2c2 = "/soc/i2c@1c2b400"; + }; + }; + + fragment@1 { + target = <&i2c2>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-i2c3.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-i2c3.dtso new file mode 100644 index 0000000000..949a982345 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-i2c3.dtso @@ -0,0 +1,20 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + i2c3 = "/soc/i2c@1c2b800"; + }; + }; + + fragment@1 { + target = <&i2c3>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-spi-spidev0.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-spi-spidev0.dtso new file mode 100644 index 0000000000..fae9c3f75b --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-spi-spidev0.dtso @@ -0,0 +1,27 @@ +/dts-v1/; +/ { + compatible = "allwinner,sun8i-r40"; + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi0 = "/soc/spi@1c05000"; + }; + }; + fragment@1 { + target = <0xffffffff>; + __overlay__ { + #address-cells = <0x00000001>; + #size-cells = <0x00000000>; + status = "okay"; + spidev@0 { + compatible = "armbian,spi-dev"; + status = "okay"; + reg = <0x00000000>; + spi-max-frequency = <0x000f4240>; + }; + }; + }; + __fixups__ { + spi0 = "/fragment@1:target:0"; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-spi-spidev1.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-spi-spidev1.dtso new file mode 100644 index 0000000000..cb98ddf6bb --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-spi-spidev1.dtso @@ -0,0 +1,27 @@ +/dts-v1/; +/ { + compatible = "allwinner,sun8i-r40"; + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi1 = "/soc/spi@1c06000"; + }; + }; + fragment@1 { + target = <0xffffffff>; + __overlay__ { + #address-cells = <0x00000001>; + #size-cells = <0x00000000>; + status = "okay"; + spidev@0 { + compatible = "armbian,spi-dev"; + status = "okay"; + reg = <0x00000000>; + spi-max-frequency = <0x000f4240>; + }; + }; + }; + __fixups__ { + spi1 = "/fragment@1:target:0"; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-uart2.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-uart2.dtso new file mode 100644 index 0000000000..2030d6777f --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-uart2.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/ { + compatible = "allwinner,sun8i-r40"; + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial2 = "/soc/serial@1c28800"; + }; + }; + fragment@1 { + target = <0xffffffff>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <0xffffffff>; + status = "okay"; + }; + }; + __fixups__ { + uart2 = "/fragment@1:target:0"; + uart2_pi_pins = "/fragment@1/__overlay__:pinctrl-0:0"; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-uart4.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-uart4.dtso new file mode 100644 index 0000000000..0d7f934f68 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-uart4.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/ { + compatible = "allwinner,sun8i-r40"; + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial4 = "/soc/serial@1c29000"; + }; + }; + fragment@1 { + target = <0xffffffff>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <0xffffffff>; + status = "okay"; + }; + }; + __fixups__ { + uart4 = "/fragment@1:target:0"; + uart4_ph_pins = "/fragment@1/__overlay__:pinctrl-0:0"; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-uart5.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-uart5.dtso new file mode 100644 index 0000000000..e695535afc --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-uart5.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/ { + compatible = "allwinner,sun8i-r40"; + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial5 = "/soc/serial@1c29400"; + }; + }; + fragment@1 { + target = <0xffffffff>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <0xffffffff>; + status = "okay"; + }; + }; + __fixups__ { + uart5 = "/fragment@1:target:0"; + uart5_ph_pins = "/fragment@1/__overlay__:pinctrl-0:0"; + }; +}; diff --git a/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-uart7.dtso b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-uart7.dtso new file mode 100644 index 0000000000..e572598339 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.18/overlay_32/sun8i-r40-uart7.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/ { + compatible = "allwinner,sun8i-r40"; + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial7 = "/soc/serial@1c29c00"; + }; + }; + fragment@1 { + target = <0xffffffff>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <0xffffffff>; + status = "okay"; + }; + }; + __fixups__ { + uart7 = "/fragment@1:target:0"; + uart7_pi_pins = "/fragment@1/__overlay__:pinctrl-0:0"; + }; +};