From e85633b25ace203b13d44b4f9ca23d90555a8eee Mon Sep 17 00:00:00 2001 From: Patrick Yavitz Date: Sun, 27 Jul 2025 08:26:56 -0400 Subject: [PATCH] BananaPi BPI-M4-Zero: Update u-boot to v2025.07 Signed-off-by: Patrick Yavitz --- config/boards/bananapim4zero.conf | 4 +- .../001-Add-board-BananaPi-BPI-M4-Zero.patch | 340 ++++++++++++++++++ .../050-HACK-sunxi-h616-gpu-enable.patch | 26 ++ .../051-sunxi-h616-ths-workaround.patch | 33 ++ ...s-add-delay-to-steady-dram-detection.patch | 33 ++ 5 files changed, 434 insertions(+), 2 deletions(-) create mode 100644 patch/u-boot/v2025.07/board_bananapim4zero/001-Add-board-BananaPi-BPI-M4-Zero.patch create mode 100644 patch/u-boot/v2025.07/board_bananapim4zero/050-HACK-sunxi-h616-gpu-enable.patch create mode 100644 patch/u-boot/v2025.07/board_bananapim4zero/051-sunxi-h616-ths-workaround.patch create mode 100644 patch/u-boot/v2025.07/board_bananapim4zero/052-mach-sunxi-dram_helpers-add-delay-to-steady-dram-detection.patch diff --git a/config/boards/bananapim4zero.conf b/config/boards/bananapim4zero.conf index 598aee4102..80e3c8b45e 100644 --- a/config/boards/bananapim4zero.conf +++ b/config/boards/bananapim4zero.conf @@ -10,8 +10,8 @@ KERNEL_TARGET="current,edge" KERNEL_TEST_TARGET="current" MODULES_BLACKLIST="rtw88_8821c rtw88_8821cu" FORCE_BOOTSCRIPT_UPDATE="yes" -BOOTBRANCH_BOARD="tag:v2025.01" -BOOTPATCHDIR="v2025.01" +BOOTBRANCH_BOARD="tag:v2025.07" +BOOTPATCHDIR="v2025.07" PACKAGE_LIST_BOARD="rfkill bluetooth bluez bluez-tools" function post_family_tweaks_bsp__bananapi_firmware() { diff --git a/patch/u-boot/v2025.07/board_bananapim4zero/001-Add-board-BananaPi-BPI-M4-Zero.patch b/patch/u-boot/v2025.07/board_bananapim4zero/001-Add-board-BananaPi-BPI-M4-Zero.patch new file mode 100644 index 0000000000..0310e643ff --- /dev/null +++ b/patch/u-boot/v2025.07/board_bananapim4zero/001-Add-board-BananaPi-BPI-M4-Zero.patch @@ -0,0 +1,340 @@ +From c77d5ad2ba71d49534c3c643675c94bb09f345a2 Mon Sep 17 00:00:00 2001 +From: Patrick Yavitz +Date: Sun, 27 Jul 2025 07:11:47 -0400 +Subject: [PATCH] Add board BananaPi BPI-M4-Zero + +Signed-off-by: Patrick Yavitz +--- + configs/bananapi_m4zero_defconfig | 30 +++ + .../sun50i-h618-bananapi-m4-zero.dts | 74 +++++++ + .../allwinner/sun50i-h618-bananapi-m4.dtsi | 200 ++++++++++++++++++ + 3 files changed, 304 insertions(+) + create mode 100644 configs/bananapi_m4zero_defconfig + create mode 100644 dts/upstream/src/arm64/allwinner/sun50i-h618-bananapi-m4-zero.dts + create mode 100644 dts/upstream/src/arm64/allwinner/sun50i-h618-bananapi-m4.dtsi + +diff --git a/configs/bananapi_m4zero_defconfig b/configs/bananapi_m4zero_defconfig +new file mode 100644 +index 00000000000..6d70efd1a50 +--- /dev/null ++++ b/configs/bananapi_m4zero_defconfig +@@ -0,0 +1,30 @@ ++CONFIG_OF_UPSTREAM=y ++CONFIG_ARM=y ++CONFIG_ARCH_SUNXI=y ++CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun50i-h618-bananapi-m4-zero" ++CONFIG_SPL=y ++CONFIG_DRAM_SUNXI_DX_ODT=0x07070707 ++CONFIG_DRAM_SUNXI_DX_DRI=0x0e0e0e0e ++CONFIG_DRAM_SUNXI_CA_DRI=0x0e0e ++CONFIG_DRAM_SUNXI_ODT_EN=0xaaaaeeee ++CONFIG_DRAM_SUNXI_TPR6=0x48808080 ++CONFIG_DRAM_SUNXI_TPR10=0x402f6663 ++CONFIG_DRAM_SUNXI_TPR11=0x26262524 ++CONFIG_DRAM_SUNXI_TPR12=0x100f100f ++CONFIG_MACH_SUN50I_H616=y ++CONFIG_SUNXI_DRAM_H616_LPDDR4=y ++CONFIG_DRAM_CLK=792 ++CONFIG_MMC_SUNXI_SLOT_EXTRA=2 ++CONFIG_R_I2C_ENABLE=y ++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ++CONFIG_SPL_I2C=y ++CONFIG_SPL_SYS_I2C_LEGACY=y ++CONFIG_SYS_I2C_MVTWSI=y ++CONFIG_SYS_I2C_SLAVE=0x7f ++CONFIG_SYS_I2C_SPEED=400000 ++CONFIG_SUN8I_EMAC=y ++CONFIG_SUPPORT_EMMC_BOOT=y ++CONFIG_AXP313_POWER=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_MUSB_GADGET=y +diff --git a/dts/upstream/src/arm64/allwinner/sun50i-h618-bananapi-m4-zero.dts b/dts/upstream/src/arm64/allwinner/sun50i-h618-bananapi-m4-zero.dts +new file mode 100644 +index 00000000000..5d868eaaef9 +--- /dev/null ++++ b/dts/upstream/src/arm64/allwinner/sun50i-h618-bananapi-m4-zero.dts +@@ -0,0 +1,74 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2025 Patrick Yavitz ++ */ ++ ++/dts-v1/; ++ ++#include "sun50i-h618-bananapi-m4.dtsi" ++ ++/ { ++ model = "BananaPi BPI-M4-Zero"; ++ compatible = "sinovoip,bpi-m4-zero", "allwinner,sun50i-h618"; ++ ++ aliases { ++ serial5 = &uart5; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led-0 { ++ color = ; ++ function = LED_FUNCTION_STATUS; ++ gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */ ++ linux,default-trigger = "heartbeat"; ++ }; ++ }; ++}; ++ ++/* Connected to an on-board RTL8821CU USB WiFi chip. */ ++&ehci1 { ++ status = "disabled"; ++}; ++ ++&ehci3 { ++ status = "okay"; ++}; ++ ++/* SDIO */ ++&mmc1 { ++ status = "disabled"; ++ bus-width = <4>; ++ max-frequency = <100000000>; ++ ++ non-removable; ++ disable-wp; ++ ++ /* WiFi firmware requires power to be kept while in suspend */ ++ keep-power-in-suspend; ++ ++ mmc-pwrseq = <&wifi_pwrseq>; ++ ++ cd-gpios = <&pio 6 15 GPIO_ACTIVE_HIGH>; /* PG15 */ ++ vmmc-supply = <®_vcc3v3>; ++ ++ sdio: wifi@1 { ++ reg = <1>; ++ compatible = "brcm,bcm4329-fmac"; ++ }; ++}; ++ ++&ohci3 { ++ status = "okay"; ++}; ++ ++&usbotg { ++ status = "okay"; ++ dr_mode = "peripheral"; ++}; ++ ++&usbphy { ++ status = "okay"; ++ usb1_vbus-supply = <®_usb_vbus>; ++}; +diff --git a/dts/upstream/src/arm64/allwinner/sun50i-h618-bananapi-m4.dtsi b/dts/upstream/src/arm64/allwinner/sun50i-h618-bananapi-m4.dtsi +new file mode 100644 +index 00000000000..d0442ca9692 +--- /dev/null ++++ b/dts/upstream/src/arm64/allwinner/sun50i-h618-bananapi-m4.dtsi +@@ -0,0 +1,200 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2025 Patrick Yavitz ++ */ ++ ++/dts-v1/; ++ ++#include "sun50i-h616.dtsi" ++ ++#include ++#include ++#include ++#include ++ ++/ { ++ aliases { ++ serial0 = &uart0; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ reg_usb_vbus: regulator-usb-vbus { ++ /* Separate discrete regulator for the USB ports */ ++ compatible = "regulator-fixed"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-name = "usb-vbus"; ++ vin-supply = <®_vcc5v>; ++ }; ++ ++ reg_vcc5v: regulator-vcc5v { ++ /* Board wide 5V supply directly from the USB-C socket */ ++ compatible = "regulator-fixed"; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-name = "vcc-5v"; ++ }; ++ ++ reg_vcc3v3: regulator-vcc3v3 { ++ compatible = "regulator-fixed"; ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-3v3"; ++ vin-supply = <®_vcc5v>; ++ }; ++ ++ reg_vcc1v8: regulator-vcc1v8 { ++ compatible = "regulator-fixed"; ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc-1v8"; ++ vin-supply = <®_vcc3v3>; ++ }; ++ ++ wifi_pwrseq: wifi-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ clocks = <&rtc CLK_OSC32K_FANOUT>; ++ clock-names = "ext_clock"; ++ pinctrl-0 = <&x32clk_fanout_pin>; ++ pinctrl-names = "default"; ++ post-power-on-delay-ms = <200>; ++ reset-gpios = <&pio 6 18 GPIO_ACTIVE_LOW>; /* PG18 */ ++ }; ++}; ++ ++&cpu0 { ++ cpu-supply = <®_dcdc2>; ++}; ++ ++/* SD card */ ++&mmc0 { ++ status = "okay"; ++ bus-width = <4>; ++ max-frequency = <50000000>; ++ ++ disable-wp; ++ ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ ++ vmmc-supply = <®_vcc3v3>; ++}; ++ ++/* eMMC */ ++&mmc2 { ++ status = "okay"; ++ bus-width = <8>; ++ cap-mmc-hw-reset; ++ mmc-hs200-1_8v; ++ ++ non-removable; ++ disable-wp; ++ ++ vmmc-supply = <®_vcc3v3>; ++ vqmmc-supply = <®_vcc1v8>; ++}; ++ ++&pio { ++ vcc-pc-supply = <®_aldo1>; ++ vcc-pf-supply = <®_dldo1>; ++ vcc-pg-supply = <®_dldo1>; ++ vcc-ph-supply = <®_dldo1>; ++ vcc-pi-supply = <®_dldo1>; ++ ++ /* Add UART Pins */ ++ uart4_pi_pins: uart4-pi-pins { ++ pins = "PI13", "PI14"; ++ function = "uart4"; ++ }; ++ ++ uart4_pi_rts_cts_pins: uart4-pi-rts-cts-pins { ++ pins = "PI15", "PI16"; ++ function = "uart4"; ++ }; ++ ++ uart5_ph_pins: uart5-ph-pins { ++ pins = "PH2", "PH3"; ++ function = "uart5"; ++ }; ++}; ++ ++&r_i2c { ++ status = "okay"; ++ ++ axp313: pmic@36 { ++ compatible = "x-powers,axp313a"; ++ reg = <0x36>; ++ #interrupt-cells = <1>; ++ interrupt-controller; ++ interrupt-parent = <&pio>; ++ ++ vin1-supply = <®_vcc5v>; ++ vin2-supply = <®_vcc5v>; ++ vin3-supply = <®_vcc5v>; ++ ++ regulators { ++ reg_aldo1: aldo1 { ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc-1v8-pll"; ++ }; ++ ++ reg_dldo1: dldo1 { ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-3v3-io"; ++ }; ++ ++ reg_dcdc1: dcdc1 { ++ regulator-always-on; ++ regulator-min-microvolt = <810000>; ++ regulator-max-microvolt = <990000>; ++ regulator-name = "vdd-gpu-sys"; ++ }; ++ ++ reg_dcdc2: dcdc2 { ++ regulator-always-on; ++ regulator-min-microvolt = <810000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd-cpu"; ++ }; ++ ++ reg_dcdc3: dcdc3 { ++ regulator-always-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd-dram"; ++ }; ++ }; ++ }; ++}; ++ ++&uart0 { ++ status = "okay"; ++ pinctrl-0 = <&uart0_ph_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&uart1 { ++ status = "disabled"; ++ pinctrl-0 = <&uart1_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&uart4 { ++ status = "disabled"; ++ pinctrl-0 = <&uart4_pi_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&uart5 { ++ status = "okay"; ++ pinctrl-0 = <&uart5_ph_pins>; ++ pinctrl-names = "default"; ++}; +-- +2.43.0 + diff --git a/patch/u-boot/v2025.07/board_bananapim4zero/050-HACK-sunxi-h616-gpu-enable.patch b/patch/u-boot/v2025.07/board_bananapim4zero/050-HACK-sunxi-h616-gpu-enable.patch new file mode 100644 index 0000000000..5642bf9a8d --- /dev/null +++ b/patch/u-boot/v2025.07/board_bananapim4zero/050-HACK-sunxi-h616-gpu-enable.patch @@ -0,0 +1,26 @@ +From 4d113a1adecc24cd652214b6aa8fa1d600c04614 Mon Sep 17 00:00:00 2001 +From: Jernej Skrabec +Date: Sat, 26 Jul 2025 11:06:30 -0400 +Subject: [PATCH] HACK: sunxi: h616 gpu enable + +Signed-off-by: Jernej Skrabec +--- + arch/arm/mach-sunxi/clock_sun50i_h6.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm/mach-sunxi/clock_sun50i_h6.c b/arch/arm/mach-sunxi/clock_sun50i_h6.c +index 4c522f60810..bb38dbb263b 100644 +--- a/arch/arm/mach-sunxi/clock_sun50i_h6.c ++++ b/arch/arm/mach-sunxi/clock_sun50i_h6.c +@@ -13,6 +13,8 @@ void clock_init_safe(void) + /* this seems to enable PLLs on H616 */ + setbits_le32(prcm + CCU_PRCM_SYS_PWROFF_GATING, 0x10); + setbits_le32(prcm + CCU_PRCM_RES_CAL_CTRL, 2); ++ /* enable GPU */ ++ writel(0, 0x7010254); + } + + if (IS_ENABLED(CONFIG_MACH_SUN50I_H616) || +-- +2.43.0 + diff --git a/patch/u-boot/v2025.07/board_bananapim4zero/051-sunxi-h616-ths-workaround.patch b/patch/u-boot/v2025.07/board_bananapim4zero/051-sunxi-h616-ths-workaround.patch new file mode 100644 index 0000000000..87bb2f2278 --- /dev/null +++ b/patch/u-boot/v2025.07/board_bananapim4zero/051-sunxi-h616-ths-workaround.patch @@ -0,0 +1,33 @@ +From ad10cf66b98acbdc21f431e262633e18b2e93c70 Mon Sep 17 00:00:00 2001 +From: Kali Prasad +Date: Sun, 24 Nov 2024 07:51:12 -0500 +Subject: [PATCH] sunxi: h616 ths workaround + +Signed-off-by: Kali Prasad +--- + board/sunxi/board.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/board/sunxi/board.c b/board/sunxi/board.c +index 961cdcde74..af2b372a56 100644 +--- a/board/sunxi/board.c ++++ b/board/sunxi/board.c +@@ -225,6 +225,15 @@ int board_init(void) + if (ret) + return ret; + ++#if CONFIG_MACH_SUN50I_H616 ++ /* ++ * The bit[16] of register reg[0x03000000] must be zero for the THS ++ * driver to work properly in the kernel. The BSP u-boot is putting ++ * the whole register to zero so we are doing the same. ++ */ ++ writel(0x0, SUNXI_SRAMC_BASE); ++#endif ++ + eth_init_board(); + + return 0; +-- +2.39.5 + diff --git a/patch/u-boot/v2025.07/board_bananapim4zero/052-mach-sunxi-dram_helpers-add-delay-to-steady-dram-detection.patch b/patch/u-boot/v2025.07/board_bananapim4zero/052-mach-sunxi-dram_helpers-add-delay-to-steady-dram-detection.patch new file mode 100644 index 0000000000..3d76e22b88 --- /dev/null +++ b/patch/u-boot/v2025.07/board_bananapim4zero/052-mach-sunxi-dram_helpers-add-delay-to-steady-dram-detection.patch @@ -0,0 +1,33 @@ +From 110909494f8eeae7470321399978c25d9e3af554 Mon Sep 17 00:00:00 2001 +From: Patrick Yavitz +Date: Mon, 13 May 2024 17:45:57 -0400 +Subject: [PATCH] mach-sunxi: dram_helpers: add delay to steady dram detection + +Signed-off-by: Patrick Yavitz +--- + arch/arm/mach-sunxi/dram_helpers.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm/mach-sunxi/dram_helpers.c b/arch/arm/mach-sunxi/dram_helpers.c +index 83dbe4ca98..df7845502d 100644 +--- a/arch/arm/mach-sunxi/dram_helpers.c ++++ b/arch/arm/mach-sunxi/dram_helpers.c +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + + /* + * Wait up to 1s for value to be set in given part of reg. +@@ -45,6 +46,7 @@ bool mctl_mem_matches_base(u32 offset, ulong base) + writel(0, base); + writel(0xaa55aa55, base + offset); + dsb(); ++ udelay(150); + /* Check if the same value is actually observed when reading back */ + ret = readl(base) == readl(base + offset); + +-- +2.39.2 +