diff --git a/config/boards/jetson-nano.conf b/config/boards/jetson-nano.conf index 75adc0d56a..476b90bfbb 100644 --- a/config/boards/jetson-nano.conf +++ b/config/boards/jetson-nano.conf @@ -1,7 +1,7 @@ # Nvidia Jetson Nano quad core 2G/4GB SoC 4 x USB3 HDMI & DP BOARD_NAME="Jetson Nano" -BOARDFAMILY="jetson-nano" -BOOTCONFIG="p3450-0000_defconfig" +BOARDFAMILY="media" +BOOTCONFIG="none" KERNEL_TARGET="legacy,current,edge" FULL_DESKTOP="yes" BOOT_LOGO="desktop" diff --git a/config/sources/families/include/rockchip64_common.inc b/config/sources/families/include/rockchip64_common.inc index 058d52506c..c49f923006 100644 --- a/config/sources/families/include/rockchip64_common.inc +++ b/config/sources/families/include/rockchip64_common.inc @@ -319,6 +319,22 @@ family_tweaks() { fi + if [[ $BOARD == jetson-nano ]]; then + install -m 755 $SRC/packages/blobs/jetson/jetson.sh $SDCARD/etc/initramfs-tools/hooks/jetson.sh + if [[ $BRANCH == legacy ]]; then + install -m 755 $SRC/packages/blobs/jetson/tegra21x_xusb_firmware $SDCARD/lib/firmware/tegra21x_xusb_firmware + install -m 755 $SRC/packages/blobs/jetson/asound.conf.tegrahda $SDCARD/etc/asound.conf.tegrahda + install -m 755 $SRC/packages/blobs/jetson/asound.conf.tegrahda $SDCARD/etc/asound.conf + install -m 755 $SRC/packages/blobs/jetson/asound.conf.tegrasndt210ref $SDCARD/etc/asound.conf.tegrasndt210ref + install -m 755 $SRC/packages/blobs/jetson/tegra-hda.conf $SDCARD/usr/share/alsa/cards/tegra-hda.conf + install -m 755 $SRC/packages/blobs/jetson/tegra-snd-t210r.conf $SDCARD/usr/share/alsa/cards/tegra-snd-t210r.conf + sed -e 's/exit 0//g' -i $SDCARD/etc/rc.local + echo "su -c 'echo 255 > /sys/devices/pwm-fan/target_pwm'" >> $SDCARD/etc/rc.local + echo "exit 0" >> $SDCARD/etc/rc.local + else + cp -R $SRC/packages/blobs/jetson/firmware/* $SDCARD/lib/firmware/ + fi + fi } family_tweaks_bsp() { diff --git a/config/sources/families/jetson-nano.conf b/config/sources/families/jetson-nano.conf deleted file mode 100644 index e3c2a140b6..0000000000 --- a/config/sources/families/jetson-nano.conf +++ /dev/null @@ -1,62 +0,0 @@ -ARCH=arm64 -KERNEL_IMAGE_TYPE=Image -BOOTCONFIG=none -ATF_COMPILE="no" -OFFSET=16 - -CPUMIN=504000 -CPUMAX=2132000 -GOVERNOR=ondemand - -case $BRANCH in - - legacy) - KERNELDIR='linux-nano' - KERNELSOURCE='https://github.com/150balbes/Jetson-Nano' - KERNELBRANCH='branch:4.9.201' - EXTRAWIFI="no" - BOOT_FDT_FILE="none" - SRC_CMDLINE='console=ttyS0,115200n8 console=tty0 tegraid=21.1.2.0.0 ddr_die=4096M@2048M section=512M memtype=0 vpr_resize usb_port_owner_info=0 lane_owner_info=0 emc_max_dvfs=0 touch_id=0@63 video=tegrafb debug_uartport=lsport,4 earlyprintk=uart8250-32bit,0x70006000 maxcpus=4 usbcore.old_scheme_first=1 lp0_vec=0x1000@0xff780000 core_edp_mv=1075 core_edp_ma=4000 tegra_fbmem=0x800000@0x92ca9000 is_hdmi_initialised=1 earlycon=uart8250,mmio32,0x70006000 fbcon=map:0' - MODULES_INITRD="jetson-nano-legacy" - ;; - - current) - KERNELBRANCH="branch:linux-5.18.y" - KERNELPATCHDIR='media-'$BRANCH - LINUXFAMILY=media - LINUXCONFIG='linux-media-'$BRANCH - MODULES_INITRD="jetson-nano-current" - ;; - - edge) -# KERNELBRANCH="branch:linux-5.18.y" - KERNELBRANCH="tag:v5.19-rc6" - KERNELPATCHDIR='media-'$BRANCH - LINUXFAMILY=media - LINUXCONFIG='linux-media-'$BRANCH - MODULES_INITRD="jetson-nano-edge" - ;; - -esac - -family_tweaks() -{ - - install -m 755 $SRC/packages/blobs/jetson/jetson.sh $SDCARD/etc/initramfs-tools/hooks/jetson.sh - - if [[ $BRANCH == legacy ]]; then - install -m 755 $SRC/packages/blobs/jetson/tegra21x_xusb_firmware $SDCARD/lib/firmware/tegra21x_xusb_firmware - install -m 755 $SRC/packages/blobs/jetson/asound.conf.tegrahda $SDCARD/etc/asound.conf.tegrahda - install -m 755 $SRC/packages/blobs/jetson/asound.conf.tegrahda $SDCARD/etc/asound.conf - install -m 755 $SRC/packages/blobs/jetson/asound.conf.tegrasndt210ref $SDCARD/etc/asound.conf.tegrasndt210ref - install -m 755 $SRC/packages/blobs/jetson/tegra-hda.conf $SDCARD/usr/share/alsa/cards/tegra-hda.conf - install -m 755 $SRC/packages/blobs/jetson/tegra-snd-t210r.conf $SDCARD/usr/share/alsa/cards/tegra-snd-t210r.conf - - sed -e 's/exit 0//g' -i $SDCARD/etc/rc.local - echo "su -c 'echo 255 > /sys/devices/pwm-fan/target_pwm'" >> $SDCARD/etc/rc.local - echo "exit 0" >> $SDCARD/etc/rc.local - else - cp -R $SRC/packages/blobs/jetson/firmware/* $SDCARD/lib/firmware/ - fi - -} diff --git a/config/sources/families/media.conf b/config/sources/families/media.conf index 8ae4bc8fbd..5993932dc2 100644 --- a/config/sources/families/media.conf +++ b/config/sources/families/media.conf @@ -26,6 +26,14 @@ case $BRANCH in LINUXCONFIG='linux-station-p2-'$BRANCH EXTRAWIFI="no" WIREGUARD="no" + elif [[ $BOARD == jetson-nano ]]; then + KERNELDIR='linux-nano' + KERNELSOURCE='https://github.com/150balbes/Jetson-Nano' + KERNELBRANCH='branch:4.9.201' + EXTRAWIFI="no" + BOOT_FDT_FILE="none" + SRC_CMDLINE='console=ttyS0,115200n8 console=tty0 tegraid=21.1.2.0.0 ddr_die=4096M@2048M section=512M memtype=0 vpr_resize usb_port_owner_info=0 lane_owner_info=0 emc_max_dvfs=0 touch_id=0@63 video=tegrafb debug_uartport=lsport,4 earlyprintk=uart8250-32bit,0x70006000 maxcpus=4 usbcore.old_scheme_first=1 lp0_vec=0x1000@0xff780000 core_edp_mv=1075 core_edp_ma=4000 tegra_fbmem=0x800000@0x92ca9000 is_hdmi_initialised=1 earlycon=uart8250,mmio32,0x70006000 fbcon=map:0' + MODULES_INITRD="jetson-nano-legacy" else if [[ $BOARD == nanopct4 ]]; then KERNELSOURCE='https://github.com/friendlyarm/kernel-rockchip' @@ -60,7 +68,7 @@ case $BRANCH in edge) KERNELPATCHDIR='media-'$BRANCH - KERNELBRANCH="tag:v5.19-rc6" + KERNELBRANCH="tag:v5.19-rc7" LINUXFAMILY=media LINUXCONFIG='linux-media-'$BRANCH SKIP_BOOTSPLASH="yes" diff --git a/patch/kernel/archive/media-5.19/990-sound-rk.patch b/patch/kernel/archive/media-5.19/990-sound-rk.patch new file mode 100644 index 0000000000..b2b90419b5 --- /dev/null +++ b/patch/kernel/archive/media-5.19/990-sound-rk.patch @@ -0,0 +1,269 @@ +--- a/sound/soc/rockchip/rockchip_i2s.c ++++ b/sound/soc/rockchip/rockchip_i2s.c +@@ -13,7 +13,6 @@ + #include + #include + #include +-#include + #include + #include + #include +@@ -55,39 +54,7 @@ + const struct rk_i2s_pins *pins; + unsigned int bclk_ratio; + spinlock_t lock; /* tx/rx lock */ +- struct pinctrl *pinctrl; +- struct pinctrl_state *bclk_on; +- struct pinctrl_state *bclk_off; +-}; +- +-static int i2s_pinctrl_select_bclk_on(struct rk_i2s_dev *i2s) +-{ +- int ret = 0; +- +- if (!IS_ERR(i2s->pinctrl) && !IS_ERR_OR_NULL(i2s->bclk_on)) +- ret = pinctrl_select_state(i2s->pinctrl, +- i2s->bclk_on); +- +- if (ret) +- dev_err(i2s->dev, "bclk enable failed %d\n", ret); +- +- return ret; +-} +- +-static int i2s_pinctrl_select_bclk_off(struct rk_i2s_dev *i2s) +-{ +- +- int ret = 0; +- +- if (!IS_ERR(i2s->pinctrl) && !IS_ERR_OR_NULL(i2s->bclk_off)) +- ret = pinctrl_select_state(i2s->pinctrl, +- i2s->bclk_off); +- +- if (ret) +- dev_err(i2s->dev, "bclk disable failed %d\n", ret); +- +- return ret; +-} ++}; + + static int i2s_runtime_suspend(struct device *dev) + { +@@ -125,49 +92,38 @@ + return snd_soc_dai_get_drvdata(dai); + } + +-static int rockchip_snd_txctrl(struct rk_i2s_dev *i2s, int on) ++static void rockchip_snd_txctrl(struct rk_i2s_dev *i2s, int on) + { + unsigned int val = 0; + int retry = 10; +- int ret = 0; + + spin_lock(&i2s->lock); + if (on) { +- ret = regmap_update_bits(i2s->regmap, I2S_DMACR, +- I2S_DMACR_TDE_ENABLE, I2S_DMACR_TDE_ENABLE); +- if (ret < 0) +- goto end; +- +- ret = regmap_update_bits(i2s->regmap, I2S_XFER, +- I2S_XFER_TXS_START | I2S_XFER_RXS_START, +- I2S_XFER_TXS_START | I2S_XFER_RXS_START); +- if (ret < 0) +- goto end; ++ regmap_update_bits(i2s->regmap, I2S_DMACR, ++ I2S_DMACR_TDE_ENABLE, I2S_DMACR_TDE_ENABLE); ++ ++ regmap_update_bits(i2s->regmap, I2S_XFER, ++ I2S_XFER_TXS_START | I2S_XFER_RXS_START, ++ I2S_XFER_TXS_START | I2S_XFER_RXS_START); + + i2s->tx_start = true; + } else { + i2s->tx_start = false; + +- ret = regmap_update_bits(i2s->regmap, I2S_DMACR, +- I2S_DMACR_TDE_ENABLE, I2S_DMACR_TDE_DISABLE); +- if (ret < 0) +- goto end; ++ regmap_update_bits(i2s->regmap, I2S_DMACR, ++ I2S_DMACR_TDE_ENABLE, I2S_DMACR_TDE_DISABLE); + + if (!i2s->rx_start) { +- ret = regmap_update_bits(i2s->regmap, I2S_XFER, +- I2S_XFER_TXS_START | +- I2S_XFER_RXS_START, +- I2S_XFER_TXS_STOP | +- I2S_XFER_RXS_STOP); +- if (ret < 0) +- goto end; ++ regmap_update_bits(i2s->regmap, I2S_XFER, ++ I2S_XFER_TXS_START | ++ I2S_XFER_RXS_START, ++ I2S_XFER_TXS_STOP | ++ I2S_XFER_RXS_STOP); + + udelay(150); +- ret = regmap_update_bits(i2s->regmap, I2S_CLR, +- I2S_CLR_TXC | I2S_CLR_RXC, +- I2S_CLR_TXC | I2S_CLR_RXC); +- if (ret < 0) +- goto end; ++ regmap_update_bits(i2s->regmap, I2S_CLR, ++ I2S_CLR_TXC | I2S_CLR_RXC, ++ I2S_CLR_TXC | I2S_CLR_RXC); + + regmap_read(i2s->regmap, I2S_CLR, &val); + +@@ -182,57 +138,44 @@ + } + } + } +-end: + spin_unlock(&i2s->lock); +- if (ret < 0) +- dev_err(i2s->dev, "lrclk update failed\n"); +- +- return ret; +-} +- +-static int rockchip_snd_rxctrl(struct rk_i2s_dev *i2s, int on) ++} ++ ++static void rockchip_snd_rxctrl(struct rk_i2s_dev *i2s, int on) + { + unsigned int val = 0; + int retry = 10; +- int ret = 0; + + spin_lock(&i2s->lock); + if (on) { +- ret = regmap_update_bits(i2s->regmap, I2S_DMACR, ++ regmap_update_bits(i2s->regmap, I2S_DMACR, + I2S_DMACR_RDE_ENABLE, I2S_DMACR_RDE_ENABLE); +- if (ret < 0) +- goto end; +- +- ret = regmap_update_bits(i2s->regmap, I2S_XFER, ++ ++ regmap_update_bits(i2s->regmap, I2S_XFER, + I2S_XFER_TXS_START | I2S_XFER_RXS_START, + I2S_XFER_TXS_START | I2S_XFER_RXS_START); +- if (ret < 0) +- goto end; + + i2s->rx_start = true; + } else { + i2s->rx_start = false; + +- ret = regmap_update_bits(i2s->regmap, I2S_DMACR, ++ regmap_update_bits(i2s->regmap, I2S_DMACR, + I2S_DMACR_RDE_ENABLE, I2S_DMACR_RDE_DISABLE); +- if (ret < 0) +- goto end; + + if (!i2s->tx_start) { +- ret = regmap_update_bits(i2s->regmap, I2S_XFER, ++ regmap_update_bits(i2s->regmap, I2S_XFER, + I2S_XFER_TXS_START | + I2S_XFER_RXS_START, + I2S_XFER_TXS_STOP | + I2S_XFER_RXS_STOP); +- if (ret < 0) +- goto end; ++ + udelay(150); +- ret = regmap_update_bits(i2s->regmap, I2S_CLR, ++ regmap_update_bits(i2s->regmap, I2S_CLR, + I2S_CLR_TXC | I2S_CLR_RXC, + I2S_CLR_TXC | I2S_CLR_RXC); +- if (ret < 0) +- goto end; ++ + regmap_read(i2s->regmap, I2S_CLR, &val); ++ + /* Should wait for clear operation to finish */ + while (val) { + regmap_read(i2s->regmap, I2S_CLR, &val); +@@ -244,12 +187,7 @@ + } + } + } +-end: + spin_unlock(&i2s->lock); +- if (ret < 0) +- dev_err(i2s->dev, "lrclk update failed\n"); +- +- return ret; + } + + static int rockchip_i2s_set_fmt(struct snd_soc_dai *cpu_dai, +@@ -487,26 +425,17 @@ + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) +- ret = rockchip_snd_rxctrl(i2s, 1); ++ rockchip_snd_rxctrl(i2s, 1); + else +- ret = rockchip_snd_txctrl(i2s, 1); +- /* Do not turn on bclk if lrclk open fails. */ +- if (ret < 0) +- return ret; +- i2s_pinctrl_select_bclk_on(i2s); ++ rockchip_snd_txctrl(i2s, 1); + break; + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: +- if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { +- if (!i2s->tx_start) +- i2s_pinctrl_select_bclk_off(i2s); +- ret = rockchip_snd_rxctrl(i2s, 0); +- } else { +- if (!i2s->rx_start) +- i2s_pinctrl_select_bclk_off(i2s); +- ret = rockchip_snd_txctrl(i2s, 0); +- } ++ if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) ++ rockchip_snd_rxctrl(i2s, 0); ++ else ++ rockchip_snd_txctrl(i2s, 0); + break; + default: + ret = -EINVAL; +@@ -807,33 +736,6 @@ + } + + i2s->bclk_ratio = 64; +- i2s->pinctrl = devm_pinctrl_get(&pdev->dev); +- if (IS_ERR(i2s->pinctrl)) +- dev_err(&pdev->dev, "failed to find i2s pinctrl\n"); +- +- i2s->bclk_on = pinctrl_lookup_state(i2s->pinctrl, +- "bclk_on"); +- if (IS_ERR_OR_NULL(i2s->bclk_on)) +- dev_err(&pdev->dev, "failed to find i2s default state\n"); +- else +- dev_dbg(&pdev->dev, "find i2s bclk state\n"); +- +- i2s->bclk_off = pinctrl_lookup_state(i2s->pinctrl, +- "bclk_off"); +- if (IS_ERR_OR_NULL(i2s->bclk_off)) +- dev_err(&pdev->dev, "failed to find i2s gpio state\n"); +- else +- dev_dbg(&pdev->dev, "find i2s bclk_off state\n"); +- +- i2s_pinctrl_select_bclk_off(i2s); +- +- i2s->playback_dma_data.addr = res->start + I2S_TXDR; +- i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; +- i2s->playback_dma_data.maxburst = 4; +- +- i2s->capture_dma_data.addr = res->start + I2S_RXDR; +- i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; +- i2s->capture_dma_data.maxburst = 4; + + dev_set_drvdata(&pdev->dev, i2s); + + diff --git a/patch/kernel/archive/station-p2-5.18/0450-v91-phy-rockchip-inno-usb2.patch b/patch/kernel/archive/station-p2-5.18/0450-v91-phy-rockchip-inno-usb2.patch deleted file mode 100644 index a73da3f207..0000000000 --- a/patch/kernel/archive/station-p2-5.18/0450-v91-phy-rockchip-inno-usb2.patch +++ /dev/null @@ -1,142 +0,0 @@ ---- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -@@ -116,11 +116,15 @@ - * @bvalid_det_en: vbus valid rise detection enable register. - * @bvalid_det_st: vbus valid rise detection status register. - * @bvalid_det_clr: vbus valid rise detection clear register. -+ * @id_det_en: id detection enable register. -+ * @id_det_st: id detection state register. -+ * @id_det_clr: id detection clear register. - * @ls_det_en: linestate detection enable register. - * @ls_det_st: linestate detection state register. - * @ls_det_clr: linestate detection clear register. - * @utmi_avalid: utmi vbus avalid status register. - * @utmi_bvalid: utmi vbus bvalid status register. -+ * @utmi_id: utmi id state register. - * @utmi_ls: utmi linestate state register. - * @utmi_hstdet: utmi host disconnect register. - */ -@@ -129,11 +133,15 @@ - struct usb2phy_reg bvalid_det_en; - struct usb2phy_reg bvalid_det_st; - struct usb2phy_reg bvalid_det_clr; -+ struct usb2phy_reg id_det_en; -+ struct usb2phy_reg id_det_st; -+ struct usb2phy_reg id_det_clr; - struct usb2phy_reg ls_det_en; - struct usb2phy_reg ls_det_st; - struct usb2phy_reg ls_det_clr; - struct usb2phy_reg utmi_avalid; - struct usb2phy_reg utmi_bvalid; -+ struct usb2phy_reg utmi_id; - struct usb2phy_reg utmi_ls; - struct usb2phy_reg utmi_hstdet; - }; -@@ -253,7 +261,7 @@ - return false; - - tmp = (orig & mask) >> reg->bitstart; -- return tmp == reg->enable; -+ return tmp != reg->disable; - } - - static int rockchip_usb2phy_clk480m_prepare(struct clk_hw *hw) -@@ -415,6 +423,19 @@ - - ret = property_enable(rphy->grf, - &rport->port_cfg->bvalid_det_en, -+ true); -+ if (ret) -+ goto out; -+ -+ /* clear id status and enable id detect irq */ -+ ret = property_enable(rphy->grf, -+ &rport->port_cfg->id_det_clr, -+ true); -+ if (ret) -+ goto out; -+ -+ ret = property_enable(rphy->grf, -+ &rport->port_cfg->id_det_en, - true); - if (ret) - goto out; -@@ -917,15 +938,36 @@ - return IRQ_HANDLED; - } - --static irqreturn_t rockchip_usb2phy_otg_mux_irq(int irq, void *data) -+static irqreturn_t rockchip_usb2phy_id_irq(int irq, void *data) - { - struct rockchip_usb2phy_port *rport = data; - struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent); -- -- if (property_enabled(rphy->grf, &rport->port_cfg->bvalid_det_st)) -- return rockchip_usb2phy_bvalid_irq(irq, data); -- else -+ bool id; -+ -+ if (!property_enabled(rphy->grf, &rport->port_cfg->id_det_st)) - return IRQ_NONE; -+ -+ mutex_lock(&rport->mutex); -+ -+ /* clear bvalid detect irq pending status */ -+ property_enable(rphy->grf, &rport->port_cfg->id_det_clr, true); -+ -+ mutex_unlock(&rport->mutex); -+ -+ id = property_enabled(rphy->grf, &rport->port_cfg->utmi_id); -+ extcon_set_state_sync(rphy->edev, EXTCON_USB_HOST, !id); -+ -+ return IRQ_HANDLED; -+} -+ -+static irqreturn_t rockchip_usb2phy_otg_mux_irq(int irq, void *data) -+{ -+ irqreturn_t ret = IRQ_NONE; -+ -+ ret |= rockchip_usb2phy_bvalid_irq(irq, data); -+ ret |= rockchip_usb2phy_id_irq(irq, data); -+ -+ return ret; - } - - static irqreturn_t rockchip_usb2phy_irq(int irq, void *data) -@@ -940,8 +982,14 @@ - if (!rport->phy) - continue; - -- /* Handle linestate irq for both otg port and host port */ -- ret = rockchip_usb2phy_linestate_irq(irq, rport); -+ switch (rport->port_id) { -+ case USB2PHY_PORT_OTG: -+ ret |= rockchip_usb2phy_otg_mux_irq(irq, rport); -+ break; -+ case USB2PHY_PORT_HOST: -+ ret |= rockchip_usb2phy_linestate_irq(irq, rport); -+ break; -+ } - } - - return ret; -@@ -1512,11 +1560,15 @@ - .port_cfgs = { - [USB2PHY_PORT_OTG] = { - .phy_sus = { 0x0000, 8, 0, 0, 0x1d1 }, -- .bvalid_det_en = { 0x0080, 2, 2, 0, 1 }, -- .bvalid_det_st = { 0x0084, 2, 2, 0, 1 }, -- .bvalid_det_clr = { 0x0088, 2, 2, 0, 1 }, -+ .bvalid_det_en = { 0x0080, 3, 2, 0, 0x3 }, -+ .bvalid_det_st = { 0x0084, 3, 2, 0, 0x3 }, -+ .bvalid_det_clr = { 0x0088, 3, 2, 0, 0x3 }, -+ .id_det_en = { 0x0080, 5, 4, 0, 0x3 }, -+ .id_det_st = { 0x0084, 5, 4, 0, 0x3 }, -+ .id_det_clr = { 0x0088, 5, 4, 0, 0x3 }, - .utmi_avalid = { 0x00c0, 10, 10, 0, 1 }, - .utmi_bvalid = { 0x00c0, 9, 9, 0, 1 }, -+ .utmi_id = { 0x00c0, 6, 6, 0, 1 }, - }, - [USB2PHY_PORT_HOST] = { - /* Select suspend control from controller */ - diff --git a/patch/u-boot/u-boot-media/160-enable-DT-overlays-support.patch b/patch/u-boot/u-boot-media/160-enable-DT-overlays-support.patch new file mode 100644 index 0000000000..3794a05c99 --- /dev/null +++ b/patch/u-boot/u-boot-media/160-enable-DT-overlays-support.patch @@ -0,0 +1,13 @@ +diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig +index 1f3fa15..f559fa4 100644 +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -1358,6 +1358,8 @@ config ARCH_ROCKCHIP + imply SYS_NS16550 + imply TPL_SYSRESET + imply USB_FUNCTION_FASTBOOT ++ select OF_LIBFDT ++ select OF_LIBFDT_OVERLAY + + config TARGET_THUNDERX_88XX + bool "Support ThunderX 88xx" diff --git a/patch/u-boot/u-boot-media/170-general-add-xtx-spi-nor-chips.patch b/patch/u-boot/u-boot-media/170-general-add-xtx-spi-nor-chips.patch new file mode 100644 index 0000000000..10315c1140 --- /dev/null +++ b/patch/u-boot/u-boot-media/170-general-add-xtx-spi-nor-chips.patch @@ -0,0 +1,33 @@ +diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig +index 018e8c59..8b0033b8 100644 +--- a/drivers/mtd/spi/Kconfig ++++ b/drivers/mtd/spi/Kconfig +@@ -152,6 +152,12 @@ config SPI_FLASH_XMC + Add support for various XMC (Wuhan Xinxin Semiconductor + Manufacturing Corp.) SPI flash chips (XM25xxx) + ++config SPI_FLASH_XTX ++ bool "XTX SPI flash support" ++ help ++ Add support for various XTX (Shenzhen Xin Tian Xia Tech) ++ SPI flash chips (XM25xxx) ++ + endif + + config SPI_FLASH_USE_4K_SECTORS +diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c +index 114ebacd..3526a20b 100644 +--- a/drivers/mtd/spi/spi-nor-ids.c ++++ b/drivers/mtd/spi/spi-nor-ids.c +@@ -319,6 +319,11 @@ const struct flash_info spi_nor_ids[] = { + /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ + { INFO("XM25QH64A", 0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, ++#endif ++#ifdef CONFIG_SPI_FLASH_XTX ++ /* XTX (Shenzhen Xin Tian Xia Tech) */ ++ { INFO("XT25F32B", 0x0b4016, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, ++ { INFO("XT25F128B", 0x0b4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + #endif + { }, + }; diff --git a/patch/u-boot/u-boot-media/180-rk3399-always-init-rkclk.patch b/patch/u-boot/u-boot-media/180-rk3399-always-init-rkclk.patch new file mode 100644 index 0000000000..1653fc1b93 --- /dev/null +++ b/patch/u-boot/u-boot-media/180-rk3399-always-init-rkclk.patch @@ -0,0 +1,22 @@ +This patch forces clk initialisation of rk3399 cpu in u-boot proper. + +Normally it should only be initialised in SPL as it is "time consuming". +Doing so however leaves cpus clocked to low frequencies +for Rockchip's DDR/loader/trust with mainline u-boot scenario +which does not involve SPL phase. + +Signed-off-by: Piotr Szczepanik + +diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c +index f8cbda44..687c3ad7 100644 +--- a/drivers/clk/rockchip/clk_rk3399.c ++++ b/drivers/clk/rockchip/clk_rk3399.c +@@ -1394,7 +1394,7 @@ static int rk3399_clk_probe(struct udevice *dev) + } + #endif + +- if (init_clocks) ++ if (init_clocks || 1 == 1) + rkclk_init(priv->cru); + + return 0; diff --git a/patch/u-boot/u-boot-media/190-rk3399-enable-stable-mac.patch b/patch/u-boot/u-boot-media/190-rk3399-enable-stable-mac.patch new file mode 100644 index 0000000000..5e2a9e431c --- /dev/null +++ b/patch/u-boot/u-boot-media/190-rk3399-enable-stable-mac.patch @@ -0,0 +1,15 @@ +diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h +index 126c3476..c6dccf4f 100644 +--- a/include/configs/rk3399_common.h ++++ b/include/configs/rk3399_common.h +@@ -19,6 +19,10 @@ + #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 + #define CONFIG_SYS_LOAD_ADDR 0x00800800 + ++#define CONFIG_MISC 1 ++#define CONFIG_MISC_INIT_R 1 ++#define CONFIG_ROCKCHIP_EFUSE 1 ++ + #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT) + #define CONFIG_SPL_STACK 0x00400000 + #define CONFIG_SPL_MAX_SIZE 0x40000 diff --git a/patch/u-boot/u-boot-media/200-rk3399-populate-child-node-of-syscon.patch b/patch/u-boot/u-boot-media/200-rk3399-populate-child-node-of-syscon.patch new file mode 100644 index 0000000000..3f36d5919f --- /dev/null +++ b/patch/u-boot/u-boot-media/200-rk3399-populate-child-node-of-syscon.patch @@ -0,0 +1,31 @@ +From 91cbd5f4fb25281319034c33b6e0c0f9b7d1e12b Mon Sep 17 00:00:00 2001 +Message-Id: <91cbd5f4fb25281319034c33b6e0c0f9b7d1e12b.1585676333.git.aditya@kobol.io> +In-Reply-To: +References: +From: Aditya Prayoga +Date: Wed, 4 Mar 2020 22:10:31 +0700 +Subject: [PATCH 4/4] arm:rockchip:rk3399: Populate child node of syscon + +U-Boot only populate first level of node. +Scan child node so device such as PHY can be initialized. +--- + arch/arm/mach-rockchip/rk3399/syscon_rk3399.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c +index 259ca44d68..81b04aa7f8 100644 +--- a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c ++++ b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c +@@ -21,6 +21,9 @@ U_BOOT_DRIVER(syscon_rk3399) = { + .name = "rk3399_syscon", + .id = UCLASS_SYSCON, + .of_match = rk3399_syscon_ids, ++#if !CONFIG_IS_ENABLED(OF_PLATDATA) ++ .bind = dm_scan_fdt_dev, ++#endif + }; + + #if CONFIG_IS_ENABLED(OF_PLATDATA) +-- +2.17.1 + diff --git a/patch/u-boot/u-boot-media/210-sdmmc-force-fifo-mode-in-spl.patch b/patch/u-boot/u-boot-media/210-sdmmc-force-fifo-mode-in-spl.patch new file mode 100644 index 0000000000..9b7354f97e --- /dev/null +++ b/patch/u-boot/u-boot-media/210-sdmmc-force-fifo-mode-in-spl.patch @@ -0,0 +1,22 @@ +From b0693aeb9ceab57ffc9d9f4ceca610bd82d5ca07 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Kamil=20Trzci=C5=84ski?= +Date: Mon, 21 May 2018 02:00:19 +0200 +Subject: [PATCH] ayufan: rock64: for SPL build always use fifo-mode + +Change-Id: I9ac012ce4aaf03a151f7c5c818829d631efdd7ed +diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c +index fc0f0fad76..d1f26e41fe 100644 +--- a/drivers/mmc/rockchip_dw_mmc.c ++++ b/drivers/mmc/rockchip_dw_mmc.c +@@ -70,7 +70,11 @@ static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev) + + if (priv->fifo_depth < 0) + return -EINVAL; ++#ifdef CONFIG_SPL_BUILD ++ priv->fifo_mode = true; // always force fifo mode ++#else + priv->fifo_mode = dev_read_bool(dev, "fifo-mode"); ++#endif + + /* + * 'clock-freq-min-max' is deprecated diff --git a/patch/u-boot/u-boot-media/220-u-boot-rk3399-roc-pc-plus.patch b/patch/u-boot/u-boot-media/220-u-boot-rk3399-roc-pc-plus.patch new file mode 100644 index 0000000000..1d2d55918a --- /dev/null +++ b/patch/u-boot/u-boot-media/220-u-boot-rk3399-roc-pc-plus.patch @@ -0,0 +1,95 @@ +new file mode 100644 +index 00000000..cf3462ea +--- /dev/null ++++ b/configs/roc-pc-plus-rk3399_defconfig +@@ -0,0 +1,89 @@ ++CONFIG_ARM=y ++CONFIG_SKIP_LOWLEVEL_INIT=y ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_SYS_TEXT_BASE=0x00200000 ++CONFIG_SPL_GPIO=y ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_ENV_SIZE=0x8000 ++CONFIG_ENV_OFFSET=0x3F8000 ++CONFIG_ENV_SECT_SIZE=0x1000 ++CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc-plus" ++CONFIG_ROCKCHIP_RK3399=y ++CONFIG_TARGET_ROC_PC_RK3399=y ++CONFIG_DEBUG_UART_BASE=0xFF1A0000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_SPL_SPI=y ++CONFIG_DEBUG_UART=y ++CONFIG_SYS_LOAD_ADDR=0x800800 ++# CONFIG_ANDROID_BOOT_IMAGE is not set ++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-plus.dtb" ++CONFIG_DISPLAY_BOARDINFO_LATE=y ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++CONFIG_SPL_STACK_R=y ++CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x20000 ++CONFIG_SPL_ENV_SUPPORT=y ++CONFIG_SPL_SPI_LOAD=y ++CONFIG_TPL=y ++CONFIG_CMD_BOOTZ=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_USB=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_TIME=y ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" ++CONFIG_ENV_IS_IN_SPI_FLASH=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_SPL_DM_SEQ_ALIAS=y ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_MISC=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_SF_DEFAULT_BUS=1 ++CONFIG_SPI_FLASH_WINBOND=y ++CONFIG_DM_ETH=y ++CONFIG_ETH_DESIGNWARE=y ++CONFIG_GMAC_ROCKCHIP=y ++CONFIG_NVME_PCI=y ++CONFIG_PCI=y ++CONFIG_PHY_ROCKCHIP_INNO_USB2=y ++CONFIG_PHY_ROCKCHIP_TYPEC=y ++CONFIG_PMIC_RK8XX=y ++CONFIG_REGULATOR_PWM=y ++CONFIG_REGULATOR_RK8XX=y ++CONFIG_PWM_ROCKCHIP=y ++# CONFIG_RAM_ROCKCHIP_DEBUG is not set ++CONFIG_RAM_RK3399_LPDDR4=y ++CONFIG_DM_RESET=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_ROCKCHIP_SPI=y ++CONFIG_SYSRESET=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_DWC3_GENERIC=y ++CONFIG_ROCKCHIP_USB2_PHY=y ++CONFIG_USB_KEYBOARD=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_HOST_ETHER=y ++CONFIG_USB_ETHER_ASIX=y ++CONFIG_USB_ETHER_ASIX88179=y ++CONFIG_USB_ETHER_MCS7830=y ++CONFIG_USB_ETHER_RTL8152=y ++CONFIG_USB_ETHER_SMSC95XX=y ++CONFIG_USB_GADGET=y ++CONFIG_DM_VIDEO=y ++CONFIG_DISPLAY=y ++CONFIG_VIDEO_ROCKCHIP=y ++CONFIG_DISPLAY_ROCKCHIP_HDMI=y ++CONFIG_SPL_TINY_MEMSET=y ++CONFIG_ERRNO_STR=y + diff --git a/patch/u-boot/u-boot-media/230-u-boot-rk3399-roc-pc-plus-dts.patch b/patch/u-boot/u-boot-media/230-u-boot-rk3399-roc-pc-plus-dts.patch new file mode 100644 index 0000000000..2166cd083b --- /dev/null +++ b/patch/u-boot/u-boot-media/230-u-boot-rk3399-roc-pc-plus-dts.patch @@ -0,0 +1,111 @@ +new file mode 100644 +index 00000000..02a8f9f5 +--- /dev/null ++++ b/arch/arm/dts/rk3399-roc-pc-plus.dts +@@ -0,0 +1,92 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd ++ */ ++ ++/dts-v1/; ++#include "rk3399-roc-pc.dtsi" ++ ++/ { ++ model = "Firefly ROC-RK3399-PC-PLUS Board"; ++ compatible = "firefly,roc-rk3399-pc-plus", "rockchip,rk3399"; ++ ++ vcc3v3_ngff: vcc3v3-ngff { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_ngff"; ++ enable-active-high; ++ gpio = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc3v3_ngff_en>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ vcc3v3_pcie: vcc3v3-pcie { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_pcie"; ++ enable-active-high; ++ gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc3v3_pcie_en>; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&dc_12v>; ++ }; ++}; ++ ++&pcie_phy { ++ status = "okay"; ++}; ++ ++&pcie0 { ++ ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; ++ num-lanes = <4>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_perst>; ++ vpcie3v3-supply = <&vcc3v3_pcie>; ++ vpcie1v8-supply = <&vcc1v8_pmu>; ++ vpcie0v9-supply = <&vcca_0v9>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ ngff { ++ vcc3v3_ngff_en: vcc3v3-ngff-en { ++ rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pcie { ++ vcc3v3_pcie_en: vcc3v3-pcie-en { ++ rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ pcie_perst: pcie-perst { ++ rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&sdio0 { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ cap-sdio-irq; ++ keep-power-in-suspend; ++ mmc-pwrseq = <&sdio_pwrseq>; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; ++ sd-uhs-sdr104; ++ vmmc-supply = <&vcc3v3_ngff>; ++ vqmmc-supply = <&vcc_1v8>; ++ status = "okay"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; ++ status = "okay"; ++}; + + +new file mode 100644 +index 00000000..02a8f9f5 +--- /dev/null ++++ b/arch/arm/dts/rk3399-roc-pc-plus-u-boot.dtsi +@@ -0,0 +1,6 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (c) 2020 Amarula Solutions(India) ++ */ ++ ++#include "rk3399-roc-pc-u-boot.dtsi" +