diff --git a/patch/kernel/sunxi-next/sunxi-network-dwmac-sun8i_backport_from_4.15-rc.patch b/patch/kernel/sunxi-next/sunxi-network-dwmac-sun8i_backport_from_4.15-rc.patch index 4aa835ad51..d54a8ee7ed 100644 --- a/patch/kernel/sunxi-next/sunxi-network-dwmac-sun8i_backport_from_4.15-rc.patch +++ b/patch/kernel/sunxi-next/sunxi-network-dwmac-sun8i_backport_from_4.15-rc.patch @@ -48,7 +48,7 @@ index 9703576..e28c0d2 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts @@ -70,12 +70,14 @@ - + status { label = "nanopi:blue:status"; - gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; @@ -56,7 +56,7 @@ index 9703576..e28c0d2 100644 + linux,default-trigger = "heartbeat"; }; }; - + reg_gmac_3v3: gmac-3v3 { compatible = "regulator-fixed"; + pinctrl-names = "default"; @@ -66,7 +66,7 @@ index 9703576..e28c0d2 100644 @@ -139,7 +141,7 @@ status = "okay"; }; - + -&mdio { +&external_mdio { ext_rgmii_phy: ethernet-phy@7 { @@ -81,78 +81,7 @@ index 9703576..e28c0d2 100644 + select MDIO_BUS_MUX ---help--- Support for Allwinner H3 A83T A64 EMAC ethernet controllers. - -diff --git a/drivers/net/ethernet/stmicro/stmmac/altr_tse_pcs.c b/drivers/net/ethernet/stmicro/stmmac/altr_tse_pcs.c -index 6a9c954..8b50afc 100644 ---- a/drivers/net/ethernet/stmicro/stmmac/altr_tse_pcs.c -+++ b/drivers/net/ethernet/stmicro/stmmac/altr_tse_pcs.c -@@ -118,10 +118,9 @@ int tse_pcs_init(void __iomem *base, struct tse_pcs *pcs) - return ret; - } - --static void pcs_link_timer_callback(unsigned long data) -+static void pcs_link_timer_callback(struct tse_pcs *pcs) - { - u16 val = 0; -- struct tse_pcs *pcs = (struct tse_pcs *)data; - void __iomem *tse_pcs_base = pcs->tse_pcs_base; - void __iomem *sgmii_adapter_base = pcs->sgmii_adapter_base; - -@@ -138,12 +137,11 @@ static void pcs_link_timer_callback(unsigned long data) - } - } - --static void auto_nego_timer_callback(unsigned long data) -+static void auto_nego_timer_callback(struct tse_pcs *pcs) - { - u16 val = 0; - u16 speed = 0; - u16 duplex = 0; -- struct tse_pcs *pcs = (struct tse_pcs *)data; - void __iomem *tse_pcs_base = pcs->tse_pcs_base; - void __iomem *sgmii_adapter_base = pcs->sgmii_adapter_base; - -@@ -201,14 +199,14 @@ static void auto_nego_timer_callback(unsigned long data) - } - } - --static void aneg_link_timer_callback(unsigned long data) -+static void aneg_link_timer_callback(struct timer_list *t) - { -- struct tse_pcs *pcs = (struct tse_pcs *)data; -+ struct tse_pcs *pcs = from_timer(pcs, t, aneg_link_timer); - - if (pcs->autoneg == AUTONEG_ENABLE) -- auto_nego_timer_callback(data); -+ auto_nego_timer_callback(pcs); - else if (pcs->autoneg == AUTONEG_DISABLE) -- pcs_link_timer_callback(data); -+ pcs_link_timer_callback(pcs); - } - - void tse_pcs_fix_mac_speed(struct tse_pcs *pcs, struct phy_device *phy_dev, -@@ -237,8 +235,8 @@ void tse_pcs_fix_mac_speed(struct tse_pcs *pcs, struct phy_device *phy_dev, - - tse_pcs_reset(tse_pcs_base, pcs); - -- setup_timer(&pcs->aneg_link_timer, -- aneg_link_timer_callback, (unsigned long)pcs); -+ timer_setup(&pcs->aneg_link_timer, aneg_link_timer_callback, -+ 0); - mod_timer(&pcs->aneg_link_timer, jiffies + - msecs_to_jiffies(AUTONEGO_LINK_TIMER)); - } else if (phy_dev->autoneg == AUTONEG_DISABLE) { -@@ -270,8 +268,8 @@ void tse_pcs_fix_mac_speed(struct tse_pcs *pcs, struct phy_device *phy_dev, - - tse_pcs_reset(tse_pcs_base, pcs); - -- setup_timer(&pcs->aneg_link_timer, -- aneg_link_timer_callback, (unsigned long)pcs); -+ timer_setup(&pcs->aneg_link_timer, aneg_link_timer_callback, -+ 0); - mod_timer(&pcs->aneg_link_timer, jiffies + - msecs_to_jiffies(AUTONEGO_LINK_TIMER)); - } + diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h index e82b4b7..e1e5ac0 100644 --- a/drivers/net/ethernet/stmicro/stmmac/common.h @@ -176,7 +105,7 @@ index 866444b..2c6d7c6 100644 @@ -51,15 +51,11 @@ #define NSS_COMMON_CLK_SRC_CTRL_RGMII(x) 1 #define NSS_COMMON_CLK_SRC_CTRL_SGMII(x) ((x >= 2) ? 1 : 0) - + -#define NSS_COMMON_MACSEC_CTL 0x28 -#define NSS_COMMON_MACSEC_CTL_EXT_BYPASS_EN(x) (1 << x) - @@ -186,19 +115,19 @@ index 866444b..2c6d7c6 100644 #define NSS_COMMON_GMAC_CTL_IFG_LIMIT_OFFSET 8 #define NSS_COMMON_GMAC_CTL_IFG_OFFSET 0 -#define NSS_COMMON_GMAC_CTL_IFG_MASK 0x3f - + #define NSS_COMMON_CLK_DIV_RGMII_1000 1 #define NSS_COMMON_CLK_DIV_RGMII_100 9 @@ -68,9 +64,6 @@ #define NSS_COMMON_CLK_DIV_SGMII_100 4 #define NSS_COMMON_CLK_DIV_SGMII_10 49 - + -#define QSGMII_PCS_MODE_CTL 0x68 -#define QSGMII_PCS_MODE_CTL_AUTONEG_EN(x) BIT((x * 8) + 7) - #define QSGMII_PCS_CAL_LCKDT_CTL 0x120 #define QSGMII_PCS_CAL_LCKDT_CTL_RST BIT(19) - + @@ -83,15 +76,10 @@ #define QSGMII_PHY_TX_DRIVER_EN BIT(3) #define QSGMII_PHY_QSGMII_EN BIT(7) @@ -212,7 +141,7 @@ index 866444b..2c6d7c6 100644 -#define QSGMII_PHY_CDR_PI_SLEW_MASK 0x3 #define QSGMII_PHY_TX_DRV_AMP_OFFSET 28 -#define QSGMII_PHY_TX_DRV_AMP_MASK 0xf - + struct ipq806x_gmac { struct platform_device *pdev; @@ -217,7 +205,7 @@ static int ipq806x_gmac_of_parse(struct ipq806x_gmac *gmac) @@ -286,7 +215,7 @@ index fffd6d5..9eb7f65 100644 + bool internal_phy_powered; + void *mux_handle; }; - + static const struct emac_variant emac_variant_h3 = { .default_syscon_value = 0x58000, - .internal_phy = PHY_INTERFACE_MODE_MII, @@ -295,14 +224,14 @@ index fffd6d5..9eb7f65 100644 .support_rmii = true, .support_rgmii = true @@ -83,20 +86,20 @@ static const struct emac_variant emac_variant_h3 = { - + static const struct emac_variant emac_variant_v3s = { .default_syscon_value = 0x38000, - .internal_phy = PHY_INTERFACE_MODE_MII, + .soc_has_internal_phy = true, .support_mii = true }; - + static const struct emac_variant emac_variant_a83t = { .default_syscon_value = 0, - .internal_phy = 0, @@ -310,7 +239,7 @@ index fffd6d5..9eb7f65 100644 .support_mii = true, .support_rgmii = true }; - + static const struct emac_variant emac_variant_a64 = { .default_syscon_value = 0, - .internal_phy = 0, @@ -325,13 +254,13 @@ index fffd6d5..9eb7f65 100644 +#define H3_EPHY_MUX_MASK (H3_EPHY_SHUTDOWN | H3_EPHY_SELECT) +#define DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID 1 +#define DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID 2 - + /* H3/A64 specific bits */ #define SYSCON_RMII_EN BIT(13) /* 1: enable RMII (overrides EPIT) */ @@ -634,6 +640,159 @@ static int sun8i_dwmac_reset(struct stmmac_priv *priv) return 0; } - + +/* Search in mdio-mux node for internal PHY node and get its clk/reset */ +static int get_ephy_nodes(struct stmmac_priv *priv) +{ @@ -491,7 +420,7 @@ index fffd6d5..9eb7f65 100644 @@ -648,35 +807,24 @@ static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv) "Current syscon value is not the default %x (expect %x)\n", val, reg); - + - if (gmac->variant->internal_phy) { - if (!gmac->use_internal_phy) { - /* switch to external PHY interface */ @@ -539,12 +468,12 @@ index fffd6d5..9eb7f65 100644 + */ + reg |= 1 << H3_EPHY_ADDR_SHIFT; } - + if (!of_property_read_u32(node, "allwinner,tx-delay-ps", &val)) { @@ -746,81 +894,21 @@ static void sun8i_dwmac_unset_syscon(struct sunxi_priv_data *gmac) regmap_write(gmac->regmap, SYSCON_EMAC_REG, reg); } - + -static int sun8i_dwmac_power_internal_phy(struct stmmac_priv *priv) +static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv) { @@ -565,7 +494,7 @@ index fffd6d5..9eb7f65 100644 - */ - reset_control_assert(gmac->rst_ephy); + struct sunxi_priv_data *gmac = priv; - + - ret = reset_control_deassert(gmac->rst_ephy); - if (ret) { - dev_err(priv->device, "Cannot deassert ephy\n"); @@ -578,7 +507,7 @@ index fffd6d5..9eb7f65 100644 + if (gmac->internal_phy_powered) + sun8i_dwmac_unpower_internal_phy(gmac); } - + - return 0; -} - @@ -626,33 +555,33 @@ index fffd6d5..9eb7f65 100644 -static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv) -{ - struct sunxi_priv_data *gmac = priv; - + - sun8i_unpower_phy(gmac); + reset_control_put(gmac->rst_ephy); - + clk_disable_unprepare(gmac->tx_clk); - + @@ -849,7 +937,7 @@ static struct mac_device_info *sun8i_dwmac_setup(void *ppriv) if (!mac) return NULL; - + - ret = sun8i_power_phy(priv); + ret = sun8i_dwmac_set_syscon(priv); if (ret) return NULL; - + @@ -889,6 +977,8 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) struct sunxi_priv_data *gmac; struct device *dev = &pdev->dev; int ret; + struct stmmac_priv *priv; + struct net_device *ndev; - + ret = stmmac_get_platform_resources(pdev, &stmmac_res); if (ret) @@ -932,29 +1022,6 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) } - + plat_dat->interface = of_get_phy_mode(dev->of_node); - if (plat_dat->interface == gmac->variant->internal_phy) { - dev_info(&pdev->dev, "Will use internal PHY\n"); @@ -677,11 +606,11 @@ index fffd6d5..9eb7f65 100644 - dev_info(&pdev->dev, "Will use external PHY\n"); - gmac->use_internal_phy = false; - } - + /* platform data specifying hardware features and callbacks. * hardware features were copied from Allwinner drivers. @@ -973,9 +1040,34 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) - + ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); if (ret) - sun8i_dwmac_exit(pdev, plat_dat->bsp_priv); @@ -706,7 +635,7 @@ index fffd6d5..9eb7f65 100644 + if (ret) + goto dwmac_exit; + } - + return ret; +dwmac_mux: + sun8i_dwmac_unset_syscon(gmac); @@ -714,7 +643,7 @@ index fffd6d5..9eb7f65 100644 + sun8i_dwmac_exit(pdev, plat_dat->bsp_priv); +return ret; } - + static const struct of_device_id sun8i_dwmac_match[] = { diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h index d74cedf..789dad8 100644 @@ -723,10 +652,10 @@ index d74cedf..789dad8 100644 @@ -98,7 +98,7 @@ #define GMAC_PCS_IRQ_DEFAULT (GMAC_INT_RGSMIIS | GMAC_INT_PCS_LINK | \ GMAC_INT_PCS_ANE) - + -#define GMAC_INT_DEFAULT_MASK GMAC_INT_PMT_EN +#define GMAC_INT_DEFAULT_MASK (GMAC_INT_PMT_EN | GMAC_INT_LPI_EN) - + enum dwmac4_irq_status { time_stamp_irq = 0x00001000, @@ -106,6 +106,7 @@ enum dwmac4_irq_status { @@ -736,7 +665,7 @@ index d74cedf..789dad8 100644 + lpi_irq = 0x00000020, pmt_irq = 0x00000010, }; - + @@ -132,6 +133,10 @@ enum power_event { #define GMAC4_LPI_CTRL_STATUS_LPITXA BIT(19) /* Enable LPI TX Automate */ #define GMAC4_LPI_CTRL_STATUS_PLS BIT(17) /* PHY Link Status */ @@ -745,18 +674,18 @@ index d74cedf..789dad8 100644 +#define GMAC4_LPI_CTRL_STATUS_RLPIEN BIT(2) /* Receive LPI Entry */ +#define GMAC4_LPI_CTRL_STATUS_TLPIEX BIT(1) /* Transmit LPI Exit */ +#define GMAC4_LPI_CTRL_STATUS_TLPIEN BIT(0) /* Transmit LPI Entry */ - + /* MAC Debug bitmap */ #define GMAC_DEBUG_TFCSTS_MASK GENMASK(18, 17) @@ -225,6 +230,8 @@ enum power_event { #define MTL_CHAN_RX_DEBUG(x) (MTL_CHANX_BASE_ADDR(x) + 0x38) - + #define MTL_OP_MODE_RSF BIT(5) +#define MTL_OP_MODE_TXQEN_MASK GENMASK(3, 2) +#define MTL_OP_MODE_TXQEN_AV BIT(2) #define MTL_OP_MODE_TXQEN BIT(3) #define MTL_OP_MODE_TSF BIT(1) - + diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c index 2f7d7ec..f3ed8f7 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c @@ -764,7 +693,7 @@ index 2f7d7ec..f3ed8f7 100644 @@ -580,6 +580,25 @@ static int dwmac4_irq_status(struct mac_device_info *hw, x->irq_receive_pmt_irq_n++; } - + + /* MAC tx/rx EEE LPI entry/exit interrupts */ + if (intr_status & lpi_irq) { + /* Clear LPI interrupt by reading MAC_LPI_Control_Status */ @@ -793,7 +722,7 @@ index e84831e..c110f68 100644 +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c @@ -191,7 +191,7 @@ static void dwmac4_rx_watchdog(void __iomem *ioaddr, u32 riwt, u32 number_chan) } - + static void dwmac4_dma_rx_chan_op_mode(void __iomem *ioaddr, int mode, - u32 channel, int fifosz) + u32 channel, int fifosz, u8 qmode) @@ -803,7 +732,7 @@ index e84831e..c110f68 100644 @@ -218,8 +218,10 @@ static void dwmac4_dma_rx_chan_op_mode(void __iomem *ioaddr, int mode, mtl_rx_op &= ~MTL_OP_MODE_RQS_MASK; mtl_rx_op |= rqs << MTL_OP_MODE_RQS_SHIFT; - + - /* enable flow control only if each channel gets 4 KiB or more FIFO */ - if (fifosz >= 4096) { + /* Enable flow control only if each channel gets 4 KiB or more FIFO and @@ -811,18 +740,18 @@ index e84831e..c110f68 100644 + */ + if ((fifosz >= 4096) && (qmode != MTL_QUEUE_AVB)) { unsigned int rfd, rfa; - + mtl_rx_op |= MTL_OP_MODE_EHFC; @@ -271,9 +273,10 @@ static void dwmac4_dma_rx_chan_op_mode(void __iomem *ioaddr, int mode, } - + static void dwmac4_dma_tx_chan_op_mode(void __iomem *ioaddr, int mode, - u32 channel) + u32 channel, int fifosz, u8 qmode) { u32 mtl_tx_op = readl(ioaddr + MTL_CHAN_TX_OP_MODE(channel)); + unsigned int tqs = fifosz / 256 - 1; - + if (mode == SF_DMA_MODE) { pr_debug("GMAC: enable TX store and forward mode\n"); @@ -306,12 +309,18 @@ static void dwmac4_dma_tx_chan_op_mode(void __iomem *ioaddr, int mode, @@ -848,35 +777,11 @@ index e84831e..c110f68 100644 + writel(mtl_tx_op, ioaddr + MTL_CHAN_TX_OP_MODE(channel)); } - + diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 16bd509..d725053 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -@@ -345,9 +345,9 @@ void stmmac_disable_eee_mode(struct stmmac_priv *priv) - * if there is no data transfer and if we are not in LPI state, - * then MAC Transmitter can be moved to LPI state. - */ --static void stmmac_eee_ctrl_timer(unsigned long arg) -+static void stmmac_eee_ctrl_timer(struct timer_list *t) - { -- struct stmmac_priv *priv = (struct stmmac_priv *)arg; -+ struct stmmac_priv *priv = from_timer(priv, t, eee_ctrl_timer); - - stmmac_enable_eee_mode(priv); - mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(eee_timer)); -@@ -401,9 +401,8 @@ bool stmmac_eee_init(struct stmmac_priv *priv) - spin_lock_irqsave(&priv->lock, flags); - if (!priv->eee_active) { - priv->eee_active = 1; -- setup_timer(&priv->eee_ctrl_timer, -- stmmac_eee_ctrl_timer, -- (unsigned long)priv); -+ timer_setup(&priv->eee_ctrl_timer, -+ stmmac_eee_ctrl_timer, 0); - mod_timer(&priv->eee_ctrl_timer, - STMMAC_LPI_T(eee_timer)); - @@ -1749,12 +1748,20 @@ static void stmmac_dma_operation_mode(struct stmmac_priv *priv) u32 rx_channels_count = priv->plat->rx_queues_to_use; u32 tx_channels_count = priv->plat->tx_queues_to_use; @@ -886,7 +791,7 @@ index 16bd509..d725053 100644 u32 rxmode = 0; u32 chan = 0; + u8 qmode = 0; - + if (rxfifosz == 0) rxfifosz = priv->dma_cap.rx_fifo_size; + if (txfifosz == 0) @@ -895,11 +800,11 @@ index 16bd509..d725053 100644 + /* Adjust for real per queue fifo size */ + rxfifosz /= rx_channels_count; + txfifosz /= tx_channels_count; - + if (priv->plat->force_thresh_dma_mode) { txmode = tc; @@ -1777,12 +1784,19 @@ static void stmmac_dma_operation_mode(struct stmmac_priv *priv) - + /* configure all channels */ if (priv->synopsys_id >= DWMAC_CORE_4_00) { - for (chan = 0; chan < rx_channels_count; chan++) @@ -910,7 +815,7 @@ index 16bd509..d725053 100644 - rxfifosz); + rxfifosz, qmode); + } - + - for (chan = 0; chan < tx_channels_count; chan++) - priv->hw->dma->dma_tx_mode(priv->ioaddr, txmode, chan); + for (chan = 0; chan < tx_channels_count; chan++) { @@ -932,7 +837,7 @@ index 16bd509..d725053 100644 + u32 tx_channels_count = priv->plat->tx_queues_to_use; int rxfifosz = priv->plat->rx_fifo_size; + int txfifosz = priv->plat->tx_fifo_size; - + if (rxfifosz == 0) rxfifosz = priv->dma_cap.rx_fifo_size; + if (txfifosz == 0) @@ -941,7 +846,7 @@ index 16bd509..d725053 100644 + /* Adjust for real per queue fifo size */ + rxfifosz /= rx_channels_count; + txfifosz /= tx_channels_count; - + if (priv->synopsys_id >= DWMAC_CORE_4_00) { priv->hw->dma->dma_rx_mode(priv->ioaddr, rxmode, chan, - rxfifosz); @@ -952,42 +857,10 @@ index 16bd509..d725053 100644 } else { priv->hw->dma->dma_mode(priv->ioaddr, txmode, rxmode, rxfifosz); -@@ -2194,9 +2220,9 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv) - * Description: - * This is the timer handler to directly invoke the stmmac_tx_clean. - */ --static void stmmac_tx_timer(unsigned long data) -+static void stmmac_tx_timer(struct timer_list *t) - { -- struct stmmac_priv *priv = (struct stmmac_priv *)data; -+ struct stmmac_priv *priv = from_timer(priv, t, txtimer); - u32 tx_queues_count = priv->plat->tx_queues_to_use; - u32 queue; - -@@ -2217,10 +2243,8 @@ static void stmmac_init_tx_coalesce(struct stmmac_priv *priv) - { - priv->tx_coal_frames = STMMAC_TX_FRAMES; - priv->tx_coal_timer = STMMAC_COAL_TX_TIMER; -- init_timer(&priv->txtimer); -+ timer_setup(&priv->txtimer, stmmac_tx_timer, 0); - priv->txtimer.expires = STMMAC_COAL_TIMER(priv->tx_coal_timer); -- priv->txtimer.data = (unsigned long)priv; -- priv->txtimer.function = stmmac_tx_timer; - add_timer(&priv->txtimer); - } - -@@ -2564,6 +2588,7 @@ static int stmmac_open(struct net_device *dev) - - priv->dma_buf_sz = STMMAC_ALIGN(buf_sz); - priv->rx_copybreak = STMMAC_RX_COPYBREAK; -+ priv->mss = 0; - - ret = alloc_dma_desc_resources(priv); - if (ret < 0) { @@ -3724,6 +3749,20 @@ static int stmmac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) return ret; } - + +static int stmmac_set_mac_address(struct net_device *ndev, void *addr) +{ + struct stmmac_priv *priv = netdev_priv(ndev); @@ -1004,7 +877,7 @@ index 16bd509..d725053 100644 + #ifdef CONFIG_DEBUG_FS static struct dentry *stmmac_fs_dir; - + @@ -3951,7 +3990,7 @@ static const struct net_device_ops stmmac_netdev_ops = { #ifdef CONFIG_NET_POLL_CONTROLLER .ndo_poll_controller = stmmac_poll_controller, @@ -1012,7 +885,7 @@ index 16bd509..d725053 100644 - .ndo_set_mac_address = eth_mac_addr, + .ndo_set_mac_address = stmmac_set_mac_address, }; - + /** diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c index 195eb7e..05f122b 100644 @@ -1028,4 +901,4 @@ index 195eb7e..05f122b 100644 - { .compatible = "allwinner,sun50i-a64-emac" }, {}, }; - +