diff --git a/patch/kernel/sunxi-dev/board-h3-add-rtc-osc32k-out.patch b/patch/kernel/sunxi-dev/board-h3-add-rtc-osc32k-out.patch
new file mode 100644
index 0000000000..f9d2cc8b90
--- /dev/null
+++ b/patch/kernel/sunxi-dev/board-h3-add-rtc-osc32k-out.patch
@@ -0,0 +1,28 @@
+diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+index c3bff11..48b8447 100644
+--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+@@ -96,6 +112,13 @@
+ 			clock-output-names = "osc32k";
+ 		};
+ 
++		ext_osc32k: ext_osc32k_clk {
++			#clock-cells = <0>;
++			compatible = "fixed-clock";
++			clock-frequency = <32768>;
++			clock-output-names = "ext_osc32k";
++		};
++
+ 		iosc: internal-osc-clk {
+ 			#clock-cells = <0>;
+ 			compatible = "fixed-clock";
+@@ -795,6 +861,9 @@
+ 			reg = <0x01f00000 0x54>;
+ 			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ 				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
++			clock-output-names = "rtc-osc32k", "rtc-osc32k-out";
++			clocks = <&ext_osc32k>;
++			#clock-cells = <1>;
+ 		};
+ 
+ 		r_ccu: clock@1f01400 {
diff --git a/patch/kernel/sunxi-dev/fix-bananam2ultra-missing-clk-out-a.patch b/patch/kernel/sunxi-dev/fix-bananam2ultra-missing-clk-out-a.patch
new file mode 100644
index 0000000000..5a52962e88
--- /dev/null
+++ b/patch/kernel/sunxi-dev/fix-bananam2ultra-missing-clk-out-a.patch
@@ -0,0 +1,42 @@
+diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
+index bd97ca3..a8a522f 100644
+--- a/arch/arm/boot/dts/sun8i-r40.dtsi
++++ b/arch/arm/boot/dts/sun8i-r40.dtsi
+@@ -68,6 +71,23 @@
+ 			clock-frequency = <32768>;
+ 			clock-output-names = "osc32k";
+ 		};
++
++		osc24M_32k: clk@1 {
++			#clock-cells = <0>;
++			compatible = "fixed-factor-clock";
++			clock-div = <732>;
++			clock-mult = <1>;
++			clocks = <&osc24M>;
++			clock-output-names = "osc24M_32k";
++		};
++
++		clk_out_a: clk@01c201f0 {
++			#clock-cells = <0>;
++			compatible = "allwinner,sun7i-a20-out-clk";
++			reg = <0x01c201f0 0x4>;
++			clocks = <&osc24M_32k>, <&osc32k>, <&osc24M>;
++			clock-output-names = "clk_out_a";
++		};
+ 	};
+ 
+ 	cpus {
+@@ -265,6 +340,13 @@
+ 			#interrupt-cells = <3>;
+ 			#gpio-cells = <3>;
+ 
++			clk_out_a_pin: clk-out-a-pin {
++				pins = "PI12";
++				function = "clk_out_a";
++				drive = <0>;
++				pull = <0>;
++			};
++
+ 			gmac_rgmii_pins: gmac-rgmii-pins {
+ 				pins = "PA0", "PA1", "PA2", "PA3",
+ 				       "PA4", "PA5", "PA6", "PA7",
diff --git a/patch/kernel/sunxi-dev/fix-bananapi-m2-plus-wifi.patch b/patch/kernel/sunxi-dev/fix-bananapi-m2-plus-wifi.patch
new file mode 100644
index 0000000000..2ea348aa49
--- /dev/null
+++ b/patch/kernel/sunxi-dev/fix-bananapi-m2-plus-wifi.patch
@@ -0,0 +1,13 @@
+diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+index 195a75d..f3f324e 100644
+--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
++++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+@@ -48,3 +48,8 @@
+ 	model = "Banana Pi BPI-M2-Plus H3";
+ 	compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
+ };
++
++&wifi_pwrseq {
++		clocks = <&rtc 1>;
++		clock-names = "ext_clock";
++};
diff --git a/patch/kernel/sunxi-dev/fix-bananapi-m2-ultra-wifi.patch b/patch/kernel/sunxi-dev/fix-bananapi-m2-ultra-wifi.patch
new file mode 100644
index 0000000000..b3711d351b
--- /dev/null
+++ b/patch/kernel/sunxi-dev/fix-bananapi-m2-ultra-wifi.patch
@@ -0,0 +1,108 @@
+diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
+index 438b7b4..829c67a 100644
+--- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
++++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
+@@ -102,6 +102,8 @@
+ 	wifi_pwrseq: wifi_pwrseq {
+ 		compatible = "mmc-pwrseq-simple";
+ 		reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 WIFI_EN */
++		clocks = <&ccu CLK_OUTA>;
++		clock-names = "ext_clock";
+ 	};
+ };
+ 
+@@ -178,6 +180,15 @@
+ 	bus-width = <4>;
+ 	non-removable;
+ 	status = "okay";
++
++	brcmf: bcrmf@1 {
++		reg = <1>;
++		compatible = "brcm,bcm4329-fmac";
++		interrupt-names = "host-wake";
++		clocks = <&clk_out_a>;
++		pinctrl-0 = <&clk_out_a_pin>;
++		pinctrl-names = "default";
++	};
+ };
+ 
+ &mmc2 {
+@@ -196,6 +207,11 @@
+ 	status = "okay";
+ };
+ 
++&pio {
++        pinctrl-names = "default";
++        pinctrl-0 = <&clk_out_a_pin>;
++};
++
+ &reg_aldo2 {
+ 	regulator-always-on;
+ 	regulator-min-microvolt = <2500000>;
+@@ -251,11 +267,19 @@
+ };
+ 
+ &reg_dldo2 {
++	regulator-always-on;
+ 	regulator-min-microvolt = <3300000>;
+ 	regulator-max-microvolt = <3300000>;
+ 	regulator-name = "vcc-wifi";
+ };
+ 
++&reg_dldo3 {
++        regulator-always-on;
++        regulator-min-microvolt = <3300000>;
++        regulator-max-microvolt = <3300000>;
++        regulator-name = "vcc-wifi-2";
++}; 
++
+ &reg_dldo4 {
+ 	regulator-min-microvolt = <2500000>;
+ 	regulator-max-microvolt = <2500000>;
+@@ -278,6 +302,25 @@
+ 	status = "okay";
+ };
+ 
++&uart3 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart3_pg_pins>, <&uart3_rts_cts_pg_pins>;
++	uart-has-rtscts;
++	status = "okay";
++
++	bluetooth {
++		compatible = "brcm,bcm43438-bt";
++		clocks = <&ccu CLK_OUTA>;
++		clock-names = "lpo";
++		vbat-supply = <&reg_dldo2>;
++		vddio-supply = <&reg_dldo1>;
++		device-wakeup-gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
++		/* TODO host wake line connected to PMIC GPIO pins */
++		shutdown-gpios = <&pio 7 12 GPIO_ACTIVE_HIGH>; /* PH12 */
++		max-speed = <1500000>;
++	};
++};
++
+ &usbphy {
+ 	usb1_vbus-supply = <&reg_vcc5v0>;
+ 	usb2_vbus-supply = <&reg_vcc5v0>;
+diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
+index 6f4c9ca..0781b85 100644
+--- a/arch/arm/boot/dts/sun8i-r40.dtsi
++++ b/arch/arm/boot/dts/sun8i-r40.dtsi
+@@ -377,6 +401,16 @@
+ 				pins = "PB22", "PB23";
+ 				function = "uart0";
+ 			};
++
++			uart3_pg_pins: uart3-pg-pins {
++				pins = "PG6", "PG7";
++				function = "uart3";
++			};
++
++			uart3_rts_cts_pg_pins: uart3-rts-cts-pg-pins {
++				pins = "PG8", "PG9";
++				function = "uart3";
++			};
+ 		};
+ 
+ 		wdt: watchdog@1c20c90 {
diff --git a/patch/kernel/sunxi-dev/wifi-bt-bananapi-m2-plus.patch b/patch/kernel/sunxi-dev/wifi-bt-bananapi-m2-plus.patch
new file mode 100644
index 0000000000..5cb15c9b2d
--- /dev/null
+++ b/patch/kernel/sunxi-dev/wifi-bt-bananapi-m2-plus.patch
@@ -0,0 +1,34 @@
+diff --git a/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
+index b3283ae..46a1507 100644
+--- a/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
++++ b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
+@@ -103,6 +103,8 @@
+ 		compatible = "mmc-pwrseq-simple";
+ 		pinctrl-names = "default";
+ 		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
++		clocks = <&rtc 1>;
++		clock-names = "ext_clock";
+ 	};
+ };
+ 
+@@ -215,7 +217,19 @@
+ &uart1 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+-	status = "okay";
++	uart-has-rtscts;
++	status = "okay";
++
++	bluetooth { 
++		compatible = "brcm,bcm43438-bt";
++		clocks = <&rtc 1>;
++		clock-names = "lpo";
++		vbat-supply = <&reg_vcc3v3>;
++		vddio-supply = <&reg_vcc3v3>;
++		device-wakeup-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
++		host-wakeup-gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
++		shutdown-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
++	};
+ };
+ 
+ &usb_otg {