From b8844c9e736994191459fb3acc0e2545cdd296ed Mon Sep 17 00:00:00 2001 From: Igor Pecovnik Date: Sun, 29 Jun 2025 15:11:00 +0200 Subject: [PATCH] Inovato quadra bootfix, bump uboot for zero3, 2w, add 1.5Gb support, bump atf --- config/boards/inovato-quadra.conf | 9 +- config/boards/orangepizero2w.csc | 5 +- config/boards/orangepizero3.csc | 4 +- config/boards/zeropi.csc | 6 +- .../families/include/sunxi64_common.inc | 2 +- ...nxi-h616-dram-support-1.5GB-RAM-size.patch | 202 ++++++++++++++++++ 6 files changed, 218 insertions(+), 10 deletions(-) create mode 100644 patch/u-boot/v2025-sunxi/0009-sunxi-h616-dram-support-1.5GB-RAM-size.patch diff --git a/config/boards/inovato-quadra.conf b/config/boards/inovato-quadra.conf index 54443537ed..0740343466 100644 --- a/config/boards/inovato-quadra.conf +++ b/config/boards/inovato-quadra.conf @@ -1,12 +1,15 @@ # Allwinner H6 quad core 2GB SoC WiFi eMMC BOARD_NAME="Inovato Quadra" BOARDFAMILY="sun50iw6" -BOARD_MAINTAINER="NicoD-SBC" +BOARD_MAINTAINER="igorpecovnik" BOOTCONFIG="tanix_tx6_defconfig" CRUSTCONFIG="tanix_tx6_defconfig" -BOOT_FDT_FILE="sun50i-h6-inovato-quadra.dtb" -KERNEL_TARGET="legacy,current,edge" +BOOT_FDT_FILE="allwinner/sun50i-h6-inovato-quadra.dtb" +KERNEL_TARGET="current,edge" KERNEL_TEST_TARGET="current" +#BOOTBRANCH="tag:v2025.04" +#BOOTPATCHDIR="v2025-sunxi" +#OVERLAY_PREFIX="sun50i-h6" BOOT_LOGO="desktop" FULL_DESKTOP="yes" SRC_EXTLINUX="yes" diff --git a/config/boards/orangepizero2w.csc b/config/boards/orangepizero2w.csc index f8c4cbdcc1..4ff8afe1a5 100644 --- a/config/boards/orangepizero2w.csc +++ b/config/boards/orangepizero2w.csc @@ -3,9 +3,8 @@ BOARD_NAME="Orange Pi Zero2W" BOARDFAMILY="sun50iw9" BOARD_MAINTAINER="chraac" BOOTCONFIG="orangepi_zero2w_defconfig" -BOOTBRANCH="tag:v2024.04" -BOOTPATCHDIR="v2024.04" -BOOTDIR="u-boot-${BOARD}" # do not share u-boot directory +BOOTBRANCH="tag:v2025.04" +BOOTPATCHDIR="v2025-sunxi" BOOT_LOGO="desktop" OVERLAY_PREFIX="sun50i-h616" KERNEL_TARGET="current,edge" diff --git a/config/boards/orangepizero3.csc b/config/boards/orangepizero3.csc index f6d11af509..ee4602846c 100644 --- a/config/boards/orangepizero3.csc +++ b/config/boards/orangepizero3.csc @@ -3,8 +3,10 @@ BOARD_NAME="Orange Pi Zero3" BOARDFAMILY="sun50iw9" BOARD_MAINTAINER="alexl83 chraac" BOOTCONFIG="orangepi_zero3_defconfig" -OVERLAY_PREFIX="sun50i-h616" +BOOTBRANCH="tag:v2025.04" +BOOTPATCHDIR="v2025-sunxi" BOOT_LOGO="desktop" +OVERLAY_PREFIX="sun50i-h616" KERNEL_TARGET="current,edge" KERNEL_TEST_TARGET="current" FORCE_BOOTSCRIPT_UPDATE="yes" diff --git a/config/boards/zeropi.csc b/config/boards/zeropi.csc index 313407683c..baa1e2c4fa 100644 --- a/config/boards/zeropi.csc +++ b/config/boards/zeropi.csc @@ -4,9 +4,11 @@ BOARDFAMILY="sun8i" BOARD_MAINTAINER="" BOOTCONFIG="zeropi_defconfig" DEFAULT_OVERLAYS="usbhost1 usbhost2" +BOOTBRANCH="tag:v2025.04" +BOOTPATCHDIR="v2025-sunxi" MODULES_BLACKLIST="lima" DEFAULT_CONSOLE="serial" SERIALCON="ttyS0" HAS_VIDEO_OUTPUT="no" -KERNEL_TARGET="legacy,current,edge" -KERNEL_TEST_TARGET="legacy" +KERNEL_TARGET="current,edge" +KERNEL_TEST_TARGET="current" diff --git a/config/sources/families/include/sunxi64_common.inc b/config/sources/families/include/sunxi64_common.inc index f4a7a34fb1..f2f736d510 100644 --- a/config/sources/families/include/sunxi64_common.inc +++ b/config/sources/families/include/sunxi64_common.inc @@ -9,7 +9,7 @@ enable_extension "sunxi-tools" declare -g ARCH=arm64 declare -g ATF_TARGET_MAP="PLAT=$ATF_PLAT DEBUG=1 bl31;;build/$ATF_PLAT/debug/bl31.bin" -declare -g ATFBRANCH="tag:lts-v2.12.1" +declare -g ATFBRANCH="tag:lts-v2.12.4" declare -g BOOTDELAY=1 declare -g BOOTPATCHDIR="${BOOTPATCHDIR:-"u-boot-sunxi"}" declare -g BOOTBRANCH="${BOOTBRANCH:-"tag:v2024.01"}" diff --git a/patch/u-boot/v2025-sunxi/0009-sunxi-h616-dram-support-1.5GB-RAM-size.patch b/patch/u-boot/v2025-sunxi/0009-sunxi-h616-dram-support-1.5GB-RAM-size.patch new file mode 100644 index 0000000000..063d0b8c21 --- /dev/null +++ b/patch/u-boot/v2025-sunxi/0009-sunxi-h616-dram-support-1.5GB-RAM-size.patch @@ -0,0 +1,202 @@ +From f9aa935084d24fbbe5e7b2c62948a8f08b228f18 Mon Sep 17 00:00:00 2001 +From: voapilro +Date: Mon, 6 May 2024 11:36:47 +0200 +Subject: [PATCH 1/3] Fix memory size detection for 1.5GB Orange Pi Zero 3 + board + +--- + arch/arm/include/asm/arch-sunxi/dram.h | 1 + + arch/arm/mach-sunxi/dram_helpers.c | 20 ++++++++++++++++++++ + arch/arm/mach-sunxi/dram_sun50i_h616.c | 9 ++++++++- + 3 files changed, 29 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/include/asm/arch-sunxi/dram.h b/arch/arm/include/asm/arch-sunxi/dram.h +index 682daae6b1a..a1379631d62 100644 +--- a/arch/arm/include/asm/arch-sunxi/dram.h ++++ b/arch/arm/include/asm/arch-sunxi/dram.h +@@ -41,5 +41,6 @@ + void mctl_await_completion(u32 *reg, u32 mask, u32 val); + bool mctl_mem_matches(u32 offset); + bool mctl_mem_matches_base(u32 offset, ulong base); ++bool mctl_mem_matches_top(ulong offset); + + #endif /* _SUNXI_DRAM_H */ +diff --git a/arch/arm/mach-sunxi/dram_helpers.c b/arch/arm/mach-sunxi/dram_helpers.c +index cdf2750f1c5..36fabb3bcd5 100644 +--- a/arch/arm/mach-sunxi/dram_helpers.c ++++ b/arch/arm/mach-sunxi/dram_helpers.c +@@ -40,4 +40,24 @@ bool mctl_mem_matches(u32 offset) + return readl(CFG_SYS_SDRAM_BASE) == + readl((ulong)CFG_SYS_SDRAM_BASE + offset); + } ++ ++/* ++ * Test if memory at offset matches memory at top of DRAM ++ */ ++bool mctl_mem_matches_top(ulong offset) ++{ ++ static const unsigned value= 0xaa55aa55; ++ ++ /* Take last usable memory address */ ++ offset -= sizeof(unsigned); ++ dsb(); ++ /* Set zero at last usable memory address */ ++ writel(0, (ulong)CONFIG_SYS_SDRAM_BASE + offset); ++ dsb(); ++ /* Set other value at last usable memory address */ ++ writel(value, (ulong)CONFIG_SYS_SDRAM_BASE + offset); ++ dsb(); ++ /* Check if the same value is actually observed when reading back */ ++ return readl((ulong)CONFIG_SYS_SDRAM_BASE + offset) == value; ++} + #endif +diff --git a/arch/arm/mach-sunxi/dram_sun50i_h616.c b/arch/arm/mach-sunxi/dram_sun50i_h616.c +index c5c1331a4c3..5287ef79c43 100644 +--- a/arch/arm/mach-sunxi/dram_sun50i_h616.c ++++ b/arch/arm/mach-sunxi/dram_sun50i_h616.c +@@ -1350,9 +1350,16 @@ static void mctl_auto_detect_dram_size(const struct dram_para *para, + static unsigned long mctl_calc_size(const struct dram_config *config) + { + u8 width = config->bus_full_width ? 4 : 2; ++ unsigned long size; + + /* 8 banks */ +- return (1ULL << (config->cols + config->rows + 3)) * width * config->ranks; ++ size = (1ULL << (config->cols + config->rows + 3)) * width * config->ranks; ++ ++ /* Fix size if last usable memory address is not valid */ ++ if (!mctl_mem_matches_top(size)) ++ size = (size * 3) / 4; ++ ++ return size; + } + + static const struct dram_para para = { + +From 371388504b9b67459dfd13d2585090961ad51cc5 Mon Sep 17 00:00:00 2001 +From: voapilro +Date: Mon, 6 May 2024 15:13:29 +0200 +Subject: [PATCH 2/3] Added some logs regarding memory size detection + +--- + arch/arm/include/asm/arch-sunxi/dram.h | 1 + + arch/arm/mach-sunxi/dram_helpers.c | 10 +++++++++- + arch/arm/mach-sunxi/dram_sun50i_h616.c | 10 +++++++++- + board/sunxi/board.c | 3 +-- + 4 files changed, 20 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/include/asm/arch-sunxi/dram.h b/arch/arm/include/asm/arch-sunxi/dram.h +index a1379631d62..c7543d35698 100644 +--- a/arch/arm/include/asm/arch-sunxi/dram.h ++++ b/arch/arm/include/asm/arch-sunxi/dram.h +@@ -42,5 +42,6 @@ unsigned long sunxi_dram_init(void); + bool mctl_mem_matches(u32 offset); + bool mctl_mem_matches_base(u32 offset, ulong base); + bool mctl_mem_matches_top(ulong offset); ++ulong mctl_mem_address(ulong offset); + + #endif /* _SUNXI_DRAM_H */ +diff --git a/arch/arm/mach-sunxi/dram_helpers.c b/arch/arm/mach-sunxi/dram_helpers.c +index 36fabb3bcd5..5a80159759c 100644 +--- a/arch/arm/mach-sunxi/dram_helpers.c ++++ b/arch/arm/mach-sunxi/dram_helpers.c +@@ -49,7 +49,7 @@ bool mctl_mem_matches_top(ulong offset) + static const unsigned value= 0xaa55aa55; + + /* Take last usable memory address */ +- offset -= sizeof(unsigned); ++ offset -= sizeof(value); + dsb(); + /* Set zero at last usable memory address */ + writel(0, (ulong)CONFIG_SYS_SDRAM_BASE + offset); +@@ -60,4 +60,12 @@ bool mctl_mem_matches_top(ulong offset) + /* Check if the same value is actually observed when reading back */ + return readl((ulong)CONFIG_SYS_SDRAM_BASE + offset) == value; + } ++ ++/* ++ * Get memory address at offset of DRAM ++ */ ++ulong mctl_mem_address(ulong offset) ++{ ++ return (ulong)CONFIG_SYS_SDRAM_BASE + offset; ++} + #endif +diff --git a/arch/arm/mach-sunxi/dram_sun50i_h616.c b/arch/arm/mach-sunxi/dram_sun50i_h616.c +index 5287ef79c43..6a247ecaa05 100644 +--- a/arch/arm/mach-sunxi/dram_sun50i_h616.c ++++ b/arch/arm/mach-sunxi/dram_sun50i_h616.c +@@ -1355,9 +1355,17 @@ static unsigned long mctl_calc_size(const struct dram_config *config) + /* 8 banks */ + size = (1ULL << (config->cols + config->rows + 3)) * width * config->ranks; + ++ printf("DRAM base address is defined as 0x%lx\n", mctl_mem_address(0)); ++ printf("DRAM has %u b/raw, %u b/col, %u B/width, %u #rank and 8 #bank\n", ++ (unsigned)config->rows, (unsigned)config->cols, ++ (unsigned)width, (unsigned)config->ranks); ++ printf("DRAM top address must be less than 0x%lx\n", size); ++ + /* Fix size if last usable memory address is not valid */ +- if (!mctl_mem_matches_top(size)) ++ if (!mctl_mem_matches_top(size)) { + size = (size * 3) / 4; ++ printf("DRAM top address must be less than 0x%lx\n", size); ++ } + + return size; + } +diff --git a/board/sunxi/board.c b/board/sunxi/board.c +index 8c12c8deade..62228936774 100644 +--- a/board/sunxi/board.c ++++ b/board/sunxi/board.c +@@ -632,9 +632,8 @@ void sunxi_board_init(void) + power_failed |= axp_set_sw(IS_ENABLED(CONFIG_AXP_SW_ON)); + #endif + #endif /* CONFIG_AXPxxx_POWER */ +- printf("DRAM:"); + gd->ram_size = sunxi_dram_init(); +- printf(" %d MiB\n", (int)(gd->ram_size >> 20)); ++ printf("DRAM: %d MiB\n", (int)(gd->ram_size >> 20)); + if (!gd->ram_size) + hang(); + + +From 4b5089810e7adac0801185e82a39c5849bf2bb91 Mon Sep 17 00:00:00 2001 +From: voapilro +Date: Mon, 6 May 2024 19:36:47 +0200 +Subject: [PATCH 3/3] Updated name from CONFIG_SYS_SDRAM_BASE to + CFG_SYS_SDRAM_BASE + +--- + arch/arm/mach-sunxi/dram_helpers.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/mach-sunxi/dram_helpers.c b/arch/arm/mach-sunxi/dram_helpers.c +index 5a80159759c..0d7fbac61bf 100644 +--- a/arch/arm/mach-sunxi/dram_helpers.c ++++ b/arch/arm/mach-sunxi/dram_helpers.c +@@ -52,13 +52,13 @@ bool mctl_mem_matches_top(ulong offset) + offset -= sizeof(value); + dsb(); + /* Set zero at last usable memory address */ +- writel(0, (ulong)CONFIG_SYS_SDRAM_BASE + offset); ++ writel(0, (ulong)CFG_SYS_SDRAM_BASE + offset); + dsb(); + /* Set other value at last usable memory address */ +- writel(value, (ulong)CONFIG_SYS_SDRAM_BASE + offset); ++ writel(value, (ulong)CFG_SYS_SDRAM_BASE + offset); + dsb(); + /* Check if the same value is actually observed when reading back */ +- return readl((ulong)CONFIG_SYS_SDRAM_BASE + offset) == value; ++ return readl((ulong)CFG_SYS_SDRAM_BASE + offset) == value; + } + + /* +@@ -66,6 +66,6 @@ bool mctl_mem_matches_top(ulong offset) + */ + ulong mctl_mem_address(ulong offset) + { +- return (ulong)CONFIG_SYS_SDRAM_BASE + offset; ++ return (ulong)CFG_SYS_SDRAM_BASE + offset; + } + #endif