diff --git a/config/boards/hinlink-h28k.csc b/config/boards/hinlink-h28k.csc new file mode 100644 index 0000000000..4a5c5e6ef9 --- /dev/null +++ b/config/boards/hinlink-h28k.csc @@ -0,0 +1,22 @@ +# Rockchip RK3528 quad core 1-8GB SoC GBe eMMC PCIE2.0/USB3 +BOARD_NAME="HinLink H28k" +BOARDFAMILY="rk35xx" +BOOTCONFIG="hinlink_rk3528_defconfig" +BOARD_MAINTAINER="sputnik2019" +KERNEL_TARGET="legacy" +FULL_DESKTOP="yes" +BOOT_LOGO="desktop" +BOOT_FDT_FILE="rockchip/rk3528-hinlink-h28k.dtb" +BOOT_SCENARIO="spl-blobs" +WIREGUARD="no" +BOOT_SUPPORT_SPI="yes" +BOOT_SPI_RKSPI_LOADER="yes" +IMAGE_PARTITION_TABLE="gpt" +BOOTFS_TYPE="ext4" + +# Override family config for this board; let's avoid conditionals in family config. +function post_family_config__hinlink-h28k_use_vendor_uboot() { + BOOTSOURCE='https://github.com/rockchip-linux/u-boot.git' + BOOTBRANCH='commit:32640b0ada9344f91e7a407576568782907161cd' + BOOTPATCHDIR="legacy/board_hinlink-h28k" +} diff --git a/config/sources/families/include/rockchip64_common.inc b/config/sources/families/include/rockchip64_common.inc index a9aebe2ccb..1f2e2f7678 100644 --- a/config/sources/families/include/rockchip64_common.inc +++ b/config/sources/families/include/rockchip64_common.inc @@ -59,6 +59,10 @@ elif [[ $BOOT_SOC == rk3328 || $BOOT_SOC == rk3308 ]]; then CPUMAX=${CPUMAX:="1296000"} +elif [[ "${BOOT_SOC}" == rk3528 ]]; then + + CPUMAX=${CPUMAX:="2016000"} + elif [[ "${BOOT_SOC}" == rk3566 ]]; then CPUMAX=${CPUMAX:="1800000"} @@ -93,6 +97,12 @@ elif [[ $BOOT_SOC == rk3399pro ]]; then MINILOADER_BLOB="${MINILOADER_BLOB:-"rk33/rk3399pro_miniloader_v1.26.bin"}" BL31_BLOB="${BL31_BLOB:-"rk33/rk3399pro_bl31_v1.35.elf"}" +elif [[ $BOOT_SOC == rk3528 ]]; then + + BOOT_SCENARIO="${BOOT_SCENARIO:=spl-blobs}" + DDR_BLOB="${DDR_BLOB:-"rk35/rk3528_ddr_1056MHz_v1.06.bin"}" + BL31_BLOB="${BL31_BLOB:-"rk35/rk3528_bl31_v1.16.elf"}" + elif [[ $BOOT_SOC == rk3566 ]]; then BOOT_SCENARIO="${BOOT_SCENARIO:=spl-blobs}" diff --git a/patch/u-boot/legacy/board_hinlink-h28k/add-h28k-defconfig.patch b/patch/u-boot/legacy/board_hinlink-h28k/add-h28k-defconfig.patch new file mode 100644 index 0000000000..b689618eca --- /dev/null +++ b/patch/u-boot/legacy/board_hinlink-h28k/add-h28k-defconfig.patch @@ -0,0 +1,213 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: sputnik2019 <195375690@qq.com> +Date: Thu, 28 Sep 2023 09:10:31 +0800 +Subject: Patching u-boot rk35xx files configs/hinlink_rk3528_defconfig + +--- + configs/hinlink_rk3528_defconfig | 195 ++++++++++ + 1 file changed, 195 insertions(+) + +diff --git a/configs/hinlink_rk3528_defconfig b/configs/hinlink_rk3528_defconfig +new file mode 100644 +index 00000000000..7e174b3be20 +--- /dev/null ++++ b/configs/hinlink_rk3528_defconfig +@@ -0,0 +1,195 @@ ++CONFIG_ARM=y ++CONFIG_ARM_SMCCC=y ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_SPL_LIBCOMMON_SUPPORT=y ++CONFIG_SPL_LIBGENERIC_SUPPORT=y ++CONFIG_SYS_MALLOC_F_LEN=0x80000 ++CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh" ++CONFIG_ROCKCHIP_RK3528=y ++CONFIG_ROCKCHIP_FIT_IMAGE=y ++CONFIG_ROCKCHIP_VENDOR_PARTITION=y ++CONFIG_USING_KERNEL_DTB_V2=y ++CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y ++CONFIG_ROCKCHIP_NEW_IDB=y ++CONFIG_SPL_SERIAL_SUPPORT=y ++CONFIG_SPL_DRIVERS_MISC_SUPPORT=y ++CONFIG_TARGET_EVB_RK3528=y ++CONFIG_SPL_LIBDISK_SUPPORT=y ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_SPL_SPI_SUPPORT=y ++CONFIG_DEFAULT_DEVICE_TREE="rk3528-hinlink-h28k" ++CONFIG_DEBUG_UART=y ++CONFIG_FIT=y ++CONFIG_FIT_IMAGE_POST_PROCESS=y ++CONFIG_FIT_HW_CRYPTO=y ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y ++CONFIG_SPL_FIT_HW_CRYPTO=y ++# CONFIG_SPL_SYS_DCACHE_OFF is not set ++CONFIG_BOOTDELAY=0 ++# CONFIG_CONSOLE_MUX is not set ++CONFIG_SYS_CONSOLE_INFO_QUIET=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_ANDROID_BOOTLOADER=y ++CONFIG_ANDROID_AVB=y ++CONFIG_ANDROID_BOOT_IMAGE_HASH=y ++CONFIG_SPL_BOARD_INIT=y ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set ++CONFIG_SPL_SEPARATE_BSS=y ++CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y ++CONFIG_SPL_CRYPTO_SUPPORT=y ++CONFIG_SPL_MMC_WRITE=y ++CONFIG_SPL_MTD_SUPPORT=y ++CONFIG_SPL_MTD_WRITE=y ++CONFIG_SPL_ATF=y ++CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y ++CONFIG_FASTBOOT_BUF_ADDR=0xc00800 ++CONFIG_CMD_BOOTZ=y ++CONFIG_CMD_DTIMG=y ++# CONFIG_CMD_ELF is not set ++# CONFIG_CMD_IMI is not set ++# CONFIG_CMD_IMLS is not set ++# CONFIG_CMD_XIMG is not set ++# CONFIG_CMD_LZMADEC is not set ++# CONFIG_CMD_UNZIP is not set ++# CONFIG_CMD_FLASH is not set ++# CONFIG_CMD_FPGA is not set ++CONFIG_CMD_GPT=y ++# CONFIG_CMD_LOADB is not set ++# CONFIG_CMD_LOADS is not set ++CONFIG_CMD_BOOT_ANDROID=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_MTD=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y ++# CONFIG_CMD_ITEST is not set ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_TFTPPUT=y ++CONFIG_CMD_TFTP_BOOTM=y ++CONFIG_CMD_TFTP_FLASH=y ++# CONFIG_CMD_MISC is not set ++CONFIG_CMD_MTD_BLK=y ++# CONFIG_SPL_DOS_PARTITION is not set ++# CONFIG_ISO_PARTITION is not set ++CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64 ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_SPL_DTB_MINIMUM=y ++CONFIG_OF_LIVE=y ++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" ++# CONFIG_NET_TFTP_VARS is not set ++CONFIG_REGMAP=y ++CONFIG_SPL_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_SPL_SYSCON=y ++# CONFIG_SARADC_ROCKCHIP is not set ++CONFIG_SARADC_ROCKCHIP_V2=y ++CONFIG_CLK=y ++CONFIG_SPL_CLK=y ++CONFIG_CLK_SCMI=y ++CONFIG_DM_CRYPTO=y ++CONFIG_SPL_DM_CRYPTO=y ++CONFIG_ROCKCHIP_CRYPTO_V2=y ++CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y ++CONFIG_SCMI_FIRMWARE=y ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_ROCKCHIP_GPIO_V2=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_DM_KEY=y ++CONFIG_ADC_KEY=y ++CONFIG_MISC=y ++CONFIG_SPL_MISC=y ++CONFIG_ROCKCHIP_OTP=y ++CONFIG_SPL_ROCKCHIP_SECURE_OTP=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y ++CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_MTD=y ++CONFIG_MTD_BLK=y ++CONFIG_MTD_DEVICE=y ++CONFIG_MTD_SPI_NAND=y ++CONFIG_SPI_FLASH=y ++CONFIG_SPI_FLASH_EON=y ++CONFIG_SPI_FLASH_GIGADEVICE=y ++CONFIG_SPI_FLASH_ISSI=y ++CONFIG_SPI_FLASH_MACRONIX=y ++CONFIG_SPI_FLASH_WINBOND=y ++CONFIG_SPI_FLASH_XMC=y ++CONFIG_SPI_FLASH_XTX=y ++CONFIG_SPI_FLASH_PUYA=y ++CONFIG_SPI_FLASH_FMSH=y ++CONFIG_SPI_FLASH_DOSILICON=y ++CONFIG_SPI_FLASH_BOYA=y ++CONFIG_SPI_FLASH_MTD=y ++CONFIG_SPL_SPI_FLASH_MTD=y ++CONFIG_PHY_RK630=y ++CONFIG_DM_ETH=y ++CONFIG_DM_ETH_PHY=y ++CONFIG_DWC_ETH_QOS=y ++CONFIG_GMAC_ROCKCHIP=y ++CONFIG_PHY_ROCKCHIP_INNO_USB2=y ++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y ++CONFIG_PINCTRL=y ++CONFIG_SPL_PINCTRL=y ++CONFIG_REGULATOR_PWM=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_RAM=y ++CONFIG_SPL_RAM=y ++CONFIG_TPL_RAM=y ++CONFIG_DM_RESET=y ++CONFIG_SPL_DM_RESET=y ++CONFIG_SPL_RESET_ROCKCHIP=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_BASE=0xff9f0000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_ROCKCHIP_SFC=y ++CONFIG_SYSRESET=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_OHCI_GENERIC=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_DWC3_GADGET=y ++CONFIG_USB_DWC3_GENERIC=y ++CONFIG_USB_STORAGE=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_MANUFACTURER="Rockchip" ++CONFIG_USB_GADGET_VENDOR_NUM=0x2207 ++CONFIG_USB_GADGET_PRODUCT_NUM=0x350a ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_DM_VIDEO=y ++CONFIG_DISPLAY=y ++CONFIG_VIDEO_ROCKCHIP=y ++CONFIG_DRM_ROCKCHIP=y ++CONFIG_DRM_ROCKCHIP_DW_HDMI=y ++CONFIG_ROCKCHIP_INNO_HDMI_PHY=y ++CONFIG_DRM_ROCKCHIP_TVE=y ++CONFIG_USE_TINY_PRINTF=y ++CONFIG_SPL_TINY_MEMSET=y ++CONFIG_RSA=y ++CONFIG_SPL_RSA=y ++CONFIG_RSA_N_SIZE=0x200 ++CONFIG_RSA_E_SIZE=0x10 ++CONFIG_RSA_C_SIZE=0x20 ++CONFIG_LZ4=y ++CONFIG_LZMA=y ++CONFIG_SPL_GZIP=y ++CONFIG_ERRNO_STR=y ++# CONFIG_EFI_LOADER is not set ++CONFIG_AVB_LIBAVB=y ++CONFIG_AVB_LIBAVB_AB=y ++CONFIG_AVB_LIBAVB_ATX=y ++CONFIG_AVB_LIBAVB_USER=y ++CONFIG_RK_AVB_LIBAVB_USER=y ++#CONFIG_OPTEE_CLIENT=y ++#CONFIG_OPTEE_V2=y +-- +Armbian + diff --git a/patch/u-boot/legacy/board_hinlink-h28k/add-h28k-dts.patch b/patch/u-boot/legacy/board_hinlink-h28k/add-h28k-dts.patch new file mode 100644 index 0000000000..b85e12065b --- /dev/null +++ b/patch/u-boot/legacy/board_hinlink-h28k/add-h28k-dts.patch @@ -0,0 +1,65 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: sputnik2019 <195375690@qq.com> +Date: Thu, 28 Sep 2023 09:23:25 +0800 +Subject: Patching u-boot rk35xx files arch/arm/dts/Makefile + arch/arm/dts/rk3528-hinlink-h28k.dts + +--- + arch/arm/dts/Makefile | 3 +- + arch/arm/dts/rk3528-hinlink-h28k.dts | 31 ++++++++++ + 2 files changed, 33 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index 0fcc630db77..65360b7ac2a 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -56,7 +56,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ + rk3399-puma-ddr1333.dtb \ + rk3399-puma-ddr1600.dtb \ + rk3399-puma-ddr1866.dtb \ +- rv1108-evb.dtb ++ rk3528-hinlink-h28k.dtb \ ++ rv1108-evb.dtb + dtb-$(CONFIG_ARCH_MESON) += \ + meson-gxbb-odroidc2.dtb + dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ +diff --git a/arch/arm/dts/rk3528-hinlink-h28k.dts b/arch/arm/dts/rk3528-hinlink-h28k.dts +new file mode 100644 +index 00000000000..089acc1a54c +--- /dev/null ++++ b/arch/arm/dts/rk3528-hinlink-h28k.dts +@@ -0,0 +1,31 @@ ++/* ++ * SPDX-License-Identifier: GPL-2.0+ ++ * ++ * (C) Copyright 2020 Rockchip Electronics Co., Ltd ++ */ ++ ++/dts-v1/; ++#include "rk3528.dtsi" ++#include "rk3528-u-boot.dtsi" ++#include ++ ++/ { ++ model = "Hinlink H28K"; ++ compatible = "hinlink,h28k", "rockchip,rk3528"; ++ ++ adc-keys { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 1>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1800000>; ++ u-boot,dm-pre-reloc; ++ status = "okay"; ++ ++ volumeup-key { ++ u-boot,dm-pre-reloc; ++ linux,code = ; ++ label = "volume up"; ++ press-threshold-microvolt = <9>; ++ }; ++ }; ++}; +-- +Armbian + diff --git a/patch/u-boot/legacy/board_hinlink-h28k/fix_source_so_boot_scr_works.patch b/patch/u-boot/legacy/board_hinlink-h28k/fix_source_so_boot_scr_works.patch new file mode 100644 index 0000000000..aab1714591 --- /dev/null +++ b/patch/u-boot/legacy/board_hinlink-h28k/fix_source_so_boot_scr_works.patch @@ -0,0 +1,26 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Stephen +Date: Mon, 8 Nov 2021 14:30:00 +0800 +Subject: cmd: source: fix the error that the command source failed to execute + +Signed-off-by: Stephen +--- + cmd/source.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/cmd/source.c b/cmd/source.c +index 6b1c8b744b4..cf820c072af 100644 +--- a/cmd/source.c ++++ b/cmd/source.c +@@ -87,7 +87,7 @@ source (ulong addr, const char *fit_uname) + * past the zero-terminated sequence of image lengths to get + * to the actual image data + */ +- while (*data++ != IMAGE_PARAM_INVAL); ++ while (*data++); + break; + #endif + #if defined(CONFIG_FIT) +-- +Armbian + diff --git a/patch/u-boot/legacy/board_hinlink-h28k/rockchip-allow-passing-of-BL31-location-via-variable.patch b/patch/u-boot/legacy/board_hinlink-h28k/rockchip-allow-passing-of-BL31-location-via-variable.patch new file mode 100644 index 0000000000..c9ff83eb2e --- /dev/null +++ b/patch/u-boot/legacy/board_hinlink-h28k/rockchip-allow-passing-of-BL31-location-via-variable.patch @@ -0,0 +1,65 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Stephen Chen +Date: Tue, 21 Mar 2023 16:11:34 +0800 +Subject: rockchip: allow passing of BL31 location via variable + +Source link: https://github.com/piter75/armbian-build/blob/rock-3a-bring-up/patch/u-boot/u-boot-rk356x/general-configurable-bl31-path.patch + +Signed-off-by: Stephen Chen +--- + arch/arm/mach-rockchip/decode_bl31.py | 12 ++++++++- + arch/arm/mach-rockchip/make_fit_atf.py | 13 +++++++++- + 2 files changed, 23 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/mach-rockchip/decode_bl31.py b/arch/arm/mach-rockchip/decode_bl31.py +index 301bd153753..42fa32d23d2 100755 +--- a/arch/arm/mach-rockchip/decode_bl31.py ++++ b/arch/arm/mach-rockchip/decode_bl31.py +@@ -41,7 +41,17 @@ def generate_atf_binary(bl31_file_name): + atf.write(data) + + def main(): +- bl31_elf="./bl31.elf" ++ if "BL31" in os.environ: ++ bl31_elf=os.getenv("BL31"); ++ elif os.path.isfile("./bl31.elf"): ++ bl31_elf = "./bl31.elf" ++ else: ++ os.system("echo 'int main(){}' > bl31.c") ++ os.system("${CROSS_COMPILE}gcc -c bl31.c -o bl31.elf") ++ bl31_elf = "./bl31.elf" ++ logging.basicConfig(format='%(levelname)s:%(message)s', level=logging.DEBUG) ++ logging.warning(' BL31 file bl31.elf NOT found, resulting binary is non-functional') ++ logging.warning(' Please read Building section in doc/README.rockchip') + generate_atf_binary(bl31_elf); + + if __name__ == "__main__": +diff --git a/arch/arm/mach-rockchip/make_fit_atf.py b/arch/arm/mach-rockchip/make_fit_atf.py +index 27b6ef75970..fac8d6f1219 100755 +--- a/arch/arm/mach-rockchip/make_fit_atf.py ++++ b/arch/arm/mach-rockchip/make_fit_atf.py +@@ -212,9 +212,20 @@ def get_bl31_segments_info(bl31_file_name): + + def main(): + uboot_elf="./u-boot" +- bl31_elf="./bl31.elf" + FIT_ITS=sys.stdout + ++ if "BL31" in os.environ: ++ bl31_elf=os.getenv("BL31"); ++ elif os.path.isfile("./bl31.elf"): ++ bl31_elf = "./bl31.elf" ++ else: ++ os.system("echo 'int main(){}' > bl31.c") ++ os.system("${CROSS_COMPILE}gcc -c bl31.c -o bl31.elf") ++ bl31_elf = "./bl31.elf" ++ logging.basicConfig(format='%(levelname)s:%(message)s', level=logging.DEBUG) ++ logging.warning(' BL31 file bl31.elf NOT found, resulting binary is non-functional') ++ logging.warning(' Please read Building section in doc/README.rockchip') ++ + opts, args = getopt.getopt(sys.argv[1:], "o:u:b:h") + for opt, val in opts: + if opt == "-o": +-- +Armbian + diff --git a/patch/u-boot/legacy/board_hinlink-h28k/rockchip-disable-gen_bl32_node.patch b/patch/u-boot/legacy/board_hinlink-h28k/rockchip-disable-gen_bl32_node.patch new file mode 100644 index 0000000000..6d12bb57fa --- /dev/null +++ b/patch/u-boot/legacy/board_hinlink-h28k/rockchip-disable-gen_bl32_node.patch @@ -0,0 +1,26 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Stephen Chen +Date: Tue, 21 Mar 2023 16:09:11 +0800 +Subject: rockchip: disable gen_bl32_node + +Signed-off-by: Stephen Chen +--- + arch/arm/mach-rockchip/make_fit_atf.sh | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/mach-rockchip/make_fit_atf.sh b/arch/arm/mach-rockchip/make_fit_atf.sh +index 32ef33b8b02..045273e3bd0 100755 +--- a/arch/arm/mach-rockchip/make_fit_atf.sh ++++ b/arch/arm/mach-rockchip/make_fit_atf.sh +@@ -10,7 +10,7 @@ source ./${srctree}/arch/arm/mach-rockchip/fit_nodes.sh + gen_header + gen_uboot_node + gen_bl31_node +-gen_bl32_node ++#gen_bl32_node + gen_mcu_node + gen_loadable_node + gen_kfdt_node +-- +Armbian +