From abe77c314a8aab9cd0d8b95ab7ca3d4ef97eaec5 Mon Sep 17 00:00:00 2001 From: jomadeto Date: Tue, 12 Nov 2024 12:40:41 +0100 Subject: [PATCH] Add TV Box Magicsee C400 Plus Linux support --- .../meson64-6.11/dt/meson-gxm-c400-plus.dts | 66 +++++++++++++++++++ .../meson64-6.6/dt/meson-gxm-c400-plus.dts | 66 +++++++++++++++++++ 2 files changed, 132 insertions(+) create mode 100644 patch/kernel/archive/meson64-6.11/dt/meson-gxm-c400-plus.dts create mode 100644 patch/kernel/archive/meson64-6.6/dt/meson-gxm-c400-plus.dts diff --git a/patch/kernel/archive/meson64-6.11/dt/meson-gxm-c400-plus.dts b/patch/kernel/archive/meson64-6.11/dt/meson-gxm-c400-plus.dts new file mode 100644 index 0000000000..714c6fef3f --- /dev/null +++ b/patch/kernel/archive/meson64-6.11/dt/meson-gxm-c400-plus.dts @@ -0,0 +1,66 @@ +/dts-v1/; + +#include "meson-gxm.dtsi" +#include "meson-gx-p23x-q20x.dtsi" + +/ { + compatible = "magicsee,c400-plus", "amlogic,s912", "amlogic,meson-gxm"; + model = "Magicsee C400 Plus"; +}; + +/* Q201 has only internal PHY port */ +ðmac { + phy-mode = "rmii"; + phy-handle = <&internal_phy>; +}; + +&sd_emmc_a { + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +&uart_A { + status = "okay"; + pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; + pinctrl-names = "default"; + uart-has-rtscts; + + bluetooth { + compatible = "qcom,qca9377-bt"; + enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; + max-speed = <2000000>; + clocks = <&wifi32k>; + clock-names = "lpo"; + }; +}; + +/* Wireless SDIO Module */ +&sd_emmc_a { + status = "okay"; + pinctrl-0 = <&sdio_pins>; + pinctrl-1 = <&sdio_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + #address-cells = <1>; + #size-cells = <0>; + + bus-width = <4>; + cap-sd-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; + max-frequency = <50000000>; + + non-removable; + disable-wp; + + /* WiFi firmware requires power to be kept while in suspend */ + keep-power-in-suspend; + + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddio_boot>; +}; \ No newline at end of file diff --git a/patch/kernel/archive/meson64-6.6/dt/meson-gxm-c400-plus.dts b/patch/kernel/archive/meson64-6.6/dt/meson-gxm-c400-plus.dts new file mode 100644 index 0000000000..714c6fef3f --- /dev/null +++ b/patch/kernel/archive/meson64-6.6/dt/meson-gxm-c400-plus.dts @@ -0,0 +1,66 @@ +/dts-v1/; + +#include "meson-gxm.dtsi" +#include "meson-gx-p23x-q20x.dtsi" + +/ { + compatible = "magicsee,c400-plus", "amlogic,s912", "amlogic,meson-gxm"; + model = "Magicsee C400 Plus"; +}; + +/* Q201 has only internal PHY port */ +ðmac { + phy-mode = "rmii"; + phy-handle = <&internal_phy>; +}; + +&sd_emmc_a { + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +&uart_A { + status = "okay"; + pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; + pinctrl-names = "default"; + uart-has-rtscts; + + bluetooth { + compatible = "qcom,qca9377-bt"; + enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; + max-speed = <2000000>; + clocks = <&wifi32k>; + clock-names = "lpo"; + }; +}; + +/* Wireless SDIO Module */ +&sd_emmc_a { + status = "okay"; + pinctrl-0 = <&sdio_pins>; + pinctrl-1 = <&sdio_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + #address-cells = <1>; + #size-cells = <0>; + + bus-width = <4>; + cap-sd-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; + max-frequency = <50000000>; + + non-removable; + disable-wp; + + /* WiFi firmware requires power to be kept while in suspend */ + keep-power-in-suspend; + + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddio_boot>; +}; \ No newline at end of file