diff --git a/config/boards/orangepi4.wip b/config/boards/orangepi4.wip new file mode 100644 index 0000000000..23408f6e46 --- /dev/null +++ b/config/boards/orangepi4.wip @@ -0,0 +1,8 @@ +# RK3399 hexa core 4GB RAM SoC GBE eMMC USB3 USB-C WiFi/BT +BOARD_NAME="OrangePi 4" +BOARDFAMILY="rk3399" +BOOTCONFIG="orangepi-4-rk3399_defconfig" +MODULES="" +MODULES_NEXT="" +KERNEL_TARGET="legacy,current,dev" +FULL_DESKTOP="yes" diff --git a/config/sources/families/rk3399.conf b/config/sources/families/rk3399.conf index 1cebb47d66..9eee709daa 100644 --- a/config/sources/families/rk3399.conf +++ b/config/sources/families/rk3399.conf @@ -27,7 +27,7 @@ elif [[ $BOARD == rockpi-4* ]]; then BOOT_USE_TPL_SPL_BLOB=yes BL31_BLOB='rk33/rk3399_bl31_v1.30.elf' -elif [[ $BOARD == nanopim4v2 ]]; then +elif [[ $BOARD == nanopim4v2 || $BOARD == orangepi4 ]]; then BOOT_USE_BLOBS=yes DDR_BLOB='rk33/rk3399_ddr_933MHz_v1.24.bin' diff --git a/patch/u-boot/u-boot-rk3399/add-board-orangepi-4.patch b/patch/u-boot/u-boot-rk3399/add-board-orangepi-4.patch new file mode 100644 index 0000000000..66e18ba81c --- /dev/null +++ b/patch/u-boot/u-boot-rk3399/add-board-orangepi-4.patch @@ -0,0 +1,312 @@ +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index 59a5aa3e..37a8157b 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -126,6 +126,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ + rk3399-nanopi-m4v2.dtb \ + rk3399-nanopi-neo4.dtb \ + rk3399-orangepi.dtb \ ++ rk3399-orangepi-4.dtb \ + rk3399-puma-ddr1333.dtb \ + rk3399-puma-ddr1600.dtb \ + rk3399-puma-ddr1866.dtb \ +diff --git a/arch/arm/dts/rk3399-orangepi-4-u-boot.dtsi b/arch/arm/dts/rk3399-orangepi-4-u-boot.dtsi +new file mode 100644 +index 00000000..5bd86966 +--- /dev/null ++++ b/arch/arm/dts/rk3399-orangepi-4-u-boot.dtsi +@@ -0,0 +1,13 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * Copyright (C) 2019 Jagan Teki ++ */ ++ ++#include "rk3399-u-boot.dtsi" ++#include "rk3399-sdram-lpddr4-100.dtsi" ++ ++/ { ++ chosen { ++ u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; ++ }; ++}; +diff --git a/arch/arm/dts/rk3399-orangepi-4.dts b/arch/arm/dts/rk3399-orangepi-4.dts +new file mode 100644 +index 0000000..4c50b3d +--- /dev/null ++++ b/arch/arm/dts/rk3399-orangepi-4.dts +@@ -0,0 +1,206 @@ ++/* ++ * (C) Copyright 2016 Rockchip Electronics Co., Ltd ++ * ++ * SPDX-License-Identifier: GPL-2.0+ ++ */ ++ ++/dts-v1/; ++#include ++#include ++#include "rk3399.dtsi" ++#include "rk3399-opp.dtsi" ++ ++/ { ++ model = "OrangePi 4 AI board"; ++ compatible = "rockchip,rk3399"; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ vdd_center: vdd-center { ++ compatible = "pwm-regulator"; ++ pwms = <&pwm3 0 25000 1>; ++ regulator-name = "vdd_center"; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1400000>; ++ regulator-init-microvolt = <950000>; ++ regulator-always-on; ++ regulator-boot-on; ++ status = "okay"; ++ }; ++ ++ vccsys: vccsys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vccsys"; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ vcc3v3_sys: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ vcc_phy: vcc-phy-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_phy"; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ vcc5v0_host: vcc5v0-host-en { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_host"; ++ gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ vcc5v0_typec0: vcc5v0-typec0-en { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_typec0"; ++ gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ vcc5v0_typec1: vcc5v0-typec1-en { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_typec1"; ++ gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ clkin_gmac: external-gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "clkin_gmac"; ++ #clock-cells = <0>; ++ }; ++ ++}; ++ ++&emmc_phy { ++ status = "okay"; ++}; ++ ++&pwm0 { ++ status = "okay"; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&pwm3 { ++ status = "okay"; ++}; ++ ++&saradc { ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ status = "okay"; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ mmc-hs400-1_8v; ++ mmc-hs400-enhanced-strobe; ++ non-removable; ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&dwc3_typec0 { ++ vbus-supply = <&vcc5v0_typec0>; ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++&dwc3_typec1 { ++ vbus-supply = <&vcc5v0_typec1>; ++ status = "okay"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ clock-frequency = <400000>; ++ i2c-scl-falling-time-ns = <50>; ++ i2c-scl-rising-time-ns = <100>; ++ u-boot,dm-pre-reloc; ++ ++ rk808: pmic@1b { ++ compatible = "rockchip,rk808"; ++ clock-output-names = "xin32k", "wifibt_32kin"; ++ interrupt-parent = <&gpio0>; ++ interrupts = <4 IRQ_TYPE_LEVEL_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l>; ++ reg = <0x1b>; ++ rockchip,system-power-controller; ++ #clock-cells = <1>; ++ u-boot,dm-pre-reloc; ++ status = "okay"; ++ ++ vcc12-supply = <&vcc3v3_sys>; ++ ++ regulators { ++ vcc33_lcd: SWITCH_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc33_lcd"; ++ }; ++ }; ++ }; ++}; ++ ++&pinctrl { ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = ++ <1 21 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ pmic_dvs2: pmic-dvs2 { ++ rockchip,pins = ++ <1 18 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++}; ++ ++&gmac { ++ phy-supply = <&vcc_phy>; ++ phy-mode = "rgmii"; ++ clock_in_out = "input"; ++ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ snps,reset-delays-us = <0 10000 50000>; ++ assigned-clocks = <&cru SCLK_RMII_SRC>; ++ assigned-clock-parents = <&clkin_gmac>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmii_pins>; ++ tx_delay = <0x28>; ++ rx_delay = <0x11>; ++ status = "okay"; ++}; +diff --git a/configs/orangepi-4-rk3399_defconfig b/configs/orangepi-4-rk3399_defconfig +new file mode 100644 +index 00000000..ff4d32e2 +--- /dev/null ++++ b/configs/orangepi-4-rk3399_defconfig +@@ -0,0 +1,63 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_SYS_TEXT_BASE=0x00200000 ++CONFIG_ROCKCHIP_RK3399=y ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_DEBUG_UART_BASE=0xFF1A0000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_DEBUG_UART=y ++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4.dtb" ++CONFIG_MISC_INIT_R=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_DISPLAY_BOARDINFO_LATE=y ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++CONFIG_SPL_STACK_R=y ++CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 ++CONFIG_TPL=y ++CONFIG_CMD_BOOTZ=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_SF=y ++CONFIG_CMD_USB=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_TIME=y ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_DEFAULT_DEVICE_TREE="rk3399-orangepi-4" ++CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" ++CONFIG_ENV_IS_IN_MMC=y ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_DM_ETH=y ++CONFIG_ETH_DESIGNWARE=y ++CONFIG_GMAC_ROCKCHIP=y ++CONFIG_PMIC_RK8XX=y ++CONFIG_REGULATOR_PWM=y ++CONFIG_REGULATOR_RK8XX=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_RAM_RK3399_LPDDR4=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_SYSRESET=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_HOST_ETHER=y ++CONFIG_USB_ETHER_ASIX=y ++CONFIG_USB_ETHER_ASIX88179=y ++CONFIG_USB_ETHER_MCS7830=y ++CONFIG_USB_ETHER_RTL8152=y ++CONFIG_USB_ETHER_SMSC95XX=y ++CONFIG_SPL_TINY_MEMSET=y ++CONFIG_ERRNO_STR=y ++CONFIG_LOG=y ++CONFIG_LOG_CONSOLE=y ++CONFIG_SPL_LOG=y ++CONFIG_SPL_LOG_CONSOLE=y ++CONFIG_LOG_MAX_LEVEL=7 ++# CONFIG_USE_TINY_PRINTF is not set