From 9828c29e9013b34a9e8d4175fae32d56fda8b3f2 Mon Sep 17 00:00:00 2001 From: zador-blood-stained Date: Sun, 8 Oct 2017 14:21:26 +0300 Subject: [PATCH] Add extra DVFS related patch to sunxi-next --- .../39-rename-s_twi-pinctrl-functions.patch | 83 +++++++++++++ .../48-cpufreq-dt-auto-create-platdev.patch | 115 ++++++++++++++++++ 2 files changed, 198 insertions(+) create mode 100644 patch/kernel/sunxi-next/39-rename-s_twi-pinctrl-functions.patch create mode 100644 patch/kernel/sunxi-next/48-cpufreq-dt-auto-create-platdev.patch diff --git a/patch/kernel/sunxi-next/39-rename-s_twi-pinctrl-functions.patch b/patch/kernel/sunxi-next/39-rename-s_twi-pinctrl-functions.patch new file mode 100644 index 0000000000..212c304780 --- /dev/null +++ b/patch/kernel/sunxi-next/39-rename-s_twi-pinctrl-functions.patch @@ -0,0 +1,83 @@ +From 059b07989e091f003f2d6adea37a54cd377471d4 Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng +Date: Sun, 30 Jul 2017 13:36:18 +0800 +Subject: pinctrl: sunxi: rename R_PIO i2c pin function name + +The I2C pin functions in R_PIO used to be named "s_twi". + +As we usually use the name "i2c" instead of "twi" in the mainline +kernel, change these names to "s_i2c" for consistency. + +The "s_twi" functions are not yet referenced by any device trees in +mainline kernel so I think it's safe to change the name. + +Signed-off-by: Icenowy Zheng +Reviewed-by: Chen-Yu Tsai +Signed-off-by: Linus Walleij +--- + drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c | 4 ++-- + drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c | 4 ++-- + drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c | 4 ++-- + 3 files changed, 6 insertions(+), 6 deletions(-) + +diff --git a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c +index a22bd88..c96a361 100644 +--- a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c ++++ b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c +@@ -25,12 +25,12 @@ static const struct sunxi_desc_pin sun6i_a31_r_pins[] = { + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), +- SUNXI_FUNCTION(0x2, "s_twi"), /* SCK */ ++ SUNXI_FUNCTION(0x2, "s_i2c"), /* SCK */ + SUNXI_FUNCTION(0x3, "s_p2wi")), /* SCK */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), +- SUNXI_FUNCTION(0x2, "s_twi"), /* SDA */ ++ SUNXI_FUNCTION(0x2, "s_i2c"), /* SDA */ + SUNXI_FUNCTION(0x3, "s_p2wi")), /* SDA */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2), + SUNXI_FUNCTION(0x0, "gpio_in"), +diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c +index 2292e05..5789e9e 100644 +--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c ++++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-a23-r.c +@@ -29,13 +29,13 @@ static const struct sunxi_desc_pin sun8i_a23_r_pins[] = { + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_rsb"), /* SCK */ +- SUNXI_FUNCTION(0x3, "s_twi"), /* SCK */ ++ SUNXI_FUNCTION(0x3, "s_i2c"), /* SCK */ + SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 0)), /* PL_EINT0 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "s_rsb"), /* SDA */ +- SUNXI_FUNCTION(0x3, "s_twi"), /* SDA */ ++ SUNXI_FUNCTION(0x3, "s_i2c"), /* SDA */ + SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 1)), /* PL_EINT1 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2), + SUNXI_FUNCTION(0x0, "gpio_in"), +diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c +index 686ec21..ebfd9a2 100644 +--- a/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c ++++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-h3-r.c +@@ -20,12 +20,12 @@ static const struct sunxi_desc_pin sun8i_h3_r_pins[] = { + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), +- SUNXI_FUNCTION(0x2, "s_twi"), /* SCK */ ++ SUNXI_FUNCTION(0x2, "s_i2c"), /* SCK */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PL_EINT0 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1), + SUNXI_FUNCTION(0x0, "gpio_in"), + SUNXI_FUNCTION(0x1, "gpio_out"), +- SUNXI_FUNCTION(0x2, "s_twi"), /* SDA */ ++ SUNXI_FUNCTION(0x2, "s_i2c"), /* SDA */ + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* PL_EINT1 */ + SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2), + SUNXI_FUNCTION(0x0, "gpio_in"), +-- +cgit v1.1 + diff --git a/patch/kernel/sunxi-next/48-cpufreq-dt-auto-create-platdev.patch b/patch/kernel/sunxi-next/48-cpufreq-dt-auto-create-platdev.patch new file mode 100644 index 0000000000..5aa2a8b7b4 --- /dev/null +++ b/patch/kernel/sunxi-next/48-cpufreq-dt-auto-create-platdev.patch @@ -0,0 +1,115 @@ +From edeec420de2407618de097977e76b572d9de1bcf Mon Sep 17 00:00:00 2001 +From: Viresh Kumar +Date: Wed, 16 Aug 2017 11:07:27 +0530 +Subject: cpufreq: dt-platdev: Automatically create cpufreq device with OPP v2 + +The initial idea of creating the cpufreq-dt-platdev.c file was to keep a +list of platforms that use the "operating-points" (V1) bindings and +create cpufreq device for them only, as we weren't sure which platforms +would want the device to get created automatically as some had their own +cpufreq drivers as well, or wanted to initialize cpufreq after doing +some stuff from platform code. + +But that wasn't the case with platforms using "operating-points-v2" +property. We wanted the device to get created automatically without the +need of adding them to the whitelist. Though, we will still have some +exceptions where we don't want to create the device automatically. + +Rename the earlier platform list as *whitelist* and create a new +*blacklist* as well. + +The cpufreq-dt device will get created if: +- The platform is there in the whitelist OR +- The platform has "operating-points-v2" property in CPU0's DT node and + isn't part of the blacklist . + +Reported-by: Geert Uytterhoeven +Signed-off-by: Viresh Kumar +Tested-by: Simon Horman +Reviewed-by: Masahiro Yamada +Signed-off-by: Rafael J. Wysocki +--- + drivers/cpufreq/cpufreq-dt-platdev.c | 45 ++++++++++++++++++++++++++++++++---- + 1 file changed, 40 insertions(+), 5 deletions(-) + +diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c +index 8b88768..7c67a6c 100644 +--- a/drivers/cpufreq/cpufreq-dt-platdev.c ++++ b/drivers/cpufreq/cpufreq-dt-platdev.c +@@ -9,11 +9,16 @@ + + #include + #include ++#include + #include + + #include "cpufreq-dt.h" + +-static const struct of_device_id machines[] __initconst = { ++/* ++ * Machines for which the cpufreq device is *always* created, mostly used for ++ * platforms using "operating-points" (V1) property. ++ */ ++static const struct of_device_id whitelist[] __initconst = { + { .compatible = "allwinner,sun4i-a10", }, + { .compatible = "allwinner,sun5i-a10s", }, + { .compatible = "allwinner,sun5i-a13", }, +@@ -107,21 +112,51 @@ static const struct of_device_id machines[] __initconst = { + { } + }; + ++/* ++ * Machines for which the cpufreq device is *not* created, mostly used for ++ * platforms using "operating-points-v2" property. ++ */ ++static const struct of_device_id blacklist[] __initconst = { ++ { } ++}; ++ ++static bool __init cpu0_node_has_opp_v2_prop(void) ++{ ++ struct device_node *np = of_cpu_device_node_get(0); ++ bool ret = false; ++ ++ if (of_get_property(np, "operating-points-v2", NULL)) ++ ret = true; ++ ++ of_node_put(np); ++ return ret; ++} ++ + static int __init cpufreq_dt_platdev_init(void) + { + struct device_node *np = of_find_node_by_path("/"); + const struct of_device_id *match; ++ const void *data = NULL; + + if (!np) + return -ENODEV; + +- match = of_match_node(machines, np); ++ match = of_match_node(whitelist, np); ++ if (match) { ++ data = match->data; ++ goto create_pdev; ++ } ++ ++ if (cpu0_node_has_opp_v2_prop() && !of_match_node(blacklist, np)) ++ goto create_pdev; ++ + of_node_put(np); +- if (!match) +- return -ENODEV; ++ return -ENODEV; + ++create_pdev: ++ of_node_put(np); + return PTR_ERR_OR_ZERO(platform_device_register_data(NULL, "cpufreq-dt", +- -1, match->data, ++ -1, data, + sizeof(struct cpufreq_dt_platform_data))); + } + device_initcall(cpufreq_dt_platdev_init); +-- +cgit v1.1 +