diff --git a/patch/kernel/sun8i-dev/add-h3-overlays.patch b/patch/kernel/sun8i-dev/add-h3-overlays.patch
index de8b431e14..3df87d2d12 100644
--- a/patch/kernel/sun8i-dev/add-h3-overlays.patch
+++ b/patch/kernel/sun8i-dev/add-h3-overlays.patch
@@ -1,8 +1,8 @@
 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index 01d178a2..bfba239c 100644
+index 01180849..81523d5a 100644
 --- a/arch/arm/boot/dts/Makefile
 +++ b/arch/arm/boot/dts/Makefile
-@@ -990,4 +990,7 @@ dtstree		:= $(srctree)/$(src)
+@@ -1016,4 +1017,7 @@ dtstree		:= $(srctree)/$(src)
  dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts))
  
  always		:= $(dtb-y)
@@ -12,23 +12,21 @@ index 01d178a2..bfba239c 100644
 +dts-dirs += overlay
 diff --git a/arch/arm/boot/dts/overlay/Makefile b/arch/arm/boot/dts/overlay/Makefile
 new file mode 100644
-index 00000000..8693d746
+index 00000000..f9ca2574
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/Makefile
-@@ -0,0 +1,30 @@
+@@ -0,0 +1,28 @@
 +dtbo-$(CONFIG_MACH_SUN8I) += \
 +	sun8i-h3-analog-codec.dtbo \
 +	sun8i-h3-cir.dtbo \
 +	sun8i-h3-i2c0.dtbo \
 +	sun8i-h3-i2c1.dtbo \
 +	sun8i-h3-i2c2.dtbo \
-+	sun8i-h3-i2c-ds1307.dtbo \
 +	sun8i-h3-pps-gpio.dtbo \
 +	sun8i-h3-pwm.dtbo \
 +	sun8i-h3-spdif-out.dtbo \
 +	sun8i-h3-spi-add-cs1.dtbo \
 +	sun8i-h3-spi-jedec-nor.dtbo \
-+	sun8i-h3-spi-mcp2515.dtbo \
 +	sun8i-h3-spi-spidev.dtbo \
 +	sun8i-h3-uart1.dtbo \
 +	sun8i-h3-uart2.dtbo \
@@ -48,10 +46,10 @@ index 00000000..8693d746
 +clean-files	:= *.dtbo *.scr
 diff --git a/arch/arm/boot/dts/overlay/README.sun8i-h3-overlays b/arch/arm/boot/dts/overlay/README.sun8i-h3-overlays
 new file mode 100644
-index 00000000..996308c9
+index 00000000..0ae207a1
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/README.sun8i-h3-overlays
-@@ -0,0 +1,297 @@
+@@ -0,0 +1,245 @@
 +This document describes overlays provided in the kernel packages
 +For generic Armbian overlays documentation please see
 +https://docs.armbian.com/User-Guide_Allwinner_overlays/
@@ -74,13 +72,11 @@ index 00000000..996308c9
 +- i2c0
 +- i2c1
 +- i2c2
-+- i2c-ds1307
 +- pps-gpio
 +- pwm
 +- spdif-out
 +- spi-add-cs1
 +- spi-jedec-nor
-+- spi-mcp2515
 +- spi-spidev
 +- uart1
 +- uart2
@@ -123,17 +119,6 @@ index 00000000..996308c9
 +
 +On most board this bus is wired to Camera (CSI) socket
 +
-+### i2c-ds1307
-+
-+Activates Maxim/Dallas DS1307 RTC support
-+
-+Parameters:
-+
-+param_ds1307_i2c_bus (int)
-+	I2C bus RTC is connected to
-+	Required
-+	Supported values: 0, 1, 2
-+
 +### pps-gpio
 +
 +Activates pulse-per-second GPIO client
@@ -208,45 +193,6 @@ index 00000000..996308c9
 +	Default: 1000000
 +	Range: 3000 - 100000000
 +
-+### spi-mcp2515
-+
-+Activates mcp2515 SPI CAN controller connected to SPI bus
-+
-+SPI 0 pins (MOSI, MISO, SCK, CS): PC0, PC1, PC2, PC3
-+SPI 1 pins (MOSI, MISO, SCK, CS): PA15, PA16, PA14, PA13
-+
-+Parameters:
-+
-+param_mcp2515_spi_bus (int)
-+	SPI bus to activate mcp2515 support on
-+	Required
-+	Supported values: 0, 1
-+
-+param_mcp2515_spi_cs (int)
-+	SPI chip select number
-+	Optional
-+	Default: 0
-+	Supported values: 0, 1
-+	Using chip select 1 requires using "spi-add-cs1" overlay
-+
-+param_mcp2515_max_freq (int)
-+	Maximum SPI frequency
-+	Optional
-+	Default: 10000000
-+	Range: 3000 - 100000000
-+
-+param_mcp2515_clk_freq (int)
-+	Onboard oscillator clock frequency
-+	Optional
-+	Default: 8000000
-+	Typical values: 8000000, 16000000
-+
-+param_mcp2515_int_pin (pin)
-+	Interrupt pin
-+	Optional
-+	Default: PA7
-+	Selected pin should support interrupts (EINT)
-+
 +### spi-spidev
 +
 +Activates SPIdev device node (/dev/spidevX.Y) for userspace SPI access,
@@ -395,10 +341,10 @@ index 00000000..9b62fd2b
 +};
 diff --git a/arch/arm/boot/dts/overlay/sun8i-h3-fixup.scr-cmd b/arch/arm/boot/dts/overlay/sun8i-h3-fixup.scr-cmd
 new file mode 100644
-index 00000000..1919964f
+index 00000000..744889c6
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/sun8i-h3-fixup.scr-cmd
-@@ -0,0 +1,145 @@
+@@ -0,0 +1,110 @@
 +# overlays fixup script
 +# implements (or rather substitutes) overlay arguments functionality
 +# using u-boot scripting, environment variables and "fdt" command
@@ -427,28 +373,6 @@ index 00000000..1919964f
 +	env delete tmp_spi_path
 +fi
 +
-+if test -n "${param_mcp2515_spi_bus}"; then
-+	test "${param_mcp2515_spi_bus}" = "0" && setenv tmp_spi_path "spi@01c68000"
-+	test "${param_mcp2515_spi_bus}" = "1" && setenv tmp_spi_path "spi@01c69000"
-+	fdt set /soc/${tmp_spi_path} status "okay"
-+	fdt set /soc/${tmp_spi_path}/mcp2515 status "okay"
-+	if test -n "${param_mcp2515_max_freq}"; then
-+		fdt set /soc/${tmp_spi_path}/mcp2515 spi-max-frequency "<${param_mcp2515_max_freq}>"
-+	fi
-+	if test "${param_mcp2515_spi_cs}" = "1"; then
-+		fdt set /soc/${tmp_spi_path}/mcp2515 reg "<1>"
-+	fi
-+	if test -n "${param_mcp2515_int_pin}"; then
-+		setenv tmp_bank "${param_mcp2515_int_pin}"
-+		setenv tmp_pin "${param_mcp2515_int_pin}"
-+		run decompose_pin
-+		fdt set /soc/pinctrl@01c20800/can0_pin_irq pins "${param_mcp2515_int_pin}"
-+		fdt set /soc/${tmp_spi_path}/mcp2515 interrupts "<${tmp_bank} ${tmp_pin} 0x2>"
-+		env delete tmp_pin tmp_bank
-+	fi
-+	env delete tmp_spi_path
-+fi
-+
 +if test -n "${param_spidev_spi_bus}"; then
 +	test "${param_spidev_spi_bus}" = "0" && setenv tmp_spi_path "spi@01c68000"
 +	test "${param_spidev_spi_bus}" = "1" && setenv tmp_spi_path "spi@01c69000"
@@ -463,19 +387,6 @@ index 00000000..1919964f
 +	env delete tmp_spi_path
 +fi
 +
-+if test -n "${param_mcp2515_clk_freq}"; then
-+	fdt set /clocks/can0_osc_fixed clock-frequency "<${param_mcp2515_clk_freq}>"
-+fi
-+
-+if test -n "${param_ds1307_i2c_bus}"; then
-+	test "${param_ds1307_i2c_bus}" = "0" && setenv tmp_i2c_path "i2c@01c2ac00"
-+	test "${param_ds1307_i2c_bus}" = "1" && setenv tmp_i2c_path "i2c@01c2b000"
-+	test "${param_ds1307_i2c_bus}" = "2" && setenv tmp_i2c_path "i2c@01c2b400"
-+	fdt set /soc/${tmp_i2c_path} status "okay"
-+	fdt set /soc/${tmp_i2c_path}/ds1307@68 status "okay"
-+	env delete tmp_i2c_path
-+fi
-+
 +if test -n "${param_pps_pin}"; then
 +	setenv tmp_bank "${param_pps_pin}"
 +	setenv tmp_pin "${param_pps_pin}"
@@ -544,66 +455,6 @@ index 00000000..1919964f
 +	fdt set /soc/serial@01c28c00 pinctrl-1 "<${tmp_phandle2}>"
 +	env delete tmp_phandle1 tmp_phandle2
 +fi
-diff --git a/arch/arm/boot/dts/overlay/sun8i-h3-i2c-ds1307.dts b/arch/arm/boot/dts/overlay/sun8i-h3-i2c-ds1307.dts
-new file mode 100644
-index 00000000..00c18b71
---- /dev/null
-+++ b/arch/arm/boot/dts/overlay/sun8i-h3-i2c-ds1307.dts
-@@ -0,0 +1,54 @@
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+	compatible = "allwinner,sun8i-h3";
-+
-+	fragment@0 {
-+		target-path = "/aliases";
-+		__overlay__ {
-+			i2c0 = "/soc/i2c@01c2ac00";
-+			i2c1 = "/soc/i2c@01c2b000";
-+			i2c2 = "/soc/i2c@01c2b400";
-+		};
-+	};
-+
-+	fragment@1 {
-+		target = <&i2c0>;
-+		__overlay__ {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			ds1307@68 {
-+				compatible = "dallas,ds1307";
-+				reg = <0x68>;
-+				status = "disabled";
-+			};
-+		};
-+	};
-+
-+	fragment@2 {
-+		target = <&i2c1>;
-+		__overlay__ {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			ds1307@68 {
-+				compatible = "dallas,ds1307";
-+				reg = <0x68>;
-+				status = "disabled";
-+			};
-+		};
-+	};
-+
-+	fragment@3 {
-+		target = <&i2c2>;
-+		__overlay__ {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			ds1307@68 {
-+				compatible = "dallas,ds1307";
-+				reg = <0x68>;
-+				status = "disabled";
-+			};
-+		};
-+	};
-+};
 diff --git a/arch/arm/boot/dts/overlay/sun8i-h3-i2c0.dts b/arch/arm/boot/dts/overlay/sun8i-h3-i2c0.dts
 new file mode 100644
 index 00000000..b457ac71
@@ -901,90 +752,6 @@ index 00000000..ad22a71a
 +		};
 +	};
 +};
-diff --git a/arch/arm/boot/dts/overlay/sun8i-h3-spi-mcp2515.dts b/arch/arm/boot/dts/overlay/sun8i-h3-spi-mcp2515.dts
-new file mode 100644
-index 00000000..c756a752
---- /dev/null
-+++ b/arch/arm/boot/dts/overlay/sun8i-h3-spi-mcp2515.dts
-@@ -0,0 +1,78 @@
-+/dts-v1/;
-+/plugin/;
-+
-+#include <dt-bindings/interrupt-controller/irq.h>
-+
-+/ {
-+	compatible = "allwinner,sun8i-h3";
-+
-+	fragment@0 {
-+		target-path = "/aliases";
-+		__overlay__ {
-+			spi0 = "/soc/spi@01c68000";
-+			spi1 = "/soc/spi@01c69000";
-+		};
-+	};
-+
-+	fragment@1 {
-+		target-path = "/clocks";
-+		__overlay__ {
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+			can0_osc_fixed: can0_osc_fixed {
-+				compatible = "fixed-clock";
-+				#clock-cells = <0>;
-+				clock-frequency  = <8000000>;
-+			};
-+		};
-+	};
-+
-+	fragment@2 {
-+		target = <&pio>;
-+		__overlay__ {
-+			can0_pin_irq: can0_pin_irq {
-+				pins = "PA7";
-+				function = "irq";
-+				bias-pull-up;
-+			};
-+		};
-+	};
-+
-+	fragment@3 {
-+		target = <&spi0>;
-+		__overlay__ {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			mcp2515 {
-+				reg = <0>;
-+				compatible = "microchip,mcp2515";
-+				pinctrl-names = "default";
-+				pinctrl-0 = <&can0_pin_irq>;
-+				spi-max-frequency = <10000000>;
-+				interrupt-parent = <&pio>;
-+				interrupts = <0 7 IRQ_TYPE_EDGE_FALLING>; /* PA7 */
-+				clocks = <&can0_osc_fixed>;
-+				status = "disabled";
-+			};
-+		};
-+	};
-+
-+	fragment@4 {
-+		target = <&spi1>;
-+		__overlay__ {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			mcp2515 {
-+				reg = <0>;
-+				compatible = "microchip,mcp2515";
-+				pinctrl-names = "default";
-+				pinctrl-0 = <&can0_pin_irq>;
-+				spi-max-frequency = <10000000>;
-+				interrupt-parent = <&pio>;
-+				interrupts = <0 7 IRQ_TYPE_EDGE_FALLING>; /* PA7 */
-+				clocks = <&can0_osc_fixed>;
-+				status = "disabled";
-+			};
-+		};
-+	};
-+};
 diff --git a/arch/arm/boot/dts/overlay/sun8i-h3-spi-spidev.dts b/arch/arm/boot/dts/overlay/sun8i-h3-spi-spidev.dts
 new file mode 100644
 index 00000000..180979e0
diff --git a/patch/kernel/sunxi-next/add-a20-overlays.patch b/patch/kernel/sunxi-next/add-a20-overlays.patch
index 90f7fdca32..ba815debaa 100644
--- a/patch/kernel/sunxi-next/add-a20-overlays.patch
+++ b/patch/kernel/sunxi-next/add-a20-overlays.patch
@@ -12,10 +12,10 @@ index 01180849..8a66eadb 100644
 +dts-dirs += overlay
 diff --git a/arch/arm/boot/dts/overlay/Makefile b/arch/arm/boot/dts/overlay/Makefile
 new file mode 100644
-index 00000000..18fa1c75
+index 00000000..af7af653
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/Makefile
-@@ -0,0 +1,60 @@
+@@ -0,0 +1,56 @@
 +ifeq ($(CONFIG_OF_CONFIGFS),y)
 +
 +dtbo-$(CONFIG_MACH_SUN4I) += \
@@ -23,13 +23,11 @@ index 00000000..18fa1c75
 +	sun4i-a10-can.dtbo \
 +	sun4i-a10-i2c1.dtbo \
 +	sun4i-a10-i2c2.dtbo \
-+	sun4i-a10-i2c-ds1307.dtbo \
 +	sun4i-a10-nand.dtbo \
 +	sun4i-a10-pps-gpio.dtbo \
 +	sun4i-a10-pwm.dtbo \
 +	sun4i-a10-spdif-out.dtbo \
 +	sun4i-a10-spi-jedec-nor.dtbo \
-+	sun4i-a10-spi-mcp2515.dtbo \
 +	sun4i-a10-spi-spidev.dtbo \
 +	sun4i-a10-uart2.dtbo \
 +	sun4i-a10-uart3.dtbo \
@@ -46,7 +44,6 @@ index 00000000..18fa1c75
 +	sun7i-a20-i2c2.dtbo \
 +	sun7i-a20-i2c3.dtbo \
 +	sun7i-a20-i2c4.dtbo \
-+	sun7i-a20-i2c-ds1307.dtbo \
 +	sun7i-a20-mmc2.dtbo \
 +	sun7i-a20-nand.dtbo \
 +	sun7i-a20-pps-gpio.dtbo \
@@ -54,7 +51,6 @@ index 00000000..18fa1c75
 +	sun7i-a20-spdif-out.dtbo \
 +	sun7i-a20-spi-add-cs1.dtbo \
 +	sun7i-a20-spi-jedec-nor.dtbo \
-+	sun7i-a20-spi-mcp2515.dtbo \
 +	sun7i-a20-spi-spidev.dtbo \
 +	sun7i-a20-uart2.dtbo \
 +	sun7i-a20-uart3.dtbo \
@@ -78,10 +74,10 @@ index 00000000..18fa1c75
 +clean-files	:= *.dtbo *.scr
 diff --git a/arch/arm/boot/dts/overlay/README.sun4i-a10-overlays b/arch/arm/boot/dts/overlay/README.sun4i-a10-overlays
 new file mode 100644
-index 00000000..c5093b56
+index 00000000..adcc66f0
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/README.sun4i-a10-overlays
-@@ -0,0 +1,307 @@
+@@ -0,0 +1,253 @@
 +This document describes overlays provided in the kernel packages
 +For generic Armbian overlays documentation please see
 +https://docs.armbian.com/User-Guide_Allwinner_overlays/
@@ -106,13 +102,11 @@ index 00000000..c5093b56
 +- can
 +- i2c1
 +- i2c2
-+- i2c-ds1307
 +- nand
 +- pps-gpio
 +- pwm
 +- spdif-out
 +- spi-jedec-nor
-+- spi-mcp2515
 +- spi-spidev
 +- uart1
 +- uart2
@@ -148,17 +142,6 @@ index 00000000..c5093b56
 +
 +I2C2 pins (SCL, SDA): PB20, PB21
 +
-+### i2c-ds1307
-+
-+Activates Maxim/Dallas DS1307 RTC support
-+
-+Parameters:
-+
-+param_ds1307_i2c_bus (int)
-+	I2C bus RTC is connected to
-+	Required
-+	Supported values: 0, 1, 2
-+
 +### nand
 +
 +Activates NAND controller
@@ -237,47 +220,6 @@ index 00000000..c5093b56
 +	Default: 1000000
 +	Range: 3000 - 100000000
 +
-+### spi-mcp2515
-+
-+Activates mcp2515 SPI CAN controller connected to SPI bus
-+
-+SPI 0 pins (MOSI, MISO, SCK, CS0, CS1): PI12, PI13, PI11, PI10, PI14
-+SPI 1 pins (MOSI, MISO, SCK, CS0): PI18, PI19, PI17, PI16
-+SPI 2 pins a (MOSI, MISO, SCK, CS0): PC21, PC22, PC20, PC19
-+SPI 2 pins b (MOSI, MISO, SCK, CS0): PB16, PB17, PB15, PB14
-+
-+Parameters:
-+
-+param_mcp2515_spi_bus (int)
-+	SPI bus to activate mcp2515 support on
-+	Required
-+	Supported values: 0, 1, 2
-+
-+param_mcp2515_max_freq (int)
-+	Maximum SPI frequency
-+	Optional
-+	Default: 10000000
-+	Range: 3000 - 100000000
-+
-+param_spi2_bus_pins (char)
-+	SPI bus 2 pinmux variant
-+	Optional
-+	Default: a
-+	Supported values: a, b
-+	Determines what pins SPI bus 2 is exposed on if SPI 2 is used by any overlay
-+
-+param_mcp2515_clk_freq (int)
-+	Onboard oscillator clock frequency
-+	Optional
-+	Default: 8000000
-+	Typical values: 8000000, 16000000
-+
-+param_mcp2515_int_pin (pin)
-+	Interrupt pin
-+	Optional
-+	Default: PH15
-+	Selected pin should support interrupts (EINT)
-+
 +### spi-spidev
 +
 +Activates SPIdev device node (/dev/spidevX.Y) for userspace SPI access,
@@ -391,10 +333,10 @@ index 00000000..c5093b56
 +		please use external pull-up resistor instead
 diff --git a/arch/arm/boot/dts/overlay/README.sun7i-a20-overlays b/arch/arm/boot/dts/overlay/README.sun7i-a20-overlays
 new file mode 100644
-index 00000000..b676bc3f
+index 00000000..602a2087
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/README.sun7i-a20-overlays
-@@ -0,0 +1,371 @@
+@@ -0,0 +1,310 @@
 +This document describes overlays provided in the kernel packages
 +For generic Armbian overlays documentation please see
 +https://docs.armbian.com/User-Guide_Allwinner_overlays/
@@ -421,7 +363,6 @@ index 00000000..b676bc3f
 +- i2c2
 +- i2c3
 +- i2c4
-+- i2c-ds1307
 +- mmc2
 +- nand
 +- pps-gpio
@@ -429,7 +370,6 @@ index 00000000..b676bc3f
 +- spdif-out
 +- spi-add-cs1
 +- spi-jedec-nor
-+- spi-mcp2515
 +- spi-spidev
 +- uart1
 +- uart2
@@ -477,17 +417,6 @@ index 00000000..b676bc3f
 +
 +I2C4 pins (SCL, SDA): PI2, PI3
 +
-+### i2c-ds1307
-+
-+Activates Maxim/Dallas DS1307 RTC support
-+
-+Parameters:
-+
-+param_ds1307_i2c_bus (int)
-+	I2C bus RTC is connected to
-+	Required
-+	Supported values: 0, 1, 2, 3, 4
-+
 +### mmc2
 +
 +Activates SD/MMC controller 2. To be used on boards with second SD slot, eMMC
@@ -600,54 +529,6 @@ index 00000000..b676bc3f
 +	Default: 1000000
 +	Range: 3000 - 100000000
 +
-+### spi-mcp2515
-+
-+Activates mcp2515 SPI CAN controller connected to SPI bus
-+
-+SPI 0 pins (MOSI, MISO, SCK, CS0, CS1): PI12, PI13, PI11, PI10, PI14
-+SPI 1 pins (MOSI, MISO, SCK, CS0): PI18, PI19, PI17, PI16
-+SPI 2 pins a (MOSI, MISO, SCK, CS0): PC21, PC22, PC20, PC19
-+SPI 2 pins b (MOSI, MISO, SCK, CS0): PB16, PB17, PB15, PB14
-+
-+Parameters:
-+
-+param_mcp2515_spi_bus (int)
-+	SPI bus to activate mcp2515 support on
-+	Required
-+	Supported values: 0, 1, 2
-+
-+param_mcp2515_spi_cs (int)
-+	SPI chip select number for MCP2515 connected to SPI bus 0
-+	Optional
-+	Default: 0
-+	Supported values: 0, 1
-+	Using chip select 1 on SPI 0 requires using "spi-add-cs1" overlay
-+
-+param_mcp2515_max_freq (int)
-+	Maximum SPI frequency
-+	Optional
-+	Default: 10000000
-+	Range: 3000 - 100000000
-+
-+param_spi2_bus_pins (char)
-+	SPI bus 2 pinmux variant
-+	Optional
-+	Default: a
-+	Supported values: a, b
-+	Determines what pins SPI bus 2 is exposed on if SPI 2 is used by any overlay
-+
-+param_mcp2515_clk_freq (int)
-+	Onboard oscillator clock frequency
-+	Optional
-+	Default: 8000000
-+	Typical values: 8000000, 16000000
-+
-+param_mcp2515_int_pin (pin)
-+	Interrupt pin
-+	Optional
-+	Default: PH15
-+	Selected pin should support interrupts (EINT)
-+
 +### spi-spidev
 +
 +Activates SPIdev device node (/dev/spidevX.Y) for userspace SPI access,
@@ -828,10 +709,10 @@ index 00000000..5d394c9f
 +};
 diff --git a/arch/arm/boot/dts/overlay/sun4i-a10-fixup.scr-cmd b/arch/arm/boot/dts/overlay/sun4i-a10-fixup.scr-cmd
 new file mode 100644
-index 00000000..36cce8f9
+index 00000000..69af411f
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/sun4i-a10-fixup.scr-cmd
-@@ -0,0 +1,144 @@
+@@ -0,0 +1,109 @@
 +# overlays fixup script
 +# implements (or rather substitutes) overlay arguments functionality
 +# using u-boot scripting, environment variables and "fdt" command
@@ -861,26 +742,6 @@ index 00000000..36cce8f9
 +	env delete tmp_spi_path
 +fi
 +
-+if test -n "${param_mcp2515_spi_bus}"; then
-+	test "${param_mcp2515_spi_bus}" = "0" && setenv tmp_spi_path "spi@01c05000"
-+	test "${param_mcp2515_spi_bus}" = "1" && setenv tmp_spi_path "spi@01c06000"
-+	test "${param_mcp2515_spi_bus}" = "2" && setenv tmp_spi_path "spi@01c17000"
-+	fdt set /soc@01c00000/${tmp_spi_path} status "okay"
-+	fdt set /soc@01c00000/${tmp_spi_path}/mcp2515 status "okay"
-+	if test -n "${param_mcp2515_max_freq}"; then
-+		fdt set /soc@01c00000/${tmp_spi_path}/mcp2515 spi-max-frequency "<${param_mcp2515_max_freq}>"
-+	fi
-+	if test -n "${param_mcp2515_int_pin}"; then
-+		setenv tmp_bank "${param_mcp2515_int_pin}"
-+		setenv tmp_pin "${param_mcp2515_int_pin}"
-+		run decompose_pin
-+		fdt set /soc@01c00000/pinctrl@01c20800/can0_pin_irq pins "${param_mcp2515_int_pin}"
-+		fdt set /soc@01c00000/${tmp_spi_path}/mcp2515 interrupts "<${tmp_bank} ${tmp_pin} 0x2>"
-+		env delete tmp_pin tmp_bank tmp_spi_path
-+	fi
-+	env delete tmp_spi_path
-+fi
-+
 +if test -n "${param_spidev_spi_bus}"; then
 +	test "${param_spidev_spi_bus}" = "0" && setenv tmp_spi_path "spi@01c05000"
 +	test "${param_spidev_spi_bus}" = "1" && setenv tmp_spi_path "spi@01c06000"
@@ -893,21 +754,6 @@ index 00000000..36cce8f9
 +	env delete tmp_spi_path
 +fi
 +
-+if test -n "${param_mcp2515_clk_freq}"; then
-+	fdt set /clocks/can0_osc_fixed clock-frequency "<${param_mcp2515_clk_freq}>"
-+fi
-+
-+if test -n "${param_ds1307_i2c_bus}"; then
-+	test "${param_ds1307_i2c_bus}" = "0" && setenv tmp_i2c_path "i2c@01c2ac00"
-+	test "${param_ds1307_i2c_bus}" = "1" && setenv tmp_i2c_path "i2c@01c2b000"
-+	test "${param_ds1307_i2c_bus}" = "2" && setenv tmp_i2c_path "i2c@01c2b400"
-+	test "${param_ds1307_i2c_bus}" = "3" && setenv tmp_i2c_path "i2c@01c2b800"
-+	test "${param_ds1307_i2c_bus}" = "4" && setenv tmp_i2c_path "i2c@01c2c000"
-+	fdt set /soc@01c00000/${tmp_i2c_path} status "okay"
-+	fdt set /soc@01c00000/${tmp_i2c_path}/ds1307@68 status "okay"
-+	env delete tmp_i2c_path
-+fi
-+
 +if test "${param_spi2_bus_pins}" = "b"; then
 +	fdt get value tmp_phandle1 /soc@01c00000/pinctrl@01c20800/spi2@1 phandle
 +	fdt get value tmp_phandle2 /soc@01c00000/pinctrl@01c20800/spi2_cs0@1 phandle
@@ -976,66 +822,6 @@ index 00000000..36cce8f9
 +	fdt set /soc@01c00000/serial@01c29000 pinctrl-0 "<${tmp_phandle}>"
 +	env delete tmp_phandle
 +fi
-diff --git a/arch/arm/boot/dts/overlay/sun4i-a10-i2c-ds1307.dts b/arch/arm/boot/dts/overlay/sun4i-a10-i2c-ds1307.dts
-new file mode 100644
-index 00000000..898149f3
---- /dev/null
-+++ b/arch/arm/boot/dts/overlay/sun4i-a10-i2c-ds1307.dts
-@@ -0,0 +1,54 @@
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+	compatible = "allwinner,sun4i-a10";
-+
-+	fragment@0 {
-+		target-path = "/aliases";
-+		__overlay__ {
-+			i2c0 = "/soc@01c00000/i2c@01c2ac00";
-+			i2c1 = "/soc@01c00000/i2c@01c2b000";
-+			i2c2 = "/soc@01c00000/i2c@01c2b400";
-+		};
-+	};
-+
-+	fragment@1 {
-+		target = <&i2c0>;
-+		__overlay__ {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			ds1307@68 {
-+				compatible = "dallas,ds1307";
-+				reg = <0x68>;
-+				status = "disabled";
-+			};
-+		};
-+	};
-+
-+	fragment@2 {
-+		target = <&i2c1>;
-+		__overlay__ {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			ds1307@68 {
-+				compatible = "dallas,ds1307";
-+				reg = <0x68>;
-+				status = "disabled";
-+			};
-+		};
-+	};
-+
-+	fragment@3 {
-+		target = <&i2c2>;
-+		__overlay__ {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			ds1307@68 {
-+				compatible = "dallas,ds1307";
-+				reg = <0x68>;
-+				status = "disabled";
-+			};
-+		};
-+	};
-+};
 diff --git a/arch/arm/boot/dts/overlay/sun4i-a10-i2c1.dts b/arch/arm/boot/dts/overlay/sun4i-a10-i2c1.dts
 new file mode 100644
 index 00000000..44a7ce9b
@@ -1372,118 +1158,6 @@ index 00000000..a9feedf8
 +		};
 +	};
 +};
-diff --git a/arch/arm/boot/dts/overlay/sun4i-a10-spi-mcp2515.dts b/arch/arm/boot/dts/overlay/sun4i-a10-spi-mcp2515.dts
-new file mode 100644
-index 00000000..2d2ef6d7
---- /dev/null
-+++ b/arch/arm/boot/dts/overlay/sun4i-a10-spi-mcp2515.dts
-@@ -0,0 +1,106 @@
-+/dts-v1/;
-+/plugin/;
-+
-+#include <dt-bindings/interrupt-controller/irq.h>
-+
-+/ {
-+	compatible = "allwinner,sun4i-a10";
-+
-+	fragment@0 {
-+		target-path = "/aliases";
-+		__overlay__ {
-+			spi1 = "/soc/spi@01c06000";
-+			spi2 = "/soc/spi@01c17000";
-+			spi3 = "/soc/spi@01c1f000";
-+		};
-+	};
-+
-+	fragment@1 {
-+		target-path = "/clocks";
-+		__overlay__ {
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+			can0_osc_fixed: can0_osc_fixed {
-+				compatible = "fixed-clock";
-+				#clock-cells = <0>;
-+				clock-frequency  = <8000000>;
-+			};
-+		};
-+	};
-+
-+	fragment@2 {
-+		target = <&pio>;
-+		__overlay__ {
-+			can0_pin_irq: can0_pin_irq {
-+				pins = "PH15";
-+				function = "irq";
-+				bias-pull-up;
-+			};
-+		};
-+	};
-+
-+	fragment@3 {
-+		target = <&spi0>;
-+		__overlay__ {
-+			pinctrl-names = "default", "default";
-+			pinctrl-0 = <&spi0_pins_a>;
-+			pinctrl-1 = <&spi0_cs0_pins_a>;
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			mcp2515 {
-+				reg = <0>;
-+				compatible = "microchip,mcp2515";
-+				pinctrl-names = "default";
-+				pinctrl-0 = <&can0_pin_irq>;
-+				spi-max-frequency = <10000000>;
-+				interrupt-parent = <&pio>;
-+				interrupts = <7 15 IRQ_TYPE_EDGE_FALLING>; /* PH15 */
-+				clocks = <&can0_osc_fixed>;
-+				status = "disabled";
-+			};
-+		};
-+	};
-+
-+	fragment@4 {
-+		target = <&spi1>;
-+		__overlay__ {
-+			pinctrl-names = "default";
-+			pinctrl-0 = <&spi1_pins_a>, <&spi1_cs0_pins_a>;
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			mcp2515 {
-+				reg = <0>;
-+				compatible = "microchip,mcp2515";
-+				pinctrl-names = "default";
-+				pinctrl-0 = <&can0_pin_irq>;
-+				spi-max-frequency = <10000000>;
-+				interrupt-parent = <&pio>;
-+				interrupts = <7 15 IRQ_TYPE_EDGE_FALLING>; /* PH15 */
-+				clocks = <&can0_osc_fixed>;
-+				status = "disabled";
-+			};
-+		};
-+	};
-+
-+	fragment@5 {
-+		target = <&spi2>;
-+		__overlay__ {
-+			pinctrl-names = "default", "default";
-+			pinctrl-0 = <&spi2_pins_a>;
-+			pinctrl-1 = <&spi2_cs0_pins_a>;
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			mcp2515 {
-+				reg = <0>;
-+				compatible = "microchip,mcp2515";
-+				pinctrl-names = "default";
-+				pinctrl-0 = <&can0_pin_irq>;
-+				spi-max-frequency = <10000000>;
-+				interrupt-parent = <&pio>;
-+				interrupts = <7 15 IRQ_TYPE_EDGE_FALLING>; /* PH15 */
-+				clocks = <&can0_osc_fixed>;
-+				status = "disabled";
-+			};
-+		};
-+	};
-+};
 diff --git a/arch/arm/boot/dts/overlay/sun4i-a10-spi-spidev.dts b/arch/arm/boot/dts/overlay/sun4i-a10-spi-spidev.dts
 new file mode 100644
 index 00000000..6072c66a
@@ -1895,10 +1569,10 @@ index 00000000..8a5b98e2
 +};
 diff --git a/arch/arm/boot/dts/overlay/sun7i-a20-fixup.scr-cmd b/arch/arm/boot/dts/overlay/sun7i-a20-fixup.scr-cmd
 new file mode 100644
-index 00000000..3edaae92
+index 00000000..86028d79
 --- /dev/null
 +++ b/arch/arm/boot/dts/overlay/sun7i-a20-fixup.scr-cmd
-@@ -0,0 +1,166 @@
+@@ -0,0 +1,128 @@
 +# overlays fixup script
 +# implements (or rather substitutes) overlay arguments functionality
 +# using u-boot scripting, environment variables and "fdt" command
@@ -1931,29 +1605,6 @@ index 00000000..3edaae92
 +	env delete tmp_spi_path
 +fi
 +
-+if test -n "${param_mcp2515_spi_bus}"; then
-+	test "${param_mcp2515_spi_bus}" = "0" && setenv tmp_spi_path "spi@01c05000"
-+	test "${param_mcp2515_spi_bus}" = "1" && setenv tmp_spi_path "spi@01c06000"
-+	test "${param_mcp2515_spi_bus}" = "2" && setenv tmp_spi_path "spi@01c17000"
-+	fdt set /soc@01c00000/${tmp_spi_path} status "okay"
-+	fdt set /soc@01c00000/${tmp_spi_path}/mcp2515 status "okay"
-+	if test -n "${param_mcp2515_max_freq}"; then
-+		fdt set /soc@01c00000/${tmp_spi_path}/mcp2515 spi-max-frequency "<${param_mcp2515_max_freq}>"
-+	fi
-+	if test "${param_mcp2515_spi_bus}" = "0" && test "${param_mcp2515_spi_cs}" = "1"; then
-+		fdt set /soc@01c00000/${tmp_spi_path}/mcp2515 reg "<1>"
-+	fi
-+	if test -n "${param_mcp2515_int_pin}"; then
-+		setenv tmp_bank "${param_mcp2515_int_pin}"
-+		setenv tmp_pin "${param_mcp2515_int_pin}"
-+		run decompose_pin
-+		fdt set /soc@01c00000/pinctrl@01c20800/can0_pin_irq pins "${param_mcp2515_int_pin}"
-+		fdt set /soc@01c00000/${tmp_spi_path}/mcp2515 interrupts "<${tmp_bank} ${tmp_pin} 0x2>"
-+		env delete tmp_pin tmp_bank tmp_spi_path
-+	fi
-+	env delete tmp_spi_path
-+fi
-+
 +if test -n "${param_spidev_spi_bus}"; then
 +	test "${param_spidev_spi_bus}" = "0" && setenv tmp_spi_path "spi@01c05000"
 +	test "${param_spidev_spi_bus}" = "1" && setenv tmp_spi_path "spi@01c06000"
@@ -1969,21 +1620,6 @@ index 00000000..3edaae92
 +	env delete tmp_spi_path
 +fi
 +
-+if test -n "${param_mcp2515_clk_freq}"; then
-+	fdt set /clocks/can0_osc_fixed clock-frequency "<${param_mcp2515_clk_freq}>"
-+fi
-+
-+if test -n "${param_ds1307_i2c_bus}"; then
-+	test "${param_ds1307_i2c_bus}" = "0" && setenv tmp_i2c_path "i2c@01c2ac00"
-+	test "${param_ds1307_i2c_bus}" = "1" && setenv tmp_i2c_path "i2c@01c2b000"
-+	test "${param_ds1307_i2c_bus}" = "2" && setenv tmp_i2c_path "i2c@01c2b400"
-+	test "${param_ds1307_i2c_bus}" = "3" && setenv tmp_i2c_path "i2c@01c2b800"
-+	test "${param_ds1307_i2c_bus}" = "4" && setenv tmp_i2c_path "i2c@01c2c000"
-+	fdt set /soc@01c00000/${tmp_i2c_path} status "okay"
-+	fdt set /soc@01c00000/${tmp_i2c_path}/ds1307@68 status "okay"
-+	env delete tmp_i2c_path
-+fi
-+
 +if test "${param_spi2_bus_pins}" = "b"; then
 +	fdt get value tmp_phandle1 /soc@01c00000/pinctrl@01c20800/spi2@1 phandle
 +	fdt get value tmp_phandle2 /soc@01c00000/pinctrl@01c20800/spi2_cs0@1 phandle
@@ -2065,94 +1701,6 @@ index 00000000..3edaae92
 +	fdt set /soc@01c00000/serial@01c29000 pinctrl-0 "<${tmp_phandle}>"
 +	env delete tmp_phandle
 +fi
-diff --git a/arch/arm/boot/dts/overlay/sun7i-a20-i2c-ds1307.dts b/arch/arm/boot/dts/overlay/sun7i-a20-i2c-ds1307.dts
-new file mode 100644
-index 00000000..c72f8d98
---- /dev/null
-+++ b/arch/arm/boot/dts/overlay/sun7i-a20-i2c-ds1307.dts
-@@ -0,0 +1,82 @@
-+/dts-v1/;
-+/plugin/;
-+
-+/ {
-+	compatible = "allwinner,sun7i-a20";
-+
-+	fragment@0 {
-+		target-path = "/aliases";
-+		__overlay__ {
-+			i2c0 = "/soc@01c00000/i2c@01c2ac00";
-+			i2c1 = "/soc@01c00000/i2c@01c2b000";
-+			i2c2 = "/soc@01c00000/i2c@01c2b400";
-+			i2c3 = "/soc@01c00000/i2c@01c2b800";
-+			i2c4 = "/soc@01c00000/i2c@01c2c000";
-+		};
-+	};
-+
-+	fragment@1 {
-+		target = <&i2c0>;
-+		__overlay__ {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			ds1307@68 {
-+				compatible = "dallas,ds1307";
-+				reg = <0x68>;
-+				status = "disabled";
-+			};
-+		};
-+	};
-+
-+	fragment@2 {
-+		target = <&i2c1>;
-+		__overlay__ {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			ds1307@68 {
-+				compatible = "dallas,ds1307";
-+				reg = <0x68>;
-+				status = "disabled";
-+			};
-+		};
-+	};
-+
-+	fragment@3 {
-+		target = <&i2c2>;
-+		__overlay__ {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			ds1307@68 {
-+				compatible = "dallas,ds1307";
-+				reg = <0x68>;
-+				status = "disabled";
-+			};
-+		};
-+	};
-+
-+	fragment@4 {
-+		target = <&i2c3>;
-+		__overlay__ {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			ds1307@68 {
-+				compatible = "dallas,ds1307";
-+				reg = <0x68>;
-+				status = "disabled";
-+			};
-+		};
-+	};
-+
-+	fragment@5 {
-+		target = <&i2c4>;
-+		__overlay__ {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			ds1307@68 {
-+				compatible = "dallas,ds1307";
-+				reg = <0x68>;
-+				status = "disabled";
-+			};
-+		};
-+	};
-+};
 diff --git a/arch/arm/boot/dts/overlay/sun7i-a20-i2c1.dts b/arch/arm/boot/dts/overlay/sun7i-a20-i2c1.dts
 new file mode 100644
 index 00000000..d1146ee4
@@ -2601,118 +2149,6 @@ index 00000000..08177a33
 +		};
 +	};
 +};
-diff --git a/arch/arm/boot/dts/overlay/sun7i-a20-spi-mcp2515.dts b/arch/arm/boot/dts/overlay/sun7i-a20-spi-mcp2515.dts
-new file mode 100644
-index 00000000..148c06e8
---- /dev/null
-+++ b/arch/arm/boot/dts/overlay/sun7i-a20-spi-mcp2515.dts
-@@ -0,0 +1,106 @@
-+/dts-v1/;
-+/plugin/;
-+
-+#include <dt-bindings/interrupt-controller/irq.h>
-+
-+/ {
-+	compatible = "allwinner,sun7i-a20";
-+
-+	fragment@0 {
-+		target-path = "/aliases";
-+		__overlay__ {
-+			spi1 = "/soc/spi@01c06000";
-+			spi2 = "/soc/spi@01c17000";
-+			spi3 = "/soc/spi@01c1f000";
-+		};
-+	};
-+
-+	fragment@1 {
-+		target-path = "/clocks";
-+		__overlay__ {
-+			#address-cells = <1>;
-+			#size-cells = <1>;
-+			can0_osc_fixed: can0_osc_fixed {
-+				compatible = "fixed-clock";
-+				#clock-cells = <0>;
-+				clock-frequency  = <8000000>;
-+			};
-+		};
-+	};
-+
-+	fragment@2 {
-+		target = <&pio>;
-+		__overlay__ {
-+			can0_pin_irq: can0_pin_irq {
-+				pins = "PH15";
-+				function = "irq";
-+				bias-pull-up;
-+			};
-+		};
-+	};
-+
-+	fragment@3 {
-+		target = <&spi0>;
-+		__overlay__ {
-+			pinctrl-names = "default", "default";
-+			pinctrl-0 = <&spi0_pins_a>;
-+			pinctrl-1 = <&spi0_cs0_pins_a>;
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			mcp2515 {
-+				reg = <0>;
-+				compatible = "microchip,mcp2515";
-+				pinctrl-names = "default";
-+				pinctrl-0 = <&can0_pin_irq>;
-+				spi-max-frequency = <10000000>;
-+				interrupt-parent = <&pio>;
-+				interrupts = <7 15 IRQ_TYPE_EDGE_FALLING>; /* PH15 */
-+				clocks = <&can0_osc_fixed>;
-+				status = "disabled";
-+			};
-+		};
-+	};
-+
-+	fragment@4 {
-+		target = <&spi1>;
-+		__overlay__ {
-+			pinctrl-names = "default";
-+			pinctrl-0 = <&spi1_pins_a>, <&spi1_cs0_pins_a>;
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			mcp2515 {
-+				reg = <0>;
-+				compatible = "microchip,mcp2515";
-+				pinctrl-names = "default";
-+				pinctrl-0 = <&can0_pin_irq>;
-+				spi-max-frequency = <10000000>;
-+				interrupt-parent = <&pio>;
-+				interrupts = <7 15 IRQ_TYPE_EDGE_FALLING>; /* PH15 */
-+				clocks = <&can0_osc_fixed>;
-+				status = "disabled";
-+			};
-+		};
-+	};
-+
-+	fragment@5 {
-+		target = <&spi2>;
-+		__overlay__ {
-+			pinctrl-names = "default", "default";
-+			pinctrl-0 = <&spi2_pins_a>;
-+			pinctrl-1 = <&spi2_cs0_pins_a>;
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			mcp2515 {
-+				reg = <0>;
-+				compatible = "microchip,mcp2515";
-+				pinctrl-names = "default";
-+				pinctrl-0 = <&can0_pin_irq>;
-+				spi-max-frequency = <10000000>;
-+				interrupt-parent = <&pio>;
-+				interrupts = <7 15 IRQ_TYPE_EDGE_FALLING>; /* PH15 */
-+				clocks = <&can0_osc_fixed>;
-+				status = "disabled";
-+			};
-+		};
-+	};
-+};
 diff --git a/arch/arm/boot/dts/overlay/sun7i-a20-spi-spidev.dts b/arch/arm/boot/dts/overlay/sun7i-a20-spi-spidev.dts
 new file mode 100644
 index 00000000..c52ba0e4