diff --git a/patch/u-boot/u-boot-sunxi/Allwinner-Fix-incorrect-ram-size-detection-for-H6-boards.patch b/patch/u-boot/u-boot-sunxi/Allwinner-Fix-incorrect-ram-size-detection-for-H6-boards.patch new file mode 100644 index 0000000000..d99ddfd889 --- /dev/null +++ b/patch/u-boot/u-boot-sunxi/Allwinner-Fix-incorrect-ram-size-detection-for-H6-boards.patch @@ -0,0 +1,47 @@ +From 671801e0eeeedda435cbebf42db4957f59a511ec Mon Sep 17 00:00:00 2001 +From: Gunjan Gupta +Date: Fri, 29 Sep 2023 08:26:47 +0000 +Subject: [PATCH] Allwinner: Fix incorrect ram size detection for H6 boards + +--- + arch/arm/mach-sunxi/dram_helpers.c | 1 + + arch/arm/mach-sunxi/dram_sun50i_h6.c | 4 ++++ + 2 files changed, 5 insertions(+) + +diff --git a/arch/arm/mach-sunxi/dram_helpers.c b/arch/arm/mach-sunxi/dram_helpers.c +index cdf2750f1c5..5758c58e070 100644 +--- a/arch/arm/mach-sunxi/dram_helpers.c ++++ b/arch/arm/mach-sunxi/dram_helpers.c +@@ -32,6 +32,7 @@ void mctl_await_completion(u32 *reg, u32 mask, u32 val) + #ifndef CONFIG_MACH_SUNIV + bool mctl_mem_matches(u32 offset) + { ++ dsb(); + /* Try to write different values to RAM at two addresses */ + writel(0, CFG_SYS_SDRAM_BASE); + writel(0xaa55aa55, (ulong)CFG_SYS_SDRAM_BASE + offset); +diff --git a/arch/arm/mach-sunxi/dram_sun50i_h6.c b/arch/arm/mach-sunxi/dram_sun50i_h6.c +index b332f3a3e4a..4675ec932e3 100644 +--- a/arch/arm/mach-sunxi/dram_sun50i_h6.c ++++ b/arch/arm/mach-sunxi/dram_sun50i_h6.c +@@ -611,6 +611,8 @@ static void mctl_auto_detect_dram_size(struct dram_para *para) + para->rows = 18; + mctl_core_init(para); + ++ udelay(50); ++ + for (para->rows = 13; para->rows < 18; para->rows++) { + /* 8 banks, 8 bit per byte and 16/32 bit width */ + if (mctl_mem_matches((1 << (para->rows + para->cols + +@@ -622,6 +624,8 @@ static void mctl_auto_detect_dram_size(struct dram_para *para) + para->cols = 11; + mctl_core_init(para); + ++ udelay(50); ++ + for (para->cols = 8; para->cols < 11; para->cols++) { + /* 8 bits per byte and 16/32 bit width */ + if (mctl_mem_matches(1 << (para->cols + 1 + +-- +2.34.1 + diff --git a/patch/u-boot/u-boot-sunxi/unreliable-dram.patch b/patch/u-boot/u-boot-sunxi/unreliable-dram.patch deleted file mode 100644 index af1e763be9..0000000000 --- a/patch/u-boot/u-boot-sunxi/unreliable-dram.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 04751c559bf01f6a3098fb92c7c25c9feb293b74 Mon Sep 17 00:00:00 2001 -From: Ondrej Jirman -Date: Mon, 29 Jul 2019 01:39:42 +0200 -Subject: [PATCH] Fix unreliable detection of DRAM size on Orange Pi 3 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Orange Pi 3 has 2 GiB of DRAM, that sometime get misdetected -as 4 GiB, due to false negative result from mctl_mem_matches() -when detecting number of column address bits. This leads to -u-boot detecting more address bits than there are and the -boot process hangs shortly after. - -In mctl_mem_matches() we need to wait for each write to finish, -separately. Without this, the check is not reliable for some -unknown reason, probably having to do with unpredictable memory -access ordering. - -Patch was made with help from André Przywara, who noticed that -my original idea about detection failing due to read-back from -cache without involving DRAM was false, because data cache is -still of at the time of the DRAM size autodetection. - -Signed-off-by: Ondrej Jirman -Cc: André Przywara ---- - arch/arm/mach-sunxi/dram_helpers.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm/mach-sunxi/dram_helpers.c b/arch/arm/mach-sunxi/dram_helpers.c -index cdf2750f1c..16938fab21 100644 ---- a/arch/arm/mach-sunxi/dram_helpers.c -+++ b/arch/arm/mach-sunxi/dram_helpers.c -@@ -34,6 +34,7 @@ bool mctl_mem_matches(u32 offset) - { - /* Try to write different values to RAM at two addresses */ - writel(0, CFG_SYS_SDRAM_BASE); -+ dsb(); - writel(0xaa55aa55, (ulong)CFG_SYS_SDRAM_BASE + offset); - dsb(); - /* Check if the same value is actually observed when reading back */ --- -2.34.1 -