From 8cac6dba946b5cf50f82e6e0f6d144e1b6f88606 Mon Sep 17 00:00:00 2001 From: Aditya Prayoga Date: Thu, 7 Feb 2019 18:16:42 +0800 Subject: [PATCH 1/3] kernel: mvebu-next: Add Wake on GPIO support The SoC provides several waking options sourced by different peripherals to take the system out of power save modes. One of the options is Wake on GPIO. This patch implements missing function to support gpio as wakeup source and properly route it to upper interrupt controller (Arm GIC). Signed-off-by: Aditya Prayoga --- ...-mvebu-gpio-add_wake_on_gpio_support.patch | 90 +++++++++++++++++++ 1 file changed, 90 insertions(+) create mode 100644 patch/kernel/mvebu-next/92-mvebu-gpio-add_wake_on_gpio_support.patch diff --git a/patch/kernel/mvebu-next/92-mvebu-gpio-add_wake_on_gpio_support.patch b/patch/kernel/mvebu-next/92-mvebu-gpio-add_wake_on_gpio_support.patch new file mode 100644 index 0000000000..aa3dcf5b99 --- /dev/null +++ b/patch/kernel/mvebu-next/92-mvebu-gpio-add_wake_on_gpio_support.patch @@ -0,0 +1,90 @@ +diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c +index 661c5a38f..a25d61d54 100644 +--- a/drivers/gpio/gpio-mvebu.c ++++ b/drivers/gpio/gpio-mvebu.c +@@ -38,6 +38,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -133,7 +134,7 @@ struct mvebu_gpio_chip { + struct regmap *regs; + u32 offset; + struct regmap *percpu_regs; +- int irqbase; ++ int bank_irq[4]; + struct irq_domain *domain; + int soc_variant; + +@@ -608,6 +609,33 @@ static void mvebu_gpio_irq_handler(struct irq_desc *desc) + chained_irq_exit(chip, desc); + } + ++/* ++ * Set interrupt number "irq" in the GPIO as a wake-up source. ++ * While system is running, all registered GPIO interrupts need to have ++ * wake-up enabled. When system is suspended, only selected GPIO interrupts ++ * need to have wake-up enabled. ++ * @param irq interrupt source number ++ * @param enable enable as wake-up if equal to non-zero ++ * @return This function returns 0 on success. ++ */ ++static int mvebu_gpio_set_wake_irq(struct irq_data *d, unsigned int enable) ++{ ++ struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); ++ struct mvebu_gpio_chip *mvchip = gc->private; ++ int irq; ++ int bank; ++ ++ bank = d->hwirq % 8; ++ irq = mvchip->bank_irq[bank]; ++ ++ if (enable) ++ enable_irq_wake(irq); ++ else ++ disable_irq_wake(irq); ++ ++ return 0; ++} ++ + /* + * Functions implementing the pwm_chip methods + */ +@@ -1277,7 +1305,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev) + + err = irq_alloc_domain_generic_chips( + mvchip->domain, ngpios, 2, np->name, handle_level_irq, +- IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_LEVEL, 0, 0); ++ IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_LEVEL, 0, IRQ_GC_INIT_NESTED_LOCK); + if (err) { + dev_err(&pdev->dev, "couldn't allocate irq chips %s (DT).\n", + mvchip->chip.label); +@@ -1295,6 +1323,8 @@ static int mvebu_gpio_probe(struct platform_device *pdev) + ct->chip.irq_mask = mvebu_gpio_level_irq_mask; + ct->chip.irq_unmask = mvebu_gpio_level_irq_unmask; + ct->chip.irq_set_type = mvebu_gpio_irq_set_type; ++ ct->chip.irq_set_wake = mvebu_gpio_set_wake_irq; ++ ct->chip.flags = IRQCHIP_SET_TYPE_MASKED | IRQCHIP_MASK_ON_SUSPEND; + ct->chip.name = mvchip->chip.label; + + ct = &gc->chip_types[1]; +@@ -1303,6 +1333,8 @@ static int mvebu_gpio_probe(struct platform_device *pdev) + ct->chip.irq_mask = mvebu_gpio_edge_irq_mask; + ct->chip.irq_unmask = mvebu_gpio_edge_irq_unmask; + ct->chip.irq_set_type = mvebu_gpio_irq_set_type; ++ ct->chip.irq_set_wake = mvebu_gpio_set_wake_irq; ++ ct->chip.flags = IRQCHIP_SET_TYPE_MASKED | IRQCHIP_MASK_ON_SUSPEND; + ct->handler = handle_edge_irq; + ct->chip.name = mvchip->chip.label; + +@@ -1318,6 +1350,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev) + continue; + irq_set_chained_handler_and_data(irq, mvebu_gpio_irq_handler, + mvchip); ++ mvchip->bank_irq[i] = irq; + } + + /* Some MVEBU SoCs have simple PWM support for GPIO lines */ From 1ec2a163fe4c6c5076ced620008030e25e575084 Mon Sep 17 00:00:00 2001 From: Aditya Prayoga Date: Thu, 7 Feb 2019 18:45:31 +0800 Subject: [PATCH 2/3] mvebu-next: helios4: Add Wake on LAN support Interrupt pin of the Ethernet PHY is connected to GPIO. The PHY can be configured to raise interrupt when it received WoL magic packet. This patch use gpio-keys as wakeup source for Wake on LAN as currently there is no way to use the GPIO directly under mvneta driver. Signed-off-by: Aditya Prayoga --- ...-helios4-dts-add-wake-on-lan-support.patch | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 patch/kernel/mvebu-next/94-helios4-dts-add-wake-on-lan-support.patch diff --git a/patch/kernel/mvebu-next/94-helios4-dts-add-wake-on-lan-support.patch b/patch/kernel/mvebu-next/94-helios4-dts-add-wake-on-lan-support.patch new file mode 100644 index 0000000000..313ec83458 --- /dev/null +++ b/patch/kernel/mvebu-next/94-helios4-dts-add-wake-on-lan-support.patch @@ -0,0 +1,23 @@ +diff --git a/arch/arm/boot/dts/armada-388-helios4.dts b/arch/arm/boot/dts/armada-388-helios4.dts +index 705adfa8c..d5afbfc53 100644 +--- a/arch/arm/boot/dts/armada-388-helios4.dts ++++ b/arch/arm/boot/dts/armada-388-helios4.dts +@@ -84,6 +84,18 @@ + }; + }; + ++ gpio-keys { ++ compatible = "gpio-keys"; ++ pinctrl-0 = <µsom_phy0_int_pins>; ++ ++ wol { ++ label = "Wake-On-LAN"; ++ linux,code = ; ++ gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; ++ wakeup-source; ++ }; ++ }; ++ + io-leds { + compatible = "gpio-leds"; + sata1-led { From 9f9e92a4158d7ac03ab07c62fb984ee3d6a6ab2c Mon Sep 17 00:00:00 2001 From: Aditya Prayoga Date: Thu, 7 Feb 2019 20:23:56 +0800 Subject: [PATCH 3/3] helios4: tweak fancontrol config User reported HDD high temp during idle, due to fan stop spinning. Readjust the fancontrol configuration to always run in low speed during idle. --- packages/bsp/helios4/fancontrol_pwm-fan-mvebu-next.conf | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/packages/bsp/helios4/fancontrol_pwm-fan-mvebu-next.conf b/packages/bsp/helios4/fancontrol_pwm-fan-mvebu-next.conf index b92f164fb4..71abc921d7 100644 --- a/packages/bsp/helios4/fancontrol_pwm-fan-mvebu-next.conf +++ b/packages/bsp/helios4/fancontrol_pwm-fan-mvebu-next.conf @@ -2,8 +2,8 @@ # Temp source : /dev/thermal-cpu INTERVAL=10 FCTEMPS=/dev/fan-j10/pwm1=/dev/thermal-cpu/temp1_input /dev/fan-j17/pwm1=/dev/thermal-cpu/temp1_input -MINTEMP=/dev/fan-j10/pwm1=70 /dev/fan-j17/pwm1=70 -MAXTEMP=/dev/fan-j10/pwm1=90 /dev/fan-j17/pwm1=90 +MINTEMP=/dev/fan-j10/pwm1=60 /dev/fan-j17/pwm1=60 +MAXTEMP=/dev/fan-j10/pwm1=80 /dev/fan-j17/pwm1=80 MINSTART=/dev/fan-j10/pwm1=20 /dev/fan-j17/pwm1=20 MINSTOP=/dev/fan-j10/pwm1=29 /dev/fan-j17/pwm1=29 -MINPWM=0 +MINPWM=20