From ddc52ce4dec83aaa2e8ca43a02f8ecb2c4bd76f1 Mon Sep 17 00:00:00 2001 From: 5kft <5kft@users.noreply.github.com> Date: Fri, 20 Jul 2018 22:11:16 -0700 Subject: [PATCH 1/2] fixed issues with sunxi overlay kernel patches removed conflicting patches from "general-sunxi64-overlays.patch" as they are already provided by "general-sunxi-overlays.patch" --- .../sunxi-next/general-sunxi-overlays.patch | 25 +- .../sunxi-next/general-sunxi64-overlays.patch | 1758 ----------------- 2 files changed, 20 insertions(+), 1763 deletions(-) delete mode 100644 patch/kernel/sunxi-next/general-sunxi64-overlays.patch diff --git a/patch/kernel/sunxi-next/general-sunxi-overlays.patch b/patch/kernel/sunxi-next/general-sunxi-overlays.patch index 74cf3a2de2..7cd8296c9c 100644 --- a/patch/kernel/sunxi-next/general-sunxi-overlays.patch +++ b/patch/kernel/sunxi-next/general-sunxi-overlays.patch @@ -4520,6 +4520,16 @@ index 0000000..f4ccb7f + }; + }; +}; +diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile +index 94de6044..1e85fd7c 100644 +--- a/arch/arm64/boot/dts/allwinner/Makefile ++++ b/arch/arm64/boot/dts/allwinner/Makefile +@@ -14,3 +14,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb ++subdir-y := $(dts-dirs) overlay +\ No newline at end of file diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile new file mode 100644 index 0000000..5cad268 @@ -4531,7 +4541,7 @@ index 0000000..5cad268 + sun50i-a64-i2c0.dtbo \ + sun50i-a64-i2c1.dtbo \ + sun50i-a64-pps-gpio.dtbo \ -+ sun50i-a64/sun50i-a64-spi-add-cs1.dtbo \ ++ sun50i-a64-spi-add-cs1.dtbo \ + sun50i-a64-spi-jedec-nor.dtbo \ + sun50i-a64-spi-spidev.dtbo \ + sun50i-a64-uart1.dtbo \ @@ -4559,13 +4569,18 @@ index 0000000..5cad268 + sun50i-h5-usbhost3.dtbo \ + sun50i-h5-w1-gpio.dtbo + -+scr-$(CONFIG_ARCH_SUNXI) += sun50i-a64-fixup.scr -+scr-$(CONFIG_ARCH_SUNXI) += sun50i-h5-fixup.scr ++scr-$(CONFIG_ARCH_SUNXI) += \ ++ sun50i-a64-fixup.scr \ ++ sun50i-h5-fixup.scr + -+dtbotxt-$(CONFIG_ARCH_SUNXI) += README.sun50i-a64-overlays -+dtbotxt-$(CONFIG_ARCH_SUNXI) += README.sun50i-h5-overlays ++dtbotxt-$(CONFIG_ARCH_SUNXI) += \ ++ README.sun50i-a64-overlays \ ++ README.sun50i-h5-overlays + ++targets += $(dtbo-y) $(scr-y) $(dtbotxt-y) + ++always := $(dtbo-y) $(scr-y) $(dtbotxt-y) ++clean-files := *.dtbo *.scr diff --git a/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-a64-overlays b/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-a64-overlays new file mode 100644 index 0000000..cd9dbc6 diff --git a/patch/kernel/sunxi-next/general-sunxi64-overlays.patch b/patch/kernel/sunxi-next/general-sunxi64-overlays.patch deleted file mode 100644 index 21ae63d280..0000000000 --- a/patch/kernel/sunxi-next/general-sunxi64-overlays.patch +++ /dev/null @@ -1,1758 +0,0 @@ -diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile -index 94de6044..1e85fd7c 100644 ---- a/arch/arm64/boot/dts/allwinner/Makefile -+++ b/arch/arm64/boot/dts/allwinner/Makefile -@@ -14,3 +14,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb - dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb - dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb - dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb -+subdir-y := $(dts-dirs) overlay -\ No newline at end of file -diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile -new file mode 100644 -index 00000000..4c945d83 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile -@@ -0,0 +1,43 @@ -+dtbo-$(CONFIG_ARCH_SUNXI) += \ -+ sun50i-a64-i2c0.dtbo \ -+ sun50i-a64-i2c1.dtbo \ -+ sun50i-a64-pps-gpio.dtbo \ -+ sun50i-a64-spi-add-cs1.dtbo \ -+ sun50i-a64-spi-jedec-nor.dtbo \ -+ sun50i-a64-spi-spidev.dtbo \ -+ sun50i-a64-uart1.dtbo \ -+ sun50i-a64-uart2.dtbo \ -+ sun50i-a64-uart3.dtbo \ -+ sun50i-a64-uart4.dtbo \ -+ sun50i-a64-w1-gpio.dtbo \ -+ sun50i-h5-analog-codec.dtbo \ -+ sun50i-h5-cir.dtbo \ -+ sun50i-h5-i2c0.dtbo \ -+ sun50i-h5-i2c1.dtbo \ -+ sun50i-h5-i2c2.dtbo \ -+ sun50i-h5-pps-gpio.dtbo \ -+ sun50i-h5-pwm.dtbo \ -+ sun50i-h5-spdif-out.dtbo \ -+ sun50i-h5-spi-add-cs1.dtbo \ -+ sun50i-h5-spi-jedec-nor.dtbo \ -+ sun50i-h5-spi-spidev.dtbo \ -+ sun50i-h5-uart1.dtbo \ -+ sun50i-h5-uart2.dtbo \ -+ sun50i-h5-uart3.dtbo \ -+ sun50i-h5-usbhost0.dtbo \ -+ sun50i-h5-usbhost2.dtbo \ -+ sun50i-h5-usbhost3.dtbo \ -+ sun50i-h5-w1-gpio.dtbo -+ -+scr-$(CONFIG_ARCH_SUNXI) += \ -+ sun50i-a64-fixup.scr \ -+ sun50i-h5-fixup.scr -+ -+dtbotxt-$(CONFIG_ARCH_SUNXI) += \ -+ README.sun50i-a64-overlays \ -+ README.sun50i-h5-overlays -+ -+targets += $(dtbo-y) $(scr-y) $(dtbotxt-y) -+ -+always := $(dtbo-y) $(scr-y) $(dtbotxt-y) -+clean-files := *.dtbo *.scr -diff --git a/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-a64-overlays b/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-a64-overlays -new file mode 100644 -index 00000000..cd9dbc68 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-a64-overlays -@@ -0,0 +1,196 @@ -+This document describes overlays provided in the kernel packages -+For generic Armbian overlays documentation please see -+https://docs.armbian.com/Hardware_Allwinner_overlays/ -+ -+### Platform: -+ -+sun50i-a64 (Allwinner A64) -+ -+### Platform details: -+ -+Supported pin banks: PB, PC, PD, PH -+ -+Both SPI controllers have only one hardware CS pin exposed, -+adding fixed software (GPIO) chip selects is possible with a separate overlay -+ -+I2C controller 2 (PE14, PE15) pins are used for non-I2C CSI functions or are not available -+on supported boards, so this controller is not supported in provided overlays -+ -+### Provided overlays: -+ -+- i2c0 -+- i2c1 -+- pps-gpio -+- spi-add-cs1 -+- spi-jedec-nor -+- spi-spidev -+- uart1 -+- uart2 -+- uart3 -+- uart4 -+- w1-gpio -+ -+### Overlay details: -+ -+### i2c0 -+ -+Activates TWI/I2C bus 0 -+ -+I2C0 pins (SCL, SDA): PH0, PH1 -+ -+### i2c1 -+ -+Activates TWI/I2C bus 1 -+ -+I2C1 pins (SCL, SDA): PH2, PH3 -+ -+### pps-gpio -+ -+Activates pulse-per-second GPIO client -+ -+Parameters: -+ -+param_pps_pin (pin) -+ Pin PPS source is connected to -+ Optional -+ Default: PD4 -+ -+param_pps_falling_edge (bool) -+ Assert by falling edge -+ Optional -+ Default: 0 -+ When set (to 1), assert is indicated by a falling edge -+ (instead of by a rising edge) -+ -+### spi-add-cs1 -+ -+Adds support for using SPI chip select 1 with GPIO for both SPI controllers -+Respective GPIO will be claimed only if controller is enabled by another overlay -+This overlay is required for using chip select 1 with other SPI overlays -+ -+SPI 0 pins (CS1): PB6 -+SPI 1 pins (CS1): PD6 -+ -+### spi-jedec-nor -+ -+Activates MTD support for JEDEC compatible SPI NOR flash chips on SPI bus -+supported by the kernel SPI NOR driver -+ -+SPI 0 pins (MOSI, MISO, SCK, CS): PC0, PC1, PC2, PC3 -+SPI 1 pins (MOSI, MISO, SCK, CS): PD2, PD3, PD1, PD0 -+ -+Parameters: -+ -+param_spinor_spi_bus (int) -+ SPI bus to activate SPI NOR flash support on -+ Required -+ Supported values: 0, 1 -+ -+param_spinor_spi_cs (int) -+ SPI chip select number -+ Optional -+ Default: 0 -+ Supported values: 0, 1 -+ Using chip select 1 requires using "spi-add-cs1" overlay -+ -+param_spinor_max_freq (int) -+ Maximum SPI frequency -+ Optional -+ Default: 1000000 -+ Range: 3000 - 100000000 -+ -+### spi-spidev -+ -+Activates SPIdev device node (/dev/spidevX.Y) for userspace SPI access, -+where X is the bus number and Y is the CS number -+ -+SPI 0 pins (MOSI, MISO, SCK, CS): PC0, PC1, PC2, PC3 -+SPI 1 pins (MOSI, MISO, SCK, CS): PD2, PD3, PD1, PD0 -+ -+Parameters: -+ -+param_spidev_spi_bus (int) -+ SPI bus to activate SPIdev support on -+ Required -+ Supported values: 0, 1 -+ -+param_spidev_spi_cs (int) -+ SPI chip select number -+ Optional -+ Default: 0 -+ Supported values: 0, 1 -+ Using chip select 1 requires using "spi-add-cs1" overlay -+ -+param_spidev_max_freq (int) -+ Maximum SPIdev frequency -+ Optional -+ Default: 1000000 -+ Range: 3000 - 100000000 -+ -+### uart1 -+ -+Activates serial port 1 (/dev/ttyS1) -+ -+UART 1 pins (TX, RX, RTS, CTS): PG6, PG7, PG8, PG9 -+ -+Parameters: -+ -+param_uart1_rtscts (bool) -+ Enable RTS and CTS pins -+ Optional -+ Default: 0 -+ Set to 1 to enable -+ -+### uart2 -+ -+Activates serial port 2 (/dev/ttyS2) -+ -+UART 2 pins (TX, RX, RTS, CTS): PB0, PB1, PB2, PB3 -+ -+Parameters: -+ -+param_uart2_rtscts (bool) -+ Enable RTS and CTS pins -+ Optional -+ Default: 0 -+ Set to 1 to enable CTS and RTS pins -+ -+### uart3 -+ -+Activates serial port 3 (/dev/ttyS3) -+ -+UART 3 pins (TX, RX): PD0, PD1 -+ -+### uart4 -+ -+Activates serial port 4 (/dev/ttyS4) -+ -+UART 4 pins (TX, RX, RTS, CTS): PD2, PD3, PD4, PD5 -+ -+Parameters: -+ -+param_uart2_rtscts (bool) -+ Enable RTS and CTS pins -+ Optional -+ Default: 0 -+ Set to 1 to enable CTS and RTS pins -+ -+### w1-gpio -+ -+Activates 1-Wire GPIO master -+Requires external pull-up resistor on data pin -+ -+Parameters: -+ -+param_w1_pin (pin) -+ Data pin for 1-Wire master -+ Optional -+ Default: PD4 -+ -+param_w1_pin_int_pullup (bool) -+ Enable internal pull-up for the data pin -+ Optional -+ Default: 0 -+ Set to 1 to enable the pull-up -+ This option should not be used with multiple devices, parasite power setup -+ or long wires - please use external pull-up resistor instead -diff --git a/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-h5-overlays b/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-h5-overlays -new file mode 100644 -index 00000000..ad5feef1 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-h5-overlays -@@ -0,0 +1,245 @@ -+This document describes overlays provided in the kernel packages -+For generic Armbian overlays documentation please see -+https://docs.armbian.com/User-Guide_Allwinner_overlays/ -+ -+### Platform: -+ -+sun50i-h5 (Allwinner H5) -+ -+### Platform details: -+ -+Supported pin banks: PA, PC, PD, PG -+ -+Both SPI controllers have only one hardware CS pin exposed, -+adding fixed software (GPIO) chip selects is possible with a separate overlay -+ -+### Provided overlays: -+ -+- analog-codec -+- cir -+- i2c0 -+- i2c1 -+- i2c2 -+- pps-gpio -+- pwm -+- spdif-out -+- spi-add-cs1 -+- spi-jedec-nor -+- spi-spidev -+- uart1 -+- uart2 -+- uart3 -+- usbhost0 -+- usbhost2 -+- usbhost3 -+- w1-gpio -+ -+### Overlay details: -+ -+### analog-codec -+ -+Activates SoC analog codec driver that provides Line Out and Mic In -+functionality -+ -+### cir -+ -+Activates CIR (Infrared remote) receiver -+ -+CIR pin: PL11 -+ -+### i2c0 -+ -+Activates TWI/I2C bus 0 -+ -+I2C0 pins (SCL, SDA): PA11, PA12 -+ -+### i2c1 -+ -+Activates TWI/I2C bus 1 -+ -+I2C1 pins (SCL, SDA): PA18, PA19 -+ -+### i2c2 -+ -+Activates TWI/I2C bus 2 -+ -+I2C2 pins (SCL, SDA): PE12, PE13 -+ -+On most board this bus is wired to Camera (CSI) socket -+ -+### pps-gpio -+ -+Activates pulse-per-second GPIO client -+ -+Parameters: -+ -+param_pps_pin (pin) -+ Pin PPS source is connected to -+ Optional -+ Default: PD14 -+ -+param_pps_falling_edge (bool) -+ Assert by falling edge -+ Optional -+ Default: 0 -+ When set (to 1), assert is indicated by a falling edge -+ (instead of by a rising edge) -+ -+### pwm -+ -+Activates hardware PWM controller -+ -+PWM pin: PA5 -+ -+Pin PA5 is used as UART0 RX by default, so if this overlay is activated, -+UART0 and kernel console on ttyS0 will be disabled -+ -+### spdif-out -+ -+Activates SPDIF/Toslink audio output -+ -+SPDIF pin: PA17 -+ -+### spi-add-cs1 -+ -+Adds support for using SPI chip select 1 with GPIO for both SPI controllers -+Respective GPIO will be claimed only if controller is enabled by another -+overlay -+This overlay is required for using chip select 1 with other SPI overlays -+Due to the u-boot limitations CS1 pin can't be customized by a parameter, but -+it can be changed by using an edited copy of this overlay -+A total of 4 chip selects can be used with custom overlays (1 HW + 3 GPIO) -+ -+SPI 0 pins (CS1): PA21 -+SPI 1 pins (CS1): PA10 -+ -+### spi-jedec-nor -+ -+Activates MTD support for JEDEC compatible SPI NOR flash chips on SPI bus -+supported by the kernel SPI NOR driver -+ -+SPI 0 pins (MOSI, MISO, SCK, CS): PC0, PC1, PC2, PC3 -+SPI 1 pins (MOSI, MISO, SCK, CS): PA15, PA16, PA14, PA13 -+ -+Parameters: -+ -+param_spinor_spi_bus (int) -+ SPI bus to activate SPI NOR flash support on -+ Required -+ Supported values: 0, 1 -+ -+param_spinor_spi_cs (int) -+ SPI chip select number -+ Optional -+ Default: 0 -+ Supported values: 0, 1 -+ Using chip select 1 requires using "spi-add-cs1" overlay -+ -+param_spinor_max_freq (int) -+ Maximum SPI frequency -+ Optional -+ Default: 1000000 -+ Range: 3000 - 100000000 -+ -+### spi-spidev -+ -+Activates SPIdev device node (/dev/spidevX.Y) for userspace SPI access, -+where X is the bus number and Y is the CS number -+ -+SPI 0 pins (MOSI, MISO, SCK, CS): PC0, PC1, PC2, PC3 -+SPI 1 pins (MOSI, MISO, SCK, CS): PA15, PA16, PA14, PA13 -+ -+Parameters: -+ -+param_spidev_spi_bus (int) -+ SPI bus to activate SPIdev support on -+ Required -+ Supported values: 0, 1 -+ -+param_spidev_spi_cs (int) -+ SPI chip select number -+ Optional -+ Default: 0 -+ Supported values: 0, 1 -+ Using chip select 1 requires using "spi-add-cs1" overlay -+ -+param_spidev_max_freq (int) -+ Maximum SPIdev frequency -+ Optional -+ Default: 1000000 -+ Range: 3000 - 100000000 -+ -+### uart1 -+ -+Activates serial port 1 (/dev/ttyS1) -+ -+UART 1 pins (TX, RX, RTS, CTS): PG6, PG7, PG8, PG9 -+ -+Parameters: -+ -+param_uart1_rtscts (bool) -+ Enable RTS and CTS pins -+ Optional -+ Default: 0 -+ Set to 1 to enable -+ -+### uart2 -+ -+Activates serial port 2 (/dev/ttyS2) -+ -+UART 2 pins (TX, RX, RTS, CTS): PA0, PA1, PA2, PA3 -+ -+Parameters: -+ -+param_uart2_rtscts (bool) -+ Enable RTS and CTS pins -+ Optional -+ Default: 0 -+ Set to 1 to enable CTS and RTS pins -+ -+### uart3 -+ -+Activates serial port 3 (/dev/ttyS3) -+ -+UART 3 pins (TX, RX, RTS, CTS): PA13, PA14, PA15, PA16 -+ -+Parameters: -+ -+param_uart3_rtscts (bool) -+ Enable RTS and CTS pins -+ Optional -+ Default: 0 -+ Set to 1 to enable CTS and RTS pins -+ -+### usbhost0 -+ -+Activates USB host controller 0 -+ -+### usbhost2 -+ -+Activates USB host controller 2 -+ -+### usbhost3 -+ -+Activates USB host controller 3 -+ -+### w1-gpio -+ -+Activates 1-Wire GPIO master -+Requires an external pull-up resistor on the data pin -+or enabling the internal pull-up -+ -+Parameters: -+ -+param_w1_pin (pin) -+ Data pin for 1-Wire master -+ Optional -+ Default: PD14 -+ -+param_w1_pin_int_pullup (bool) -+ Enable internal pull-up for the data pin -+ Optional -+ Default: 0 -+ Set to 1 to enable the pull-up -+ This option should not be used with multiple devices, parasite power setup -+ or long wires - please use external pull-up resistor instead -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-fixup.scr-cmd b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-fixup.scr-cmd -new file mode 100644 -index 00000000..6e192b56 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-fixup.scr-cmd -@@ -0,0 +1,95 @@ -+# overlays fixup script -+# implements (or rather substitutes) overlay arguments functionality -+# using u-boot scripting, environment variables and "fdt" command -+ -+# setexpr test_var ${tmp_bank} - A -+# works only for hex numbers (A-F) -+ -+setenv decompose_pin 'setexpr tmp_bank sub "P(B|C|D|H)\\d+" "\\1"; -+setexpr tmp_pin sub "P\\S(\\d+)" "\\1"; -+test "${tmp_bank}" = "B" && setenv tmp_bank 1; -+test "${tmp_bank}" = "C" && setenv tmp_bank 2; -+test "${tmp_bank}" = "D" && setenv tmp_bank 3; -+test "${tmp_bank}" = "H" && setenv tmp_bank 6' -+ -+if test -n "${param_spinor_spi_bus}"; then -+ test "${param_spinor_spi_bus}" = "0" && setenv tmp_spi_path "spi@1c68000" -+ test "${param_spinor_spi_bus}" = "1" && setenv tmp_spi_path "spi@1c69000" -+ fdt set /soc/${tmp_spi_path} status "okay" -+ fdt set /soc/${tmp_spi_path}/spiflash status "okay" -+ if test -n "${param_spinor_max_freq}"; then -+ fdt set /soc/${tmp_spi_path}/spiflash spi-max-frequency "<${param_spinor_max_freq}>" -+ fi -+ if test "${param_spinor_spi_cs}" = "1"; then -+ fdt set /soc/${tmp_spi_path}/spiflash reg "<1>"; -+ fi -+ env delete tmp_spi_path -+fi -+ -+if test -n "${param_spidev_spi_bus}"; then -+ test "${param_spidev_spi_bus}" = "0" && setenv tmp_spi_path "spi@1c68000" -+ test "${param_spidev_spi_bus}" = "1" && setenv tmp_spi_path "spi@1c69000" -+ fdt set /soc/${tmp_spi_path} status "okay" -+ fdt set /soc/${tmp_spi_path}/spidev status "okay" -+ if test -n "${param_spidev_max_freq}"; then -+ fdt set /soc/${tmp_spi_path}/spidev spi-max-frequency "<${param_spidev_max_freq}>" -+ fi -+ if test "${param_spidev_spi_cs}" = "1"; then -+ fdt set /soc/${tmp_spi_path}/spidev reg "<1>"; -+ fi -+fi -+ -+if test -n "${param_pps_pin}"; then -+ setenv tmp_bank "${param_pps_pin}" -+ setenv tmp_pin "${param_pps_pin}" -+ run decompose_pin -+ fdt set /soc/pinctrl@1c20800/pps_pins pins "${param_pps_pin}" -+ fdt get value tmp_phandle /soc/pinctrl@1c20800 phandle -+ fdt set /pps@0 gpios "<${tmp_phandle} ${tmp_bank} ${tmp_pin} 0>" -+ env delete tmp_pin tmp_bank tmp_phandle -+fi -+ -+if test "${param_pps_falling_edge}" = "1"; then -+ fdt set /pps@0 assert-falling-edge -+fi -+ -+if test -n "${param_w1_pin}"; then -+ setenv tmp_bank "${param_w1_pin}" -+ setenv tmp_pin "${param_w1_pin}" -+ run decompose_pin -+ fdt set /soc/pinctrl@1c20800/w1_pins pins "${param_w1_pin}" -+ fdt get value tmp_phandle /soc/pinctrl@1c20800 phandle -+ fdt set /onewire@0 gpios "<${tmp_phandle} ${tmp_bank} ${tmp_pin} 0>" -+ env delete tmp_pin tmp_bank tmp_phandle -+fi -+ -+if test "${param_w1_pin_int_pullup}" = "1"; then -+ fdt set /soc/pinctrl@1c20800/w1_pins bias-pull-up -+fi -+ -+if test "${param_uart1_rtscts}" = "1"; then -+ fdt get value tmp_phandle1 /soc/pinctrl@1c20800/uart1 phandle -+ fdt get value tmp_phandle2 /soc/pinctrl@1c20800/uart1_rts_cts_pins phandle -+ fdt set /soc/serial@1c28400 pinctrl-names "default" "default" -+ fdt set /soc/serial@1c28400 pinctrl-0 "<${tmp_phandle1}>" -+ fdt set /soc/serial@1c28400 pinctrl-1 "<${tmp_phandle2}>" -+ env delete tmp_phandle1 tmp_phandle2 -+fi -+ -+if test "${param_uart2_rtscts}" = "1"; then -+ fdt get value tmp_phandle1 /soc/pinctrl@1c20800/uart2 phandle -+ fdt get value tmp_phandle2 /soc/pinctrl@1c20800/uart2_rts_cts_pins phandle -+ fdt set /soc/serial@1c28800 pinctrl-names "default" "default" -+ fdt set /soc/serial@1c28800 pinctrl-0 "<${tmp_phandle1}>" -+ fdt set /soc/serial@1c28800 pinctrl-1 "<${tmp_phandle2}>" -+ env delete tmp_phandle1 tmp_phandle2 -+fi -+ -+if test "${param_uart4_rtscts}" = "1"; then -+ fdt get value tmp_phandle1 /soc/pinctrl@1c20800/uart4 phandle -+ fdt get value tmp_phandle2 /soc/pinctrl@1c20800/uart4_rts_cts phandle -+ fdt set /soc/serial@1c29000 pinctrl-names "default" "default" -+ fdt set /soc/serial@1c29000 pinctrl-0 "<${tmp_phandle1}>" -+ fdt set /soc/serial@1c29000 pinctrl-1 "<${tmp_phandle2}>" -+ env delete tmp_phandle1 tmp_phandle2 -+fi -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-i2c0.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-i2c0.dts -new file mode 100644 -index 00000000..37bdb2c2 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-i2c0.dts -@@ -0,0 +1,32 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-a64"; -+ -+ fragment@0 { -+ target-path = "/aliases"; -+ __overlay__ { -+ i2c0 = "/soc/i2c@1c2ac00"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&pio>; -+ __overlay__ { -+ i2c0_pins: i2c0_pins { -+ pins = "PH0", "PH1"; -+ function = "i2c0"; -+ }; -+ }; -+ }; -+ -+ fragment@2 { -+ target = <&i2c0>; -+ __overlay__ { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c0_pins>; -+ status = "okay"; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-i2c1.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-i2c1.dts -new file mode 100644 -index 00000000..b2483c9c ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-i2c1.dts -@@ -0,0 +1,22 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-a64"; -+ -+ fragment@0 { -+ target-path = "/aliases"; -+ __overlay__ { -+ i2c1 = "/soc/i2c@1c2b000"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&i2c1>; -+ __overlay__ { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ status = "okay"; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-pps-gpio.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-pps-gpio.dts -new file mode 100644 -index 00000000..5fa161c4 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-pps-gpio.dts -@@ -0,0 +1,29 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-a64"; -+ -+ fragment@0 { -+ target = <&pio>; -+ __overlay__ { -+ pps_pins: pps_pins { -+ pins = "PD4"; -+ function = "gpio_in"; -+ }; -+ }; -+ }; -+ -+ fragment@1 { -+ target-path = "/"; -+ __overlay__ { -+ pps@0 { -+ compatible = "pps-gpio"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pps_pins>; -+ gpios = <&pio 3 4 0>; /* PD4 */ -+ status = "okay"; -+ }; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-spi-add-cs1.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-spi-add-cs1.dts -new file mode 100644 -index 00000000..4432aac5 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-spi-add-cs1.dts -@@ -0,0 +1,41 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-a64"; -+ -+ fragment@0 { -+ target = <&pio>; -+ __overlay__ { -+ spi0_cs1: spi0_cs1 { -+ pins = "PB6"; -+ function = "gpio_out"; -+ output-high; -+ }; -+ -+ spi1_cs1: spi1_cs1 { -+ pins = "PD6"; -+ function = "gpio_out"; -+ output-high; -+ }; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&spi0>; -+ __overlay__ { -+ pinctrl-names = "default", "default"; -+ pinctrl-1 = <&spi0_cs1>; -+ cs-gpios = <0>, <&pio 1 6 0>; /* PB6 */ -+ }; -+ }; -+ -+ fragment@2 { -+ target = <&spi1>; -+ __overlay__ { -+ pinctrl-names = "default", "default"; -+ pinctrl-1 = <&spi1_cs1>; -+ cs-gpios = <0>, <&pio 3 6 0>; /* PD6 */ -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-spi-jedec-nor.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-spi-jedec-nor.dts -new file mode 100644 -index 00000000..d67a4f67 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-spi-jedec-nor.dts -@@ -0,0 +1,34 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-a64"; -+ -+ fragment@0 { -+ target = <&spi0>; -+ __overlay__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spiflash { -+ compatible = "jedec,spi-nor"; -+ reg = <0>; -+ spi-max-frequency = <1000000>; -+ status = "disabled"; -+ }; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&spi1>; -+ __overlay__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spiflash { -+ compatible = "jedec,spi-nor"; -+ reg = <0>; -+ spi-max-frequency = <1000000>; -+ status = "disabled"; -+ }; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-spi-spidev.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-spi-spidev.dts -new file mode 100644 -index 00000000..fe8fb14e ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-spi-spidev.dts -@@ -0,0 +1,42 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-a64"; -+ -+ fragment@0 { -+ target-path = "/aliases"; -+ __overlay__ { -+ spi0 = "/soc/spi@1c68000"; -+ spi1 = "/soc/spi@1c69000"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&spi0>; -+ __overlay__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spidev { -+ compatible = "spidev"; -+ status = "disabled"; -+ reg = <0>; -+ spi-max-frequency = <1000000>; -+ }; -+ }; -+ }; -+ -+ fragment@2 { -+ target = <&spi1>; -+ __overlay__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spidev { -+ compatible = "spidev"; -+ status = "disabled"; -+ reg = <0>; -+ spi-max-frequency = <1000000>; -+ }; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart1.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart1.dts -new file mode 100644 -index 00000000..4d8dac1a ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart1.dts -@@ -0,0 +1,22 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-a64"; -+ -+ fragment@0 { -+ target-path = "/aliases"; -+ __overlay__ { -+ serial1 = "/soc/serial@1c28800"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&uart1>; -+ __overlay__ { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_pins>; -+ status = "okay"; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart2.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart2.dts -new file mode 100644 -index 00000000..36475fd5 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart2.dts -@@ -0,0 +1,37 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-a64"; -+ -+ fragment@0 { -+ target-path = "/aliases"; -+ __overlay__ { -+ serial2 = "/soc/serial@1c28800"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&pio>; -+ __overlay__ { -+ uart2_pins: uart2_pins { -+ pins = "PB0", "PB1"; -+ function = "uart2"; -+ }; -+ -+ uart2_rts_cts_pins: uart2_rts_cts_pins { -+ pins = "PB2", "PB3"; -+ function = "uart2"; -+ }; -+ }; -+ }; -+ -+ fragment@2 { -+ target = <&uart2>; -+ __overlay__ { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart2_pins>; -+ status = "okay"; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart3.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart3.dts -new file mode 100644 -index 00000000..a103a751 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart3.dts -@@ -0,0 +1,32 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-a64"; -+ -+ fragment@0 { -+ target-path = "/aliases"; -+ __overlay__ { -+ serial3 = "/soc/serial@1c28c00"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&pio>; -+ __overlay__ { -+ uart3_pins: uart3_pins { -+ pins = "PD0", "PD1"; -+ function = "uart3"; -+ }; -+ }; -+ }; -+ -+ fragment@2 { -+ target = <&uart3>; -+ __overlay__ { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart3_pins>; -+ status = "okay"; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart4.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart4.dts -new file mode 100644 -index 00000000..f84333c7 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart4.dts -@@ -0,0 +1,37 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-a64"; -+ -+ fragment@0 { -+ target-path = "/aliases"; -+ __overlay__ { -+ serial3 = "/soc/serial@1c29000"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&pio>; -+ __overlay__ { -+ uart4_pins: uart4_pins { -+ pins = "PD2", "PD3"; -+ function = "uart4"; -+ }; -+ -+ uart4_rts_cts_pins: uart4_rts_cts_pins { -+ pins = "PD4", "PD5"; -+ function = "uart4"; -+ }; -+ }; -+ }; -+ -+ fragment@2 { -+ target = <&uart4>; -+ __overlay__ { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart4_pins>; -+ status = "okay"; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-w1-gpio.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-w1-gpio.dts -new file mode 100644 -index 00000000..d2304691 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-w1-gpio.dts -@@ -0,0 +1,29 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-a64"; -+ -+ fragment@0 { -+ target = <&pio>; -+ __overlay__ { -+ w1_pins: w1_pins { -+ pins = "PD4"; -+ function = "gpio_in"; -+ }; -+ }; -+ }; -+ -+ fragment@1 { -+ target-path = "/"; -+ __overlay__ { -+ onewire@0 { -+ compatible = "w1-gpio"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&w1_pins>; -+ gpios = <&pio 3 4 0>; /* PD4 */ -+ status = "okay"; -+ }; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-analog-codec.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-analog-codec.dts -new file mode 100644 -index 00000000..aaa66d5e ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-analog-codec.dts -@@ -0,0 +1,17 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-h5"; -+ -+ fragment@0 { -+ target = <&codec>; -+ __overlay__ { -+ allwinner,audio-routing = -+ "Line Out", "LINEOUT", -+ "MIC1", "Mic", -+ "Mic", "MBIAS"; -+ status = "okay"; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cir.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cir.dts -new file mode 100644 -index 00000000..74569cbf ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cir.dts -@@ -0,0 +1,15 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-h5"; -+ -+ fragment@0 { -+ target = <&ir>; -+ __overlay__ { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&ir_pins_a>; -+ status = "okay"; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-fixup.scr-cmd b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-fixup.scr-cmd -new file mode 100644 -index 00000000..744889c6 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-fixup.scr-cmd -@@ -0,0 +1,110 @@ -+# overlays fixup script -+# implements (or rather substitutes) overlay arguments functionality -+# using u-boot scripting, environment variables and "fdt" command -+ -+# setexpr test_var ${tmp_bank} - A -+# works only for hex numbers (A-F) -+ -+setenv decompose_pin 'setexpr tmp_bank sub "P(A|C|D|G)\\d+" "\\1"; -+setexpr tmp_pin sub "P\\S(\\d+)" "\\1"; -+test "${tmp_bank}" = "A" && setenv tmp_bank 0; -+test "${tmp_bank}" = "C" && setenv tmp_bank 2; -+test "${tmp_bank}" = "D" && setenv tmp_bank 3; -+test "${tmp_bank}" = "G" && setenv tmp_bank 6' -+ -+if test -n "${param_spinor_spi_bus}"; then -+ test "${param_spinor_spi_bus}" = "0" && setenv tmp_spi_path "spi@01c68000" -+ test "${param_spinor_spi_bus}" = "1" && setenv tmp_spi_path "spi@01c69000" -+ fdt set /soc/${tmp_spi_path} status "okay" -+ fdt set /soc/${tmp_spi_path}/spiflash status "okay" -+ if test -n "${param_spinor_max_freq}"; then -+ fdt set /soc/${tmp_spi_path}/spiflash spi-max-frequency "<${param_spinor_max_freq}>" -+ fi -+ if test "${param_spinor_spi_cs}" = "1"; then -+ fdt set /soc/${tmp_spi_path}/spiflash reg "<1>" -+ fi -+ env delete tmp_spi_path -+fi -+ -+if test -n "${param_spidev_spi_bus}"; then -+ test "${param_spidev_spi_bus}" = "0" && setenv tmp_spi_path "spi@01c68000" -+ test "${param_spidev_spi_bus}" = "1" && setenv tmp_spi_path "spi@01c69000" -+ fdt set /soc/${tmp_spi_path} status "okay" -+ fdt set /soc/${tmp_spi_path}/spidev status "okay" -+ if test -n "${param_spidev_max_freq}"; then -+ fdt set /soc/${tmp_spi_path}/spidev spi-max-frequency "<${param_spidev_max_freq}>" -+ fi -+ if test "${param_spidev_spi_cs}" = "1"; then -+ fdt set /soc/${tmp_spi_path}/spidev reg "<1>" -+ fi -+ env delete tmp_spi_path -+fi -+ -+if test -n "${param_pps_pin}"; then -+ setenv tmp_bank "${param_pps_pin}" -+ setenv tmp_pin "${param_pps_pin}" -+ run decompose_pin -+ fdt set /soc/pinctrl@01c20800/pps_pins pins "${param_pps_pin}" -+ fdt get value tmp_phandle /soc/pinctrl@01c20800 phandle -+ fdt set /pps@0 gpios "<${tmp_phandle} ${tmp_bank} ${tmp_pin} 0>" -+ env delete tmp_pin tmp_bank tmp_phandle -+fi -+ -+if test "${param_pps_falling_edge}" = "1"; then -+ fdt set /pps@0 assert-falling-edge -+fi -+ -+for f in ${overlays}; do -+ if test "${f}" = "pwm"; then -+ setenv bootargs_new "" -+ for arg in ${bootargs}; do -+ if test "${arg}" = "console=ttyS0,115200"; then -+ echo "Warning: Disabling ttyS0 console due to enabled PWM overlay" -+ else -+ setenv bootargs_new "${bootargs_new} ${arg}" -+ fi -+ done -+ setenv bootargs "${bootargs_new}" -+ fi -+done -+ -+if test -n "${param_w1_pin}"; then -+ setenv tmp_bank "${param_w1_pin}" -+ setenv tmp_pin "${param_w1_pin}" -+ run decompose_pin -+ fdt set /soc/pinctrl@01c20800/w1_pins pins "${param_w1_pin}" -+ fdt get value tmp_phandle /soc/pinctrl@01c20800 phandle -+ fdt set /onewire@0 gpios "<${tmp_phandle} ${tmp_bank} ${tmp_pin} 0>" -+ env delete tmp_pin tmp_bank tmp_phandle -+fi -+ -+if test "${param_w1_pin_int_pullup}" = "1"; then -+ fdt set /soc/pinctrl@01c20800/w1_pins bias-pull-up -+fi -+ -+if test "${param_uart1_rtscts}" = "1"; then -+ fdt get value tmp_phandle1 /soc/pinctrl@01c20800/uart1 phandle -+ fdt get value tmp_phandle2 /soc/pinctrl@01c20800/uart1_rts_cts phandle -+ fdt set /soc/serial@01c28400 pinctrl-names "default" "default" -+ fdt set /soc/serial@01c28400 pinctrl-0 "<${tmp_phandle1}>" -+ fdt set /soc/serial@01c28400 pinctrl-1 "<${tmp_phandle2}>" -+ env delete tmp_phandle1 tmp_phandle2 -+fi -+ -+if test "${param_uart2_rtscts}" = "1"; then -+ fdt get value tmp_phandle1 /soc/pinctrl@01c20800/uart2 phandle -+ fdt get value tmp_phandle2 /soc/pinctrl@01c20800/uart2_rts_cts phandle -+ fdt set /soc/serial@01c28800 pinctrl-names "default" "default" -+ fdt set /soc/serial@01c28800 pinctrl-0 "<${tmp_phandle1}>" -+ fdt set /soc/serial@01c28800 pinctrl-1 "<${tmp_phandle2}>" -+ env delete tmp_phandle1 tmp_phandle2 -+fi -+ -+if test "${param_uart3_rtscts}" = "1"; then -+ fdt get value tmp_phandle1 /soc/pinctrl@01c20800/uart3 phandle -+ fdt get value tmp_phandle2 /soc/pinctrl@01c20800/uart3_rts_cts phandle -+ fdt set /soc/serial@01c28c00 pinctrl-names "default" "default" -+ fdt set /soc/serial@01c28c00 pinctrl-0 "<${tmp_phandle1}>" -+ fdt set /soc/serial@01c28c00 pinctrl-1 "<${tmp_phandle2}>" -+ env delete tmp_phandle1 tmp_phandle2 -+fi -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c0.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c0.dts -new file mode 100644 -index 00000000..55d249db ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c0.dts -@@ -0,0 +1,20 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-h5"; -+ -+ fragment@0 { -+ target-path = "/aliases"; -+ __overlay__ { -+ i2c0 = "/soc/i2c@01c2ac00"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&i2c0>; -+ __overlay__ { -+ status = "okay"; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c1.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c1.dts -new file mode 100644 -index 00000000..2528870c ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c1.dts -@@ -0,0 +1,20 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-h5"; -+ -+ fragment@0 { -+ target-path = "/aliases"; -+ __overlay__ { -+ i2c1 = "/soc/i2c@01c2b000"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&i2c1>; -+ __overlay__ { -+ status = "okay"; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c2.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c2.dts -new file mode 100644 -index 00000000..ff42f01a ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c2.dts -@@ -0,0 +1,20 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-h5"; -+ -+ fragment@0 { -+ target-path = "/aliases"; -+ __overlay__ { -+ i2c2 = "/soc/i2c@01c2b400"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&i2c2>; -+ __overlay__ { -+ status = "okay"; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-pps-gpio.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-pps-gpio.dts -new file mode 100644 -index 00000000..46e06756 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-pps-gpio.dts -@@ -0,0 +1,29 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-h5"; -+ -+ fragment@0 { -+ target = <&pio>; -+ __overlay__ { -+ pps_pins: pps_pins { -+ pins = "PD14"; -+ function = "gpio_in"; -+ }; -+ }; -+ }; -+ -+ fragment@1 { -+ target-path = "/"; -+ __overlay__ { -+ pps@0 { -+ compatible = "pps-gpio"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pps_pins>; -+ gpios = <&pio 3 14 0>; /* PD14 */ -+ status = "okay"; -+ }; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-pwm.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-pwm.dts -new file mode 100644 -index 00000000..6d12e842 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-pwm.dts -@@ -0,0 +1,39 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-h5"; -+ -+ fragment@0 { -+ target-path = "/chosen"; -+ __overlay__ { -+ /delete-property/ stdout-path; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&uart0>; -+ __overlay__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@2 { -+ target = <&pio>; -+ __overlay__ { -+ pwm0_pin: pwm0 { -+ pins = "PA5"; -+ function = "pwm0"; -+ }; -+ }; -+ }; -+ -+ fragment@3 { -+ target = <&pwm>; -+ __overlay__ { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwm0_pin>; -+ status = "okay"; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spdif-out.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spdif-out.dts -new file mode 100644 -index 00000000..2bb301f7 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spdif-out.dts -@@ -0,0 +1,38 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-h5"; -+ -+ fragment@0 { -+ target = <&spdif>; -+ __overlay__ { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spdif_tx_pins_a>; -+ status = "okay"; -+ }; -+ }; -+ -+ fragment@1 { -+ target-path = "/"; -+ __overlay__ { -+ sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,name = "On-board SPDIF"; -+ -+ simple-audio-card,cpu { -+ sound-dai = <&spdif>; -+ }; -+ -+ simple-audio-card,codec { -+ sound-dai = <&spdif_out>; -+ }; -+ }; -+ -+ spdif_out: spdif-out { -+ #sound-dai-cells = <0>; -+ compatible = "linux,spdif-dit"; -+ }; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spi-add-cs1.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spi-add-cs1.dts -new file mode 100644 -index 00000000..8e3eab29 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spi-add-cs1.dts -@@ -0,0 +1,41 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-h5"; -+ -+ fragment@0 { -+ target = <&pio>; -+ __overlay__ { -+ spi0_cs1: spi0_cs1 { -+ pins = "PA21"; -+ function = "gpio_out"; -+ output-high; -+ }; -+ -+ spi1_cs1: spi1_cs1 { -+ pins = "PA10"; -+ function = "gpio_out"; -+ output-high; -+ }; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&spi0>; -+ __overlay__ { -+ pinctrl-names = "default", "default"; -+ pinctrl-1 = <&spi0_cs1>; -+ cs-gpios = <0>, <&pio 0 21 0>; /* PA21 */ -+ }; -+ }; -+ -+ fragment@2 { -+ target = <&spi1>; -+ __overlay__ { -+ pinctrl-names = "default", "default"; -+ pinctrl-1 = <&spi1_cs1>; -+ cs-gpios = <0>, <&pio 0 10 0>; /* PA10 */ -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spi-jedec-nor.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spi-jedec-nor.dts -new file mode 100644 -index 00000000..d4accd95 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spi-jedec-nor.dts -@@ -0,0 +1,42 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-h5"; -+ -+ fragment@0 { -+ target-path = "/aliases"; -+ __overlay__ { -+ spi0 = "/soc/spi@01c68000"; -+ spi1 = "/soc/spi@01c69000"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&spi0>; -+ __overlay__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spiflash { -+ compatible = "jedec,spi-nor"; -+ reg = <0>; -+ spi-max-frequency = <1000000>; -+ status = "disabled"; -+ }; -+ }; -+ }; -+ -+ fragment@2 { -+ target = <&spi1>; -+ __overlay__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spiflash { -+ compatible = "jedec,spi-nor"; -+ reg = <0>; -+ spi-max-frequency = <1000000>; -+ status = "disabled"; -+ }; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spi-spidev.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spi-spidev.dts -new file mode 100644 -index 00000000..d8a008d0 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spi-spidev.dts -@@ -0,0 +1,42 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-h5"; -+ -+ fragment@0 { -+ target-path = "/aliases"; -+ __overlay__ { -+ spi0 = "/soc/spi@01c68000"; -+ spi1 = "/soc/spi@01c69000"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&spi0>; -+ __overlay__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spidev { -+ compatible = "spidev"; -+ status = "disabled"; -+ reg = <0>; -+ spi-max-frequency = <1000000>; -+ }; -+ }; -+ }; -+ -+ fragment@2 { -+ target = <&spi1>; -+ __overlay__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spidev { -+ compatible = "spidev"; -+ status = "disabled"; -+ reg = <0>; -+ spi-max-frequency = <1000000>; -+ }; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-uart1.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-uart1.dts -new file mode 100644 -index 00000000..0ce76efd ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-uart1.dts -@@ -0,0 +1,22 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-h5"; -+ -+ fragment@0 { -+ target-path = "/aliases"; -+ __overlay__ { -+ serial1 = "/soc/serial@01c28400"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&uart1>; -+ __overlay__ { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_pins>; -+ status = "okay"; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-uart2.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-uart2.dts -new file mode 100644 -index 00000000..88cc0cdc ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-uart2.dts -@@ -0,0 +1,32 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-h5"; -+ -+ fragment@0 { -+ target-path = "/aliases"; -+ __overlay__ { -+ serial2 = "/soc/serial@01c28800"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&pio>; -+ __overlay__ { -+ uart2_rts_cts: uart2_rts_cts { -+ pins = "PA2", "PA3"; -+ function = "uart2"; -+ }; -+ }; -+ }; -+ -+ fragment@2 { -+ target = <&uart2>; -+ __overlay__ { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart2_pins>; -+ status = "okay"; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-uart3.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-uart3.dts -new file mode 100644 -index 00000000..a738ff83 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-uart3.dts -@@ -0,0 +1,32 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-h5"; -+ -+ fragment@0 { -+ target-path = "/aliases"; -+ __overlay__ { -+ serial3 = "/soc/serial@01c28c00"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&pio>; -+ __overlay__ { -+ uart3_rts_cts: uart3_rts_cts { -+ pins = "PA15", "PA16"; -+ function = "uart3"; -+ }; -+ }; -+ }; -+ -+ fragment@2 { -+ target = <&uart3>; -+ __overlay__ { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart3_pins>; -+ status = "okay"; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost0.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost0.dts -new file mode 100644 -index 00000000..7ca3eb35 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost0.dts -@@ -0,0 +1,20 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-h5"; -+ -+ fragment@0 { -+ target = <&ehci0>; -+ __overlay__ { -+ status = "okay"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&ohci0>; -+ __overlay__ { -+ status = "okay"; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost2.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost2.dts -new file mode 100644 -index 00000000..3e910af7 ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost2.dts -@@ -0,0 +1,20 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-h5"; -+ -+ fragment@0 { -+ target = <&ehci2>; -+ __overlay__ { -+ status = "okay"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&ohci2>; -+ __overlay__ { -+ status = "okay"; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost3.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost3.dts -new file mode 100644 -index 00000000..87f30ced ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost3.dts -@@ -0,0 +1,20 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-h5"; -+ -+ fragment@0 { -+ target = <&ehci3>; -+ __overlay__ { -+ status = "okay"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&ohci3>; -+ __overlay__ { -+ status = "okay"; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-w1-gpio.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-w1-gpio.dts -new file mode 100644 -index 00000000..6e99626a ---- /dev/null -+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-w1-gpio.dts -@@ -0,0 +1,29 @@ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "allwinner,sun50i-h5"; -+ -+ fragment@0 { -+ target = <&pio>; -+ __overlay__ { -+ w1_pins: w1_pins { -+ pins = "PD14"; -+ function = "gpio_in"; -+ }; -+ }; -+ }; -+ -+ fragment@1 { -+ target-path = "/"; -+ __overlay__ { -+ onewire@0 { -+ compatible = "w1-gpio"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&w1_pins>; -+ gpios = <&pio 3 14 0>; /* PD14 */ -+ status = "okay"; -+ }; -+ }; -+ }; -+}; From 9ad96bd2090325092142a5c1dc75fe085c940bc5 Mon Sep 17 00:00:00 2001 From: 5kft <5kft@users.noreply.github.com> Date: Sat, 21 Jul 2018 06:16:39 -0700 Subject: [PATCH 2/2] correct sunxi H5 arm64 DT overlays for latest kernel removed leading zeros from the unit addresses in the sun50i-h5-* arm64 DT overlays; updated the sun50i-h5-fixup script --- .../sunxi-next/general-sunxi-overlays.patch | 68 +++++++++---------- 1 file changed, 34 insertions(+), 34 deletions(-) diff --git a/patch/kernel/sunxi-next/general-sunxi-overlays.patch b/patch/kernel/sunxi-next/general-sunxi-overlays.patch index 7cd8296c9c..fe873af7e2 100644 --- a/patch/kernel/sunxi-next/general-sunxi-overlays.patch +++ b/patch/kernel/sunxi-next/general-sunxi-overlays.patch @@ -5628,8 +5628,8 @@ index 0000000..744889c +test "${tmp_bank}" = "G" && setenv tmp_bank 6' + +if test -n "${param_spinor_spi_bus}"; then -+ test "${param_spinor_spi_bus}" = "0" && setenv tmp_spi_path "spi@01c68000" -+ test "${param_spinor_spi_bus}" = "1" && setenv tmp_spi_path "spi@01c69000" ++ test "${param_spinor_spi_bus}" = "0" && setenv tmp_spi_path "spi@1c68000" ++ test "${param_spinor_spi_bus}" = "1" && setenv tmp_spi_path "spi@1c69000" + fdt set /soc/${tmp_spi_path} status "okay" + fdt set /soc/${tmp_spi_path}/spiflash status "okay" + if test -n "${param_spinor_max_freq}"; then @@ -5642,8 +5642,8 @@ index 0000000..744889c +fi + +if test -n "${param_spidev_spi_bus}"; then -+ test "${param_spidev_spi_bus}" = "0" && setenv tmp_spi_path "spi@01c68000" -+ test "${param_spidev_spi_bus}" = "1" && setenv tmp_spi_path "spi@01c69000" ++ test "${param_spidev_spi_bus}" = "0" && setenv tmp_spi_path "spi@1c68000" ++ test "${param_spidev_spi_bus}" = "1" && setenv tmp_spi_path "spi@1c69000" + fdt set /soc/${tmp_spi_path} status "okay" + fdt set /soc/${tmp_spi_path}/spidev status "okay" + if test -n "${param_spidev_max_freq}"; then @@ -5659,8 +5659,8 @@ index 0000000..744889c + setenv tmp_bank "${param_pps_pin}" + setenv tmp_pin "${param_pps_pin}" + run decompose_pin -+ fdt set /soc/pinctrl@01c20800/pps_pins pins "${param_pps_pin}" -+ fdt get value tmp_phandle /soc/pinctrl@01c20800 phandle ++ fdt set /soc/pinctrl@1c20800/pps_pins pins "${param_pps_pin}" ++ fdt get value tmp_phandle /soc/pinctrl@1c20800 phandle + fdt set /pps@0 gpios "<${tmp_phandle} ${tmp_bank} ${tmp_pin} 0>" + env delete tmp_pin tmp_bank tmp_phandle +fi @@ -5687,40 +5687,40 @@ index 0000000..744889c + setenv tmp_bank "${param_w1_pin}" + setenv tmp_pin "${param_w1_pin}" + run decompose_pin -+ fdt set /soc/pinctrl@01c20800/w1_pins pins "${param_w1_pin}" -+ fdt get value tmp_phandle /soc/pinctrl@01c20800 phandle ++ fdt set /soc/pinctrl@1c20800/w1_pins pins "${param_w1_pin}" ++ fdt get value tmp_phandle /soc/pinctrl@1c20800 phandle + fdt set /onewire@0 gpios "<${tmp_phandle} ${tmp_bank} ${tmp_pin} 0>" + env delete tmp_pin tmp_bank tmp_phandle +fi + +if test "${param_w1_pin_int_pullup}" = "1"; then -+ fdt set /soc/pinctrl@01c20800/w1_pins bias-pull-up ++ fdt set /soc/pinctrl@1c20800/w1_pins bias-pull-up +fi + +if test "${param_uart1_rtscts}" = "1"; then -+ fdt get value tmp_phandle1 /soc/pinctrl@01c20800/uart1 phandle -+ fdt get value tmp_phandle2 /soc/pinctrl@01c20800/uart1_rts_cts phandle -+ fdt set /soc/serial@01c28400 pinctrl-names "default" "default" -+ fdt set /soc/serial@01c28400 pinctrl-0 "<${tmp_phandle1}>" -+ fdt set /soc/serial@01c28400 pinctrl-1 "<${tmp_phandle2}>" ++ fdt get value tmp_phandle1 /soc/pinctrl@1c20800/uart1 phandle ++ fdt get value tmp_phandle2 /soc/pinctrl@1c20800/uart1_rts_cts phandle ++ fdt set /soc/serial@1c28400 pinctrl-names "default" "default" ++ fdt set /soc/serial@1c28400 pinctrl-0 "<${tmp_phandle1}>" ++ fdt set /soc/serial@1c28400 pinctrl-1 "<${tmp_phandle2}>" + env delete tmp_phandle1 tmp_phandle2 +fi + +if test "${param_uart2_rtscts}" = "1"; then -+ fdt get value tmp_phandle1 /soc/pinctrl@01c20800/uart2 phandle -+ fdt get value tmp_phandle2 /soc/pinctrl@01c20800/uart2_rts_cts phandle -+ fdt set /soc/serial@01c28800 pinctrl-names "default" "default" -+ fdt set /soc/serial@01c28800 pinctrl-0 "<${tmp_phandle1}>" -+ fdt set /soc/serial@01c28800 pinctrl-1 "<${tmp_phandle2}>" ++ fdt get value tmp_phandle1 /soc/pinctrl@1c20800/uart2 phandle ++ fdt get value tmp_phandle2 /soc/pinctrl@1c20800/uart2_rts_cts phandle ++ fdt set /soc/serial@1c28800 pinctrl-names "default" "default" ++ fdt set /soc/serial@1c28800 pinctrl-0 "<${tmp_phandle1}>" ++ fdt set /soc/serial@1c28800 pinctrl-1 "<${tmp_phandle2}>" + env delete tmp_phandle1 tmp_phandle2 +fi + +if test "${param_uart3_rtscts}" = "1"; then -+ fdt get value tmp_phandle1 /soc/pinctrl@01c20800/uart3 phandle -+ fdt get value tmp_phandle2 /soc/pinctrl@01c20800/uart3_rts_cts phandle -+ fdt set /soc/serial@01c28c00 pinctrl-names "default" "default" -+ fdt set /soc/serial@01c28c00 pinctrl-0 "<${tmp_phandle1}>" -+ fdt set /soc/serial@01c28c00 pinctrl-1 "<${tmp_phandle2}>" ++ fdt get value tmp_phandle1 /soc/pinctrl@1c20800/uart3 phandle ++ fdt get value tmp_phandle2 /soc/pinctrl@1c20800/uart3_rts_cts phandle ++ fdt set /soc/serial@1c28c00 pinctrl-names "default" "default" ++ fdt set /soc/serial@1c28c00 pinctrl-0 "<${tmp_phandle1}>" ++ fdt set /soc/serial@1c28c00 pinctrl-1 "<${tmp_phandle2}>" + env delete tmp_phandle1 tmp_phandle2 +fi diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c0.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c0.dts @@ -5738,7 +5738,7 @@ index 0000000..55d249d + fragment@0 { + target-path = "/aliases"; + __overlay__ { -+ i2c0 = "/soc/i2c@01c2ac00"; ++ i2c0 = "/soc/i2c@1c2ac00"; + }; + }; + @@ -5764,7 +5764,7 @@ index 0000000..2528870 + fragment@0 { + target-path = "/aliases"; + __overlay__ { -+ i2c1 = "/soc/i2c@01c2b000"; ++ i2c1 = "/soc/i2c@1c2b000"; + }; + }; + @@ -5790,7 +5790,7 @@ index 0000000..ff42f01 + fragment@0 { + target-path = "/aliases"; + __overlay__ { -+ i2c2 = "/soc/i2c@01c2b400"; ++ i2c2 = "/soc/i2c@1c2b400"; + }; + }; + @@ -5987,8 +5987,8 @@ index 0000000..d4accd9 + fragment@0 { + target-path = "/aliases"; + __overlay__ { -+ spi0 = "/soc/spi@01c68000"; -+ spi1 = "/soc/spi@01c69000"; ++ spi0 = "/soc/spi@1c68000"; ++ spi1 = "/soc/spi@1c69000"; + }; + }; + @@ -6035,8 +6035,8 @@ index 0000000..d8a008d + fragment@0 { + target-path = "/aliases"; + __overlay__ { -+ spi0 = "/soc/spi@01c68000"; -+ spi1 = "/soc/spi@01c69000"; ++ spi0 = "/soc/spi@1c68000"; ++ spi1 = "/soc/spi@1c69000"; + }; + }; + @@ -6083,7 +6083,7 @@ index 0000000..0ce76ef + fragment@0 { + target-path = "/aliases"; + __overlay__ { -+ serial1 = "/soc/serial@01c28400"; ++ serial1 = "/soc/serial@1c28400"; + }; + }; + @@ -6111,7 +6111,7 @@ index 0000000..88cc0cd + fragment@0 { + target-path = "/aliases"; + __overlay__ { -+ serial2 = "/soc/serial@01c28800"; ++ serial2 = "/soc/serial@1c28800"; + }; + }; + @@ -6149,7 +6149,7 @@ index 0000000..3ad6cc9 + fragment@0 { + target-path = "/aliases"; + __overlay__ { -+ serial3 = "/soc/serial@01c28c00"; ++ serial3 = "/soc/serial@1c28c00"; + }; + }; +