diff --git a/patch/kernel/archive/rk322x-5.14/02-linux-0007-enable-YUV-10bit-modes.patch b/patch/kernel/archive/rk322x-5.14/02-linux-0007-enable-YUV-10bit-modes.patch
new file mode 100644
index 0000000000..acd738f00d
--- /dev/null
+++ b/patch/kernel/archive/rk322x-5.14/02-linux-0007-enable-YUV-10bit-modes.patch
@@ -0,0 +1,44 @@
+From 2d42546642fa4299d88fa4ae414fa1ab205dad70 Mon Sep 17 00:00:00 2001
+From: Paolo Sabatino <paolo.sabatino@gmail.com>
+Date: Sat, 11 Sep 2021 17:38:48 +0000
+Subject: [PATCH] rk322x: enable YUV modes for win1, 10-bit for win0/win1
+
+---
+ drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 10 ++++++----
+ 1 file changed, 6 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+index 70930b410..3fd00b323 100644
+--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
++++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+@@ -719,10 +719,11 @@ static const struct vop_common rk3288_common = {
+ 
+ static const struct vop_win_phy rk3228_win0_data = {
+ 	.scl = &rk3288_win_full_scl,
+-	.data_formats = formats_win_full,
+-	.nformats = ARRAY_SIZE(formats_win_full),
++	.data_formats = formats_win_full_10,
++	.nformats = ARRAY_SIZE(formats_win_full_10),
+ 	.enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
+ 	.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
++	.fmt_10 = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 4),
+ 	.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
+ 	.act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
+ 	.dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
+@@ -738,10 +739,11 @@ static const struct vop_win_phy rk3228_win0_data = {
+ 
+ static const struct vop_win_phy rk3228_win1_data = {
+ 	.scl = &rk3288_win_full_scl,
+-	.data_formats = formats_win_lite,
+-	.nformats = ARRAY_SIZE(formats_win_lite),
++	.data_formats = formats_win_full_10,
++	.nformats = ARRAY_SIZE(formats_win_full_10),
+ 	.enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0),
+ 	.format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1),
++	.fmt_10 = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 4),
+ 	.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
+ 	.act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
+ 	.dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0),
+-- 
+2.25.1
+