diff --git a/packages/bsp/common/etc/update-motd.d/10-armbian-header b/packages/bsp/common/etc/update-motd.d/10-armbian-header
index 18ca541ea3..579d7433ce 100755
--- a/packages/bsp/common/etc/update-motd.d/10-armbian-header
+++ b/packages/bsp/common/etc/update-motd.d/10-armbian-header
@@ -23,7 +23,7 @@ done
 
 KERNELID=$(uname -r)
 
-if [ $(echo $BOARD_NAME | wc -c) -ge 18 ]; then
+if [ $(echo $BOARD_NAME | wc -c) -ge 17 ]; then
 	TERM=linux toilet -f standard -F metal $(echo $BOARD_NAME | sed 's/Orange Pi/OPi/' | sed 's/Nanopi/NPi/')
 else
 	TERM=linux toilet -f standard -F metal $BOARD_NAME
diff --git a/patch/kernel/rk3399-default/xunlong-orangepi-rk3399.patch b/patch/kernel/rk3399-default/xunlong-orangepi-rk3399.patch
new file mode 100644
index 0000000000..12bf02815f
--- /dev/null
+++ b/patch/kernel/rk3399-default/xunlong-orangepi-rk3399.patch
@@ -0,0 +1,817 @@
+diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
+index 40168e41..7463daa3 100644
+--- a/arch/arm64/boot/dts/rockchip/Makefile
++++ b/arch/arm64/boot/dts/rockchip/Makefile
+@@ -1,6 +1,7 @@
+ ifeq ($(CONFIG_MACH_NANOPI4),y)
+ 
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
++	rk3399-orangepi.dtb \
+ 	rk3399-nanopi4-rev00.dtb \
+ 	rk3399-nanopi4-rev01.dtb \
+ 	rk3399-nanopi4-rev04.dtb \
+diff --git a/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire.dtsi
+index c406e54b..dbe01123 100644
+--- a/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3399-excavator-sapphire.dtsi
+@@ -103,7 +103,7 @@
+ 	wireless-wlan {
+ 		compatible = "wlan-platdata";
+ 		rockchip,grf = <&grf>;
+-		wifi_chip_type = "ap6354";
++		wifi_chip_type = "ap6356s";
+ 		sdio_vref = <1800>;
+ 		WIFI,host_wake_irq = <&gpio0 3 GPIO_ACTIVE_HIGH>; /* GPIO0_a3 */
+ 		status = "okay";
+@@ -126,37 +126,6 @@
+ 	};
+ };
+ 
+-&dfi {
+-	status = "okay";
+-};
+-
+-&dmc {
+-	status = "okay";
+-	center-supply = <&vdd_center>;
+-	upthreshold = <40>;
+-	downdifferential = <20>;
+-	system-status-freq = <
+-		/*system status         freq(KHz)*/
+-		SYS_STATUS_NORMAL       800000
+-		SYS_STATUS_REBOOT       528000
+-		SYS_STATUS_SUSPEND      200000
+-		SYS_STATUS_VIDEO_1080P  200000
+-		SYS_STATUS_VIDEO_4K     600000
+-		SYS_STATUS_VIDEO_4K_10B 800000
+-		SYS_STATUS_PERFORMANCE  800000
+-		SYS_STATUS_BOOST        400000
+-		SYS_STATUS_DUALVIEW     600000
+-		SYS_STATUS_ISP          600000
+-	>;
+-	vop-bw-dmc-freq = <
+-	/* min_bw(MB/s) max_bw(MB/s) freq(KHz) */
+-		0       577      200000
+-		578     1701     300000
+-		1702    99999    400000
+-	>;
+-	auto-min-freq = <200000>;
+-};
+-
+ &spdif {
+ 	status = "okay";
+ 	pinctrl-0 = <&spdif_bus>;
+diff --git a/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
+new file mode 100644
+index 00000000..299fbd53
+--- /dev/null
++++ b/arch/arm64/boot/dts/rockchip/rk3399-orangepi.dts
+@@ -0,0 +1,694 @@
++/*
++ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPL or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ *  a) This file is free software; you can redistribute it and/or
++ *     modify it under the terms of the GNU General Public License as
++ *     published by the Free Software Foundation; either version 2 of the
++ *     License, or (at your option) any later version.
++ *
++ *     This file is distributed in the hope that it will be useful,
++ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *     GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ *  b) Permission is hereby granted, free of charge, to any person
++ *     obtaining a copy of this software and associated documentation
++ *     files (the "Software"), to deal in the Software without
++ *     restriction, including without limitation the rights to use,
++ *     copy, modify, merge, publish, distribute, sublicense, and/or
++ *     sell copies of the Software, and to permit persons to whom the
++ *     Software is furnished to do so, subject to the following
++ *     conditions:
++ *
++ *     The above copyright notice and this permission notice shall be
++ *     included in all copies or substantial portions of the Software.
++ *
++ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ *     OTHER DEALINGS IN THE SOFTWARE.
++ */
++
++/dts-v1/;
++
++#include "rk3399-excavator-sapphire.dtsi"
++#include "rk3399-linux.dtsi"
++#include <dt-bindings/input/input.h>
++#include <dt-bindings/sensor-dev.h>
++//#include <generated/autoconf.h>
++#include "../../../../../include/generated/autoconf.h"
++
++/ {
++	model = "Rockchip RK3399 Excavator Board (Linux Opensource)";
++	compatible = "rockchip,rk3399-excavator-linux", "rockchip,rk3399";
++
++	fiq_debugger: fiq-debugger {
++		compatible = "rockchip,fiq-debugger";
++		rockchip,serial-id = <2>;
++		rockchip,signal-irq = <182>;
++		rockchip,wake-irq = <0>;
++		rockchip,irq-mode-enable = <1>;  /* If enable uart uses irq instead of fiq */
++		rockchip,baudrate = <1500000>;  /* Only 115200 and 1500000 */
++		pinctrl-names = "default";
++		pinctrl-0 = <&uart2c_xfer>;
++	};
++
++	edp_panel: edp-panel {
++    status = "disabled";
++		compatible = "lg,lp079qx1-sp0v", "panel-simple";
++		backlight = <&backlight>;
++		power-supply = <&vcc3v3_s0>;
++		enable-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
++		pinctrl-names = "default";
++		pinctrl-0 = <&lcd_panel_reset>;
++
++		ports {
++			panel_in_edp: endpoint {
++				remote-endpoint = <&edp_out_panel>;
++			};
++		};
++	};
++	hall_sensor: hall-mh248 {
++		compatible = "hall-mh248";
++		pinctrl-names = "default";
++		pinctrl-0 = <&mh248_irq_gpio>;
++		irq-gpio = <&gpio0 13 IRQ_TYPE_EDGE_BOTH>; //GPIO0_B5
++		hall-active = <1>;
++		status = "okay";
++	};
++
++	hdmi_codec: hdmi-codec {
++		compatible = "simple-audio-card";
++		simple-audio-card,format = "i2s";
++		simple-audio-card,mclk-fs = <256>;
++		simple-audio-card,name = "HDMI-CODEC";
++
++		simple-audio-card,cpu {
++			sound-dai = <&i2s2>;
++		};
++
++		simple-audio-card,codec {
++			sound-dai = <&hdmi>;
++		};
++	};
++
++	gpio-keys {
++		compatible = "gpio-keys";
++		#address-cells = <1>;
++		#size-cells = <0>;
++		autorepeat;
++
++		pinctrl-names = "default";
++		pinctrl-0 = <&pwrbtn>;
++
++		button@0 {
++			gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
++			linux,code = <KEY_POWER>;
++			label = "GPIO Key Power";
++			linux,input-type = <1>;
++			gpio-key,wakeup = <1>;
++			debounce-interval = <100>;
++		};
++	};
++
++	vccadc_ref: vccadc-ref {
++		compatible = "regulator-fixed";
++		regulator-name = "vcc1v8_sys";
++		regulator-always-on;
++		regulator-boot-on;
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <1800000>;
++	};
++
++  vcc3v3_pcie: vcc3v3-pcie-regulator {
++    compatible = "regulator-fixed";
++    enable-active-high;
++    regulator-always-on;
++    regulator-boot-on;
++    gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>;
++    pinctrl-names = "default";
++    pinctrl-0 = <&pcie_drv>;
++    regulator-name = "vcc3v3_pcie";
++  };
++
++	adc-keys {
++		compatible = "adc-keys";
++		io-channels = <&saradc 1>;
++		io-channel-names = "buttons";
++		poll-interval = <100>;
++		keyup-threshold-microvolt = <1800000>;
++
++		button-up {
++			label = "Volume Up";
++			linux,code = <KEY_VOLUMEUP>;
++			press-threshold-microvolt = <100000>;
++		};
++
++		button-down {
++			label = "Volume Down";
++			linux,code = <KEY_VOLUMEDOWN>;
++			press-threshold-microvolt = <300000>;
++		};
++
++		back {
++			label = "Back";
++			linux,code = <KEY_BACK>;
++			press-threshold-microvolt = <985000>;
++		};
++
++		menu {
++			label = "Menu";
++			linux,code = <KEY_MENU>;
++			press-threshold-microvolt = <1314000>;
++		};
++	};
++};
++
++&cif_isp0 {
++#ifdef CONFIG_VIDEO_TC358749XBG
++	rockchip,camera-modules-attached = <&camera1>;
++#else
++	rockchip,camera-modules-attached = <&camera0>;
++#endif
++
++//		<&camera0 &camera1 &camera2 &camera3>;
++	status = "okay";
++};
++
++&isp0_mmu {
++	status = "okay";
++};
++
++&cif_isp1 {
++	rockchip,camera-modules-attached = <&camera1>;
++	status = "disable";
++};
++
++&isp1_mmu {
++	status = "disabled";
++};
++
++&saradc {
++	vref-supply = <&vccadc_ref>;
++};
++
++&vpu {
++	status = "okay";
++	/* 0 means ion, 1 means drm */
++	//allocator = <0>;
++};
++
++&rkvdec {
++	status = "okay";
++	/* 0 means ion, 1 means drm */
++	//allocator = <0>;
++};
++
++&backlight {
++	status = "okay";
++//	enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
++//	enable-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
++};
++
++&display_subsystem {
++	status = "okay";
++};
++
++&route_edp {
++	status = "disabled";
++};
++
++&route_dsi {
++  status = "disabled";
++};
++&edp {
++	status = "disabled";
++
++	ports {
++		edp_out: port@1 {
++			reg = <1>;
++			#address-cells = <1>;
++			#size-cells = <0>;
++
++			edp_out_panel: endpoint@0 {
++				reg = <0>;
++				remote-endpoint = <&panel_in_edp>;
++			};
++		};
++	};
++};
++
++&pwm3 {
++  status = "okay";
++  interrupts = <0 61 4 0>;
++  compatible = "rockchip,remotectl-pwm";
++  remote_pwm_id = <3>;
++  handle_cpu_id = <0>;
++  ir_key1 {
++  rockchip,usercode = <0xfb04>;
++    rockchip,key_table =
++      <0xa3 KEY_ENTER>,
++      <0xe4 388>,
++      <0xf5 KEY_BACK>,
++      <0xbb KEY_UP>,
++      <0xe2 KEY_DOWN>,
++      <0xe3 KEY_LEFT>,
++      <0xb7 KEY_RIGHT>,
++      <0xe0 KEY_HOME>,
++      <0xba KEY_VOLUMEUP>,
++      <0xda KEY_VOLUMEUP>,
++      <0xe6 KEY_VOLUMEDOWN>,
++      <0xdb KEY_VOLUMEDOWN>,
++      <0xbc KEY_SEARCH>,
++      <0xb2 KEY_POWER>,
++      <0xe5 KEY_POWER>,
++      <0xde KEY_POWER>,
++      <0xdc KEY_MUTE>,
++      <0xa2 KEY_MENU>,
++      <0xec KEY_1>,
++      <0xef KEY_2>,
++      <0xee KEY_3>,
++      <0xf0 KEY_4>,
++      <0xf3 KEY_5>,
++      <0xf2 KEY_6>,
++      <0xf4 KEY_7>,
++      <0xf7 KEY_8>,
++      <0xf6 KEY_9>,
++      <0xb8 KEY_0>;
++  };
++};
++
++&hdmi {
++	#address-cells = <1>;
++	#size-cells = <0>;
++	#sound-dai-cells = <0>;
++	status = "okay";
++};
++
++&i2c1 {
++	status = "okay";
++
++/*	gsl3673: gsl3673@40 {
++		compatible = "GSL,GSL3673";
++		reg = <0x40>;
++		screen_max_x = <1536>;
++		screen_max_y = <2048>;
++		irq_gpio_number = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
++		rst_gpio_number = <&gpio4 22 GPIO_ACTIVE_HIGH>;
++	};
++*/
++//TouchScreen Gt9xx 8 inch & 10 inch
++    gt9xx: gt9xx@14 {
++        compatible = "goodix,gt9xx";
++        reg = <0x14>;
++        touch-gpio = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>;
++        reset-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
++    	max-x = <800>;
++    	max-y = <1280>;
++    	tp-size = <101>;   // <911> for 8 inch // <101> for 10 inch
++    	status = "okay";
++	};	
++	camera0: camera-module@10 {
++		status = "disable";
++		compatible = "omnivision,ov13850-v4l2-i2c-subdev";
++		reg = < 0x10 >;
++		device_type = "v4l2-i2c-subdev";
++		clocks = <&cru SCLK_CIF_OUT>;
++		clock-names = "clk_cif_out";
++		pinctrl-names = "rockchip,camera_default","rockchip,camera_sleep";
++		pinctrl-0 = <&cam0_default_pins>;
++		pinctrl-1 = <&cam0_sleep_pins>;
++		rockchip,pd-gpio = <&gpio2 4 GPIO_ACTIVE_LOW>;
++		rockchip,pwr-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
++		/* mipi switch control */
++		rockchip,rst-gpio = <&gpio0 8 GPIO_ACTIVE_LOW>;
++		rockchip,camera-module-mclk-name = "clk_cif_out";
++		rockchip,camera-module-facing = "front";
++		rockchip,camera-module-name = "cmk-cb0695-fv1";
++		rockchip,camera-module-len-name = "lg9569a2";
++		rockchip,camera-module-fov-h = "66.0";
++		rockchip,camera-module-fov-v = "50.1";
++		rockchip,camera-module-orientation = <0>;
++		rockchip,camera-module-iq-flip = <0>;
++		rockchip,camera-module-iq-mirror = <0>;
++		rockchip,camera-module-flip = <1>;
++		rockchip,camera-module-mirror = <0>;
++
++		rockchip,camera-module-defrect0 = <2112 1568 0 0 2112 1568>;
++		rockchip,camera-module-defrect1 = <4224 3136 0 0 4224 3136>;
++		rockchip,camera-module-defrect3 = <3264 2448 0 0 3264 2448>;
++		rockchip,camera-module-flash-support = <0>;
++		rockchip,camera-module-mipi-dphy-index = <0>;
++	};
++
++	camera1: camera-module@1 {
++#ifdef CONFIG_VIDEO_TC358749XBG
++		status = "okay";
++#else 
++		status = "disable";
++#endif
++		compatible = "toshiba,tc358749xbg-v4l2-i2c-subdev";
++		reg = < 0x0f >;
++		device_type = "v4l2-i2c-subdev";
++
++		clocks = <&cru SCLK_CIF_OUT>;
++		clock-names = "clk_cif_out";
++
++		pinctrl-names = "default";
++		pinctrl-0 = <&hdmiin_gpios>;
++
++		//rockchip,pwr-gpio = <&gpio2 6 GPIO_ACTIVE_HIGH>;
++		//rckchip,pwr-snd-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>;
++		//rockchip,pwr-trd-gpio = <&gpio2 5 GPIO_ACTIVE_HIGH>;
++		//rockchip,rst-gpio = <&gpio2 7 GPIO_ACTIVE_HIGH>;
++		power-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
++		power18-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
++		power33-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
++		csi-ctl-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
++		stanby-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
++		reset-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
++		int-gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
++
++		rockchip,camera-module-mclk-name = "clk_cif_out";
++		rockchip,camera-module-mipi-dphy-index = <0>;
++	};
++};
++
++&i2c4 {
++	status = "okay";
++
++  cm32181@10 {
++    status = "okay";
++    compatible = "capella,cm32181";
++    reg = <0x10>;
++  };
++
++  ak09911@0c {
++     status = "okay";
++     compatible = "ak,ak09911";
++     reg = <0x0c>;
++     type = <SENSOR_TYPE_COMPASS>;
++     poll_delay_ms = <30>;
++     layout = <3>;
++  };
++
++  lsm6ds3_gyro@6a {
++    status = "okay";
++    compatible = "lsm6ds3_gyro";
++    reg = <0x6a>;
++    pinctrl-names = "default";
++    pinctrl-0 = <&lsm6ds3_irq_gpio>;
++    irq-gpio = <&gpio1 24 IRQ_TYPE_EDGE_RISING>;
++    type = <SENSOR_TYPE_GYROSCOPE>;
++    irq_enable = <1>;
++    power-off-in-suspend = <1>;
++    poll_delay_ms = <30>;
++  };
++};
++
++&i2s2 {
++	#sound-dai-cells = <0>;
++	status = "okay";
++};
++
++&vopb {
++	status = "okay";
++};
++
++&vopb_mmu {
++	status = "okay";
++};
++
++&vopl {
++	status = "okay";
++};
++
++&vopl_mmu {
++	status = "okay";
++};
++
++&pinctrl {
++	buttons {
++		pwrbtn: pwrbtn {
++			rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++
++	lsm6ds3_gyro {
++		lsm6ds3_irq_gpio: lsm6ds3-irq-gpio {
++			rockchip,pins = <1 24 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
++	hallsensor {
++		mh248_irq_gpio: mh248-irq-gpio {
++			rockchip,pins = <0 13 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++
++  pcie {
++    pcie_drv: pcie-drv {
++      rockchip,pins =
++        <0 2 RK_FUNC_GPIO &pcfg_pull_none>;
++      };
++  };
++
++	lcd-panel {
++		lcd_panel_reset: lcd-panel-reset {
++			rockchip,pins = <4 30 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
++
++	hdmiin {
++		hdmiin_gpios: hdmiin-gpios {
++			rockchip,pins =
++				<2 5 RK_FUNC_GPIO &pcfg_pull_none>,
++				<2 6 RK_FUNC_GPIO &pcfg_pull_none>,
++				<2 7 RK_FUNC_GPIO &pcfg_pull_none>,
++				<2 8 RK_FUNC_GPIO &pcfg_pull_none>,
++				<2 9 RK_FUNC_GPIO &pcfg_pull_none>,
++				<2 12 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++};
++
++
++&dsi {
++#ifdef CONFIG_ROCKCHIP_DW_MIPI_DSI
++	status = "okay";
++#else
++	status = "disable";
++#endif
++	panel@0 {
++#ifdef CONFIG_DRM_PANEL_SIMPLE
++		status = "okay";
++#else
++		status = "disable";
++#endif
++		compatible = "simple-panel-dsi";
++		reg = <0>;
++		backlight = <&backlight>;
++		enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
++		reset-gpios = <&gpio4 30 GPIO_ACTIVE_LOW>;
++
++		reset-delay-ms = <5>;
++		init-delay-ms = <200>;
++		prepare-delay-ms = <15>;
++//		enable-delay-ms = <10>;
++//		disable-delay-ms = <20>;
++//		unprepare-delay-ms = <0>;
++		
++
++//		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
++		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM)>;
++		dsi,format = <MIPI_DSI_FMT_RGB888>;
++		bus-format = <0x100a>;
++		dsi,lanes = <4>;
++
++		panel-init-sequence = [
++/*			15 00 02 53 24
++			39 1e 03 f0 5a 5a
++			05 78 01 11
++			05 1e 01 29
++			39 00 04 c3 40 00 28
++			15 00 02 50 77
++			15 00 02 e1 66 
++			15 00 02 dc 67
++			15 00 02 d3 c8
++			15 00 02 50 00
++			15 00 02 f0 5a 
++			15 78 02 f5 80*/
++			
++			39 00 06 f0 55 aa 52 08 00
++			39 00 03 b1 68 01
++			39 00 02 b6 08
++			39 00 04 b8 01 02 08
++			39 00 03 bb 44 44
++			39 00 03 bc 00 00
++			39 00 06 bd 02 68 10 10 00
++			39 00 02 c8 80
++			39 00 06 f0 55 aa 52 08 01
++			39 00 03 b3 4f 4f
++			39 00 03 b4 10 10
++			39 00 03 b5 05 05
++			39 00 03 b9 35 35
++			39 00 04 ba ba 25 25
++			39 00 03 bc 68 00
++			39 00 03 bd 68 00
++			39 00 02 be 30
++			39 00 02 c0 0c
++			39 00 02 ca 00
++			39 00 06 f0 55 aa 52 08 02
++			39 00 02 ee 01
++			39 00 11 b0 00 00 00 0f 00 2a 00 40 00 54 00 76 00 93 00 c5
++			39 00 11 b1 00 f0 01 32 01 66 01 bb 01 ff 02 01 02 42 02 85
++			39 00 11 b2 02 af 02 e0 03 05 03 35 03 54 03 84 03 a0 03 c4
++			39 00 05 b3 03 f2 03 ff
++			39 00 06 f0 55 aa 52 08 03
++			39 00 03 b0 00 00
++			39 00 03 b1 00 00
++			39 00 06 b2 08 00 17 00 00
++			39 00 06 b6 05 00 00 00 00
++			39 00 06 ba 53 00 a0 00 00
++			39 00 06 bb 53 00 a0 00 00
++			39 00 05 c0 00 00 00 00
++			39 00 05 c1 00 00 00 00
++			39 00 02 c4 60
++			39 00 02 c5 c0
++			39 00 06 f0 55 aa 52 08 05
++			39 00 03 b0 17 06
++			39 00 03 b1 17 06
++			39 00 03 b2 17 06
++			39 00 03 b3 17 06
++			39 00 03 b4 17 06
++			39 00 03 b5 17 06
++			39 00 02 b8 0c
++			39 00 02 b9 00
++			39 00 02 ba 00
++			39 00 02 bb 0a
++			39 00 02 bc 02
++			39 00 06 bd 03 01 01 03 03
++			39 00 02 c0 07
++			39 00 02 c4 a2
++			39 00 03 c8 03 20
++			39 00 03 c9 01 21
++			39 00 04 cc 00 00 01
++			39 00 04 cd 00 00 01
++			39 00 06 d1 00 04 fc 07 14
++			39 00 06 d2 10 05 00 03 16
++			39 00 02 e5 06
++			39 00 02 e6 06
++			39 00 02 e7 06
++			39 00 02 e8 06
++			39 00 02 e9 06
++			39 00 02 ea 06
++			39 00 02 ed 30
++			39 00 06 f0 55 aa 52 08 06
++			39 00 03 b0 17 11
++			39 00 03 b1 16 10
++			39 00 03 b2 12 18
++			39 00 03 b3 13 19
++			39 00 03 b4 00 31
++			39 00 03 b5 31 34
++			39 00 03 b6 34 29
++			39 00 03 b7 2a 33 
++			39 00 03 b8 2e 2d
++			39 00 03 b9 08 34
++			39 00 03 ba 34 08
++			39 00 03 bb 2d 2e
++			39 00 03 bc 34 2a
++			39 00 03 bd 29 34
++			39 00 03 be 13 03
++			39 00 03 bf 31 00
++			39 00 03 c0 19 13
++			39 00 03 c1 18 12
++			39 00 03 c2 10 16
++			39 00 03 c3 11 17
++			39 00 03 e5 34 34
++			39 00 03 c4 12 18
++			39 00 03 c5 13 19
++			39 00 03 c6 17 11
++			39 00 03 c7 16 10
++			39 00 03 c8 08 31
++			39 00 03 c9 31 34
++			39 00 03 ca 34 29
++			39 00 03 cb 2a 33
++			39 00 03 cc 2d 2e
++			39 00 03 cd 00 34
++			39 00 03 ce 34 00
++			39 00 03 cf 2e 2d
++			39 00 03 d0 34 2a
++			39 00 03 d1 29 2a
++			39 00 03 d2 34 31
++			39 00 03 d3 31 08
++			39 00 03 d4 10 16
++			39 00 03 d5 11 17
++			39 00 03 d6 19 13
++			39 00 03 d7 18 12
++			39 00 03 e6 34 34
++			39 00 06 d8 00 00 00 00 00
++			39 00 06 d9 00 00 00 00 00
++			39 00 02 e7 00
++			05 78 01 11
++			05 14 01 29
++			39 00 02 35 00
++			39 14 06 f0 55 aa 52 08 01
++		];
++
++		panel-exit-sequence = [
++			05 00 01 28
++			05 78 01 10
++		];
++/*
++    power_ctr: power_ctr {
++        rockchip,debug = <0>;
++        lcd_en: lcd-en {
++            rockchip,power_type = <0>;
++            gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
++            rockchip,delay = <10>;
++        };
++        lcd_rst: lcd-rst {
++            rockchip,power_type = <0>;
++            gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
++            rockchip,delay = <5>;
++        };
++    };
++*/
++		display-timings {
++			native-mode = <&timing0>;
++
++			timing0: timing0 {
++				clock-frequency = <74000000>;
++				screen-type = <7>;
++				out-face    = <0>;
++				hactive = <800>;
++				vactive = <1280>;
++				hback-porch = <59>;
++				hfront-porch = <16>;
++				vback-porch = <3>;
++				vfront-porch = <8>;
++				hsync-len = <5>;
++				vsync-len = <5>;
++				hsync-active = <0>;
++				vsync-active = <0>;
++				de-active = <0>;
++				pixelclk-active = <0>;
++				swap-rb = <0>;
++				swap-rg = <0>;
++				swap-gb = <0>;
++			};
++		};
++	};
++};
++
+diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
+index 3d76b973..cfd08f03 100644
+--- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
+@@ -188,21 +188,8 @@
+ 
+ 		/* for rockchip boot on */
+ 		rockchip,pwm_id= <2>;
+-		rockchip,pwm_voltage = <900000>;
++		rockchip,pwm_voltage = <1000000>;
+ 	};
+-
+-	xin32k: xin32k {
+-		compatible = "fixed-clock";
+-		clock-frequency = <32768>;
+-		clock-output-names = "xin32k";
+-		#clock-cells = <0>;
+-	};
+-};
+-
+-&cdn_dp {
+-	status = "okay";
+-	extcon = <&fusb0>;
+-	phys = <&tcphy0_dp>;
+ };
+ 
+ &cpu_l0 {
+@@ -312,7 +299,7 @@
+ 		rockchip,system-power-controller;
+ 		wakeup-source;
+ 		#clock-cells = <1>;
+-		clock-output-names = "rk808-clkout1", "rk808-clkout2";
++		clock-output-names = "xin32k", "rk808-clkout2";
+ 
+ 		vcc1-supply = <&vcc3v3_sys>;
+ 		vcc2-supply = <&vcc3v3_sys>;
+@@ -529,7 +516,7 @@
+ };
+ 
+ &pcie0 {
+-	ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
++	ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
+ 	num-lanes = <4>;
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&pcie_clkreqn>;
+@@ -547,8 +534,6 @@
+ 
+ &pwm2 {
+ 	status = "okay";
+-	pinctrl-names = "active";
+-	pinctrl-0 = <&pwm2_pin_pull_down>;
+ };
+ 
+ &sdhci {