diff --git a/patch/kernel/sunxi-current/sunxi-h5-add-gpio-regulator-overclock.patch b/patch/kernel/sunxi-current/sunxi-h5-add-gpio-regulator-overclock.patch
index 848331e7ce..a1bca70b7b 100644
--- a/patch/kernel/sunxi-current/sunxi-h5-add-gpio-regulator-overclock.patch
+++ b/patch/kernel/sunxi-current/sunxi-h5-add-gpio-regulator-overclock.patch
@@ -1,12 +1,13 @@
 diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile
-index 128d32cbe..5227b9741 100644
+index 2334e0548..66c23cff2 100644
 --- a/arch/arm64/boot/dts/allwinner/overlay/Makefile
 +++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile
-@@ -13,6 +13,9 @@ dtbo-$(CONFIG_ARCH_SUNXI) += \
+@@ -14,6 +14,10 @@ dtbo-$(CONFIG_ARCH_SUNXI) += \
  	sun50i-a64-w1-gpio.dtbo \
  	sun50i-h5-analog-codec.dtbo \
  	sun50i-h5-cir.dtbo \
 +	sun50i-h5-cpu-clock-1.0GHz-1.1v.dtbo \
++	sun50i-h5-cpu-clock-1.2GHz-1.3v.dtbo \
 +	sun50i-h5-cpu-clock-1.3GHz-1.3v.dtbo \
 +	sun50i-h5-gpio-regulator-1.3v.dtbo \
  	sun50i-h5-i2c0.dtbo \
@@ -49,6 +50,43 @@ index 000000000..a8079e825
 +	};
 +};
 +
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.2GHz-1.3v.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.2GHz-1.3v.dts
+new file mode 100644
+index 000000000..81fd378b9
+--- /dev/null
++++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.2GHz-1.3v.dts
+@@ -0,0 +1,31 @@
++// DT overlay for CPU frequency operating points to up to 1.2GHz at a maximum CPU voltage of 1.3v
++
++/dts-v1/;
++/plugin/;
++
++/ {
++	fragment@0 {
++		target = <&cpu0_opp_table>;
++
++		__overlay__ {
++			compatible = "operating-points-v2";
++			opp-shared;
++
++			// in order to match the H5 DT cooling-maps, update the existing OP table in-place
++			// with the new voltages
++
++			opp-1104000000 {
++				opp-hz = /bits/ 64 <1104000000>;
++				opp-microvolt = <1300000 1300000 1300000>;
++				clock-latency-ns = <244144>; /* 8 32k periods */
++			};
++
++			opp-1200000000 {
++				opp-hz = /bits/ 64 <1200000000>;
++				opp-microvolt = <1300000 1300000 1300000>;
++				clock-latency-ns = <244144>; /* 8 32k periods */
++			};
++		};
++	};
++};
++
 diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz-1.3v.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz-1.3v.dts
 new file mode 100644
 index 000000000..ed0d9ac63
diff --git a/patch/kernel/sunxi-dev/sunxi-h5-add-gpio-regulator-overclock.patch b/patch/kernel/sunxi-dev/sunxi-h5-add-gpio-regulator-overclock.patch
index 848331e7ce..a1bca70b7b 100644
--- a/patch/kernel/sunxi-dev/sunxi-h5-add-gpio-regulator-overclock.patch
+++ b/patch/kernel/sunxi-dev/sunxi-h5-add-gpio-regulator-overclock.patch
@@ -1,12 +1,13 @@
 diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile
-index 128d32cbe..5227b9741 100644
+index 2334e0548..66c23cff2 100644
 --- a/arch/arm64/boot/dts/allwinner/overlay/Makefile
 +++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile
-@@ -13,6 +13,9 @@ dtbo-$(CONFIG_ARCH_SUNXI) += \
+@@ -14,6 +14,10 @@ dtbo-$(CONFIG_ARCH_SUNXI) += \
  	sun50i-a64-w1-gpio.dtbo \
  	sun50i-h5-analog-codec.dtbo \
  	sun50i-h5-cir.dtbo \
 +	sun50i-h5-cpu-clock-1.0GHz-1.1v.dtbo \
++	sun50i-h5-cpu-clock-1.2GHz-1.3v.dtbo \
 +	sun50i-h5-cpu-clock-1.3GHz-1.3v.dtbo \
 +	sun50i-h5-gpio-regulator-1.3v.dtbo \
  	sun50i-h5-i2c0.dtbo \
@@ -49,6 +50,43 @@ index 000000000..a8079e825
 +	};
 +};
 +
+diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.2GHz-1.3v.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.2GHz-1.3v.dts
+new file mode 100644
+index 000000000..81fd378b9
+--- /dev/null
++++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.2GHz-1.3v.dts
+@@ -0,0 +1,31 @@
++// DT overlay for CPU frequency operating points to up to 1.2GHz at a maximum CPU voltage of 1.3v
++
++/dts-v1/;
++/plugin/;
++
++/ {
++	fragment@0 {
++		target = <&cpu0_opp_table>;
++
++		__overlay__ {
++			compatible = "operating-points-v2";
++			opp-shared;
++
++			// in order to match the H5 DT cooling-maps, update the existing OP table in-place
++			// with the new voltages
++
++			opp-1104000000 {
++				opp-hz = /bits/ 64 <1104000000>;
++				opp-microvolt = <1300000 1300000 1300000>;
++				clock-latency-ns = <244144>; /* 8 32k periods */
++			};
++
++			opp-1200000000 {
++				opp-hz = /bits/ 64 <1200000000>;
++				opp-microvolt = <1300000 1300000 1300000>;
++				clock-latency-ns = <244144>; /* 8 32k periods */
++			};
++		};
++	};
++};
++
 diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz-1.3v.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz-1.3v.dts
 new file mode 100644
 index 000000000..ed0d9ac63