diff --git a/patch/kernel/archive/sunxi-6.6/patches.armbian/arm64-dts-allwinner-sun50i-h616-spi1-cs1-pin.patch b/patch/kernel/archive/sunxi-6.6/patches.armbian/arm64-dts-allwinner-sun50i-h616-spi1-cs1-pin.patch new file mode 100644 index 0000000000..ddac57ec98 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.6/patches.armbian/arm64-dts-allwinner-sun50i-h616-spi1-cs1-pin.patch @@ -0,0 +1,30 @@ +From 64b0221e526f6359a39ab3beb9a693dc964b1112 Mon Sep 17 00:00:00 2001 +From: Patrick Yavitz +Date: Wed, 6 Mar 2024 06:51:01 -0500 +Subject: [PATCH] arch: arm64: dts: allwinner: sun50i-h616: spi1 cs1 pin + +Signed-off-by: Patrick Yavitz +--- + arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +index 33f8c758b9e6..1354dca01e78 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +@@ -397,6 +397,12 @@ spi1_cs0_pin: spi1-cs0-pin { + function = "spi1"; + }; + ++ /omit-if-no-ref/ ++ spi1_cs1_pin: spi1-cs1-pin { ++ pins = "PH9"; ++ function = "spi1"; ++ }; ++ + uart0_ph_pins: uart0-ph-pins { + pins = "PH0", "PH1"; + function = "uart0"; +-- +2.39.2 + diff --git a/patch/kernel/archive/sunxi-6.6/patches.armbian/arm64-dts-allwinner-sun50i-h618-bananapi-m4-zero.patch b/patch/kernel/archive/sunxi-6.6/patches.armbian/arm64-dts-allwinner-sun50i-h618-bananapi-m4-zero.patch index 55bc0d5fdd..c6ab0674be 100644 --- a/patch/kernel/archive/sunxi-6.6/patches.armbian/arm64-dts-allwinner-sun50i-h618-bananapi-m4-zero.patch +++ b/patch/kernel/archive/sunxi-6.6/patches.armbian/arm64-dts-allwinner-sun50i-h618-bananapi-m4-zero.patch @@ -27,10 +27,10 @@ index d2266f5e5795..4374ed5d9c86 100644 subdir-y := $(dts-dirs) overlay diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-zero.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-zero.dts new file mode 100644 -index 000000000000..ed3ba5fc7448 +index 000000000000..248e1f5a344e --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-zero.dts -@@ -0,0 +1,255 @@ +@@ -0,0 +1,258 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2024 Patrick Yavitz @@ -55,6 +55,7 @@ index 000000000000..ed3ba5fc7448 + serial0 = &uart0; + i2c3 = &i2c3; + i2c4 = &i2c4; ++ spi1 = &spi1; + }; + + chosen { @@ -120,6 +121,19 @@ index 000000000000..ed3ba5fc7448 + status = "okay"; +}; + ++/* Connected to an on-board RTL8821CU USB WiFi chip. */ ++&ehci1 { ++ status = "okay"; ++}; ++ ++&ehci2 { ++ status = "okay"; ++}; ++ ++&ehci3 { ++ status = "okay"; ++}; ++ +&emac1 { + pinctrl-names = "default"; + pinctrl-0 = <&ext_rgmii_pins>; @@ -172,6 +186,18 @@ index 000000000000..ed3ba5fc7448 + status = "okay"; +}; + ++&ohci1 { ++ status = "okay"; ++}; ++ ++&ohci2 { ++ status = "okay"; ++}; ++ ++&ohci3 { ++ status = "okay"; ++}; ++ +&pio { + vcc-pc-supply = <®_aldo1>; + vcc-pf-supply = <®_dldo1>; @@ -233,18 +259,28 @@ index 000000000000..ed3ba5fc7448 + }; +}; + ++&spi1 { ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi1_pins>, <&spi1_cs1_pin>; ++ ++ spidev@1 { ++ compatible = "rohm,dh2228fv"; ++ status = "disabled"; ++ reg = <1>; ++ spi-max-frequency = <1000000>; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_ph_pins>; ++ status = "okay"; ++}; ++ +&usbotg { -+ /* -+ * PHY0 pins are connected to a USB-C socket, but a role switch is not -+ * implemented: both CC pins are pulled to GND via a 5.1K resistor. -+ * The VBUS pins power the device, so a fixed peripheral mode -+ * is the best choice. -+ * The board can be powered via GPIOs, in this case port0 *can* -+ * act as a host (with a cable/adapter ignoring CC), as VBUS is -+ * then provided by the GPIOs. Any user of this setup would -+ * need to adjust the DT accordingly: dr_mode set to "host", -+ * enabling OHCI0 and EHCI0. -+ */ + dr_mode = "peripheral"; + status = "okay"; +}; @@ -253,39 +289,6 @@ index 000000000000..ed3ba5fc7448 + usb1_vbus-supply = <®_usb_vbus>; + status = "okay"; +}; -+ -+/* Connected to an on-board RTL8821CU USB WiFi chip. */ -+&ehci1 { -+ clocks = <&ccu CLK_BUS_EHCI1>; -+ resets = <&ccu RST_BUS_EHCI1>; -+ status = "okay"; -+}; -+ -+&ehci2 { -+ status = "okay"; -+}; -+ -+&ehci3 { -+ status = "okay"; -+}; -+ -+&ohci1 { -+ status = "okay"; -+}; -+ -+&ohci2 { -+ status = "okay"; -+}; -+ -+&ohci3 { -+ status = "okay"; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_ph_pins>; -+ status = "okay"; -+}; -- 2.39.2 diff --git a/patch/kernel/archive/sunxi-6.6/series.armbian b/patch/kernel/archive/sunxi-6.6/series.armbian index 15cccf46c5..c4a095d4d7 100644 --- a/patch/kernel/archive/sunxi-6.6/series.armbian +++ b/patch/kernel/archive/sunxi-6.6/series.armbian @@ -198,3 +198,4 @@ patches.armbian/arm64-dts-sun50i-h616-Add-dma-node.patch patches.armbian/arm64-dts-H616-Add-overlays-that-are-also-compatible-with.patch patches.armbian/arm64-dts-allwinner-sun50i-h616-PG-12c-pins.patch + patches.armbian/arm64-dts-allwinner-sun50i-h616-spi1-cs1-pin.patch diff --git a/patch/kernel/archive/sunxi-6.6/series.conf b/patch/kernel/archive/sunxi-6.6/series.conf index a84c78f89a..eb93cbf71f 100644 --- a/patch/kernel/archive/sunxi-6.6/series.conf +++ b/patch/kernel/archive/sunxi-6.6/series.conf @@ -467,3 +467,4 @@ patches.armbian/arm64-dts-sun50i-h616-Add-dma-node.patch patches.armbian/arm64-dts-H616-Add-overlays-that-are-also-compatible-with.patch patches.armbian/arm64-dts-allwinner-sun50i-h616-PG-12c-pins.patch + patches.armbian/arm64-dts-allwinner-sun50i-h616-spi1-cs1-pin.patch diff --git a/patch/kernel/archive/sunxi-6.7/patches.armbian/arm64-dts-allwinner-sun50i-h616-spi1-cs1-pin.patch b/patch/kernel/archive/sunxi-6.7/patches.armbian/arm64-dts-allwinner-sun50i-h616-spi1-cs1-pin.patch new file mode 100644 index 0000000000..ddac57ec98 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.7/patches.armbian/arm64-dts-allwinner-sun50i-h616-spi1-cs1-pin.patch @@ -0,0 +1,30 @@ +From 64b0221e526f6359a39ab3beb9a693dc964b1112 Mon Sep 17 00:00:00 2001 +From: Patrick Yavitz +Date: Wed, 6 Mar 2024 06:51:01 -0500 +Subject: [PATCH] arch: arm64: dts: allwinner: sun50i-h616: spi1 cs1 pin + +Signed-off-by: Patrick Yavitz +--- + arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +index 33f8c758b9e6..1354dca01e78 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +@@ -397,6 +397,12 @@ spi1_cs0_pin: spi1-cs0-pin { + function = "spi1"; + }; + ++ /omit-if-no-ref/ ++ spi1_cs1_pin: spi1-cs1-pin { ++ pins = "PH9"; ++ function = "spi1"; ++ }; ++ + uart0_ph_pins: uart0-ph-pins { + pins = "PH0", "PH1"; + function = "uart0"; +-- +2.39.2 + diff --git a/patch/kernel/archive/sunxi-6.7/patches.armbian/arm64-dts-allwinner-sun50i-h618-bananapi-m4-zero.patch b/patch/kernel/archive/sunxi-6.7/patches.armbian/arm64-dts-allwinner-sun50i-h618-bananapi-m4-zero.patch index 55bc0d5fdd..c6ab0674be 100644 --- a/patch/kernel/archive/sunxi-6.7/patches.armbian/arm64-dts-allwinner-sun50i-h618-bananapi-m4-zero.patch +++ b/patch/kernel/archive/sunxi-6.7/patches.armbian/arm64-dts-allwinner-sun50i-h618-bananapi-m4-zero.patch @@ -27,10 +27,10 @@ index d2266f5e5795..4374ed5d9c86 100644 subdir-y := $(dts-dirs) overlay diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-zero.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-zero.dts new file mode 100644 -index 000000000000..ed3ba5fc7448 +index 000000000000..248e1f5a344e --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-zero.dts -@@ -0,0 +1,255 @@ +@@ -0,0 +1,258 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2024 Patrick Yavitz @@ -55,6 +55,7 @@ index 000000000000..ed3ba5fc7448 + serial0 = &uart0; + i2c3 = &i2c3; + i2c4 = &i2c4; ++ spi1 = &spi1; + }; + + chosen { @@ -120,6 +121,19 @@ index 000000000000..ed3ba5fc7448 + status = "okay"; +}; + ++/* Connected to an on-board RTL8821CU USB WiFi chip. */ ++&ehci1 { ++ status = "okay"; ++}; ++ ++&ehci2 { ++ status = "okay"; ++}; ++ ++&ehci3 { ++ status = "okay"; ++}; ++ +&emac1 { + pinctrl-names = "default"; + pinctrl-0 = <&ext_rgmii_pins>; @@ -172,6 +186,18 @@ index 000000000000..ed3ba5fc7448 + status = "okay"; +}; + ++&ohci1 { ++ status = "okay"; ++}; ++ ++&ohci2 { ++ status = "okay"; ++}; ++ ++&ohci3 { ++ status = "okay"; ++}; ++ +&pio { + vcc-pc-supply = <®_aldo1>; + vcc-pf-supply = <®_dldo1>; @@ -233,18 +259,28 @@ index 000000000000..ed3ba5fc7448 + }; +}; + ++&spi1 { ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi1_pins>, <&spi1_cs1_pin>; ++ ++ spidev@1 { ++ compatible = "rohm,dh2228fv"; ++ status = "disabled"; ++ reg = <1>; ++ spi-max-frequency = <1000000>; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_ph_pins>; ++ status = "okay"; ++}; ++ +&usbotg { -+ /* -+ * PHY0 pins are connected to a USB-C socket, but a role switch is not -+ * implemented: both CC pins are pulled to GND via a 5.1K resistor. -+ * The VBUS pins power the device, so a fixed peripheral mode -+ * is the best choice. -+ * The board can be powered via GPIOs, in this case port0 *can* -+ * act as a host (with a cable/adapter ignoring CC), as VBUS is -+ * then provided by the GPIOs. Any user of this setup would -+ * need to adjust the DT accordingly: dr_mode set to "host", -+ * enabling OHCI0 and EHCI0. -+ */ + dr_mode = "peripheral"; + status = "okay"; +}; @@ -253,39 +289,6 @@ index 000000000000..ed3ba5fc7448 + usb1_vbus-supply = <®_usb_vbus>; + status = "okay"; +}; -+ -+/* Connected to an on-board RTL8821CU USB WiFi chip. */ -+&ehci1 { -+ clocks = <&ccu CLK_BUS_EHCI1>; -+ resets = <&ccu RST_BUS_EHCI1>; -+ status = "okay"; -+}; -+ -+&ehci2 { -+ status = "okay"; -+}; -+ -+&ehci3 { -+ status = "okay"; -+}; -+ -+&ohci1 { -+ status = "okay"; -+}; -+ -+&ohci2 { -+ status = "okay"; -+}; -+ -+&ohci3 { -+ status = "okay"; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_ph_pins>; -+ status = "okay"; -+}; -- 2.39.2 diff --git a/patch/kernel/archive/sunxi-6.7/series.armbian b/patch/kernel/archive/sunxi-6.7/series.armbian index 15cccf46c5..c4a095d4d7 100644 --- a/patch/kernel/archive/sunxi-6.7/series.armbian +++ b/patch/kernel/archive/sunxi-6.7/series.armbian @@ -198,3 +198,4 @@ patches.armbian/arm64-dts-sun50i-h616-Add-dma-node.patch patches.armbian/arm64-dts-H616-Add-overlays-that-are-also-compatible-with.patch patches.armbian/arm64-dts-allwinner-sun50i-h616-PG-12c-pins.patch + patches.armbian/arm64-dts-allwinner-sun50i-h616-spi1-cs1-pin.patch diff --git a/patch/kernel/archive/sunxi-6.7/series.conf b/patch/kernel/archive/sunxi-6.7/series.conf index e1f8270bba..46b75f0c92 100644 --- a/patch/kernel/archive/sunxi-6.7/series.conf +++ b/patch/kernel/archive/sunxi-6.7/series.conf @@ -520,3 +520,4 @@ patches.armbian/arm64-dts-sun50i-h616-Add-dma-node.patch patches.armbian/arm64-dts-H616-Add-overlays-that-are-also-compatible-with.patch patches.armbian/arm64-dts-allwinner-sun50i-h616-PG-12c-pins.patch + patches.armbian/arm64-dts-allwinner-sun50i-h616-spi1-cs1-pin.patch diff --git a/patch/u-boot/v2024.01/board_bananapim4zero/001-add-board-bananapi-m4-zero.patch b/patch/u-boot/v2024.01/board_bananapim4zero/001-add-board-bananapi-m4-zero.patch index 4f9c55df10..57a0f5ffa9 100644 --- a/patch/u-boot/v2024.01/board_bananapim4zero/001-add-board-bananapi-m4-zero.patch +++ b/patch/u-boot/v2024.01/board_bananapim4zero/001-add-board-bananapi-m4-zero.patch @@ -1,14 +1,14 @@ -From ca1e9dfcfbba5e3ba9d3a8a3f3cf57ab67603e90 Mon Sep 17 00:00:00 2001 +From a23c8425ef27dcbf261e9cabbf0e58c6c7a23bac Mon Sep 17 00:00:00 2001 From: Patrick Yavitz -Date: Wed, 28 Feb 2024 12:27:04 -0500 +Date: Tue, 5 Mar 2024 07:49:40 -0500 Subject: [PATCH] add board bananapi m4 zero Signed-off-by: Patrick Yavitz --- arch/arm/dts/Makefile | 3 +- - arch/arm/dts/sun50i-h618-bananapi-m4-zero.dts | 191 ++++++++++++++++++ + arch/arm/dts/sun50i-h618-bananapi-m4-zero.dts | 189 ++++++++++++++++++ configs/bananapi_m4zero_defconfig | 29 +++ - 3 files changed, 222 insertions(+), 1 deletion(-) + 3 files changed, 220 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/sun50i-h618-bananapi-m4-zero.dts create mode 100644 configs/bananapi_m4zero_defconfig @@ -28,10 +28,10 @@ index 9d28a485be..5fb6040c5e 100644 sun50i-a64-bananapi-m64.dtb \ diff --git a/arch/arm/dts/sun50i-h618-bananapi-m4-zero.dts b/arch/arm/dts/sun50i-h618-bananapi-m4-zero.dts new file mode 100644 -index 0000000000..b8dcfb8612 +index 0000000000..cccd58dc37 --- /dev/null +++ b/arch/arm/dts/sun50i-h618-bananapi-m4-zero.dts -@@ -0,0 +1,191 @@ +@@ -0,0 +1,189 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2024 Patrick Yavitz @@ -92,6 +92,15 @@ index 0000000000..b8dcfb8612 + cpu-supply = <®_dcdc2>; +}; + ++/* Connected to an on-board RTL8821CU USB WiFi chip. */ ++&ehci1 { ++ status = "okay"; ++}; ++ ++&ehci3 { ++ status = "okay"; ++}; ++ +&emac0 { + pinctrl-names = "default"; + pinctrl-0 = <&ext_rgmii_pins>; @@ -132,6 +141,10 @@ index 0000000000..b8dcfb8612 + status = "okay"; +}; + ++&ohci3 { ++ status = "okay"; ++}; ++ +&pio { + vcc-pc-supply = <®_aldo1>; + vcc-pf-supply = <®_dldo1>; @@ -193,6 +206,12 @@ index 0000000000..b8dcfb8612 + }; +}; + ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_ph_pins>; ++ status = "okay"; ++}; ++ +&usbotg { + dr_mode = "peripheral"; + status = "okay"; @@ -202,30 +221,9 @@ index 0000000000..b8dcfb8612 + usb1_vbus-supply = <®_usb_vbus>; + status = "okay"; +}; -+ -+/* Connected to an on-board RTL8821CU USB WiFi chip. */ -+&ehci1 { -+ clocks = <&ccu CLK_BUS_EHCI1>; -+ resets = <&ccu RST_BUS_EHCI1>; -+ status = "disabled"; -+}; -+ -+&ehci3 { -+ status = "disabled"; -+}; -+ -+&ohci3 { -+ status = "okay"; -+}; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_ph_pins>; -+ status = "okay"; -+}; diff --git a/configs/bananapi_m4zero_defconfig b/configs/bananapi_m4zero_defconfig new file mode 100644 -index 0000000000..4b4ad0e8e7 +index 0000000000..a1bec63df3 --- /dev/null +++ b/configs/bananapi_m4zero_defconfig @@ -0,0 +1,29 @@ @@ -237,10 +235,10 @@ index 0000000000..4b4ad0e8e7 +CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e +CONFIG_DRAM_SUN50I_H616_CA_DRI=0x0e0e +CONFIG_DRAM_SUN50I_H616_ODT_EN=0xaaaaeeee -+CONFIG_DRAM_SUN50I_H616_TPR6=0x44000000 ++CONFIG_DRAM_SUN50I_H616_TPR6=0x48808080 +CONFIG_DRAM_SUN50I_H616_TPR10=0x402f6663 -+CONFIG_DRAM_SUN50I_H616_TPR11=0x24242624 -+CONFIG_DRAM_SUN50I_H616_TPR12=0x0f0f100f ++CONFIG_DRAM_SUN50I_H616_TPR11=0x26262524 ++CONFIG_DRAM_SUN50I_H616_TPR12=0x100f100f +CONFIG_MACH_SUN50I_H616=y +CONFIG_SUNXI_DRAM_H616_LPDDR4=y +CONFIG_DRAM_CLK=792 @@ -255,9 +253,9 @@ index 0000000000..4b4ad0e8e7 +CONFIG_SUN8I_EMAC=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_AXP313_POWER=y -+# CONFIG_USB_EHCI_HCD= is not set ++CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y -+# CONFIG_USB_MUSB_GADGET= is not set ++CONFIG_USB_MUSB_GADGET=y -- 2.39.2 diff --git a/patch/u-boot/v2024.01/board_bananapim4zero/006-add-barrier-and-udelay-to-mctl_mem_matches-function.patch b/patch/u-boot/v2024.01/board_bananapim4zero/006-add-barrier-and-udelay-to-mctl_mem_matches-function.patch deleted file mode 100644 index 184c5c1493..0000000000 --- a/patch/u-boot/v2024.01/board_bananapim4zero/006-add-barrier-and-udelay-to-mctl_mem_matches-function.patch +++ /dev/null @@ -1,39 +0,0 @@ -From f3f90bf6a9853596eed287f2860f0b91f534fcd0 Mon Sep 17 00:00:00 2001 -From: Patrick Yavitz -Date: Thu, 29 Feb 2024 21:16:59 -0500 -Subject: [PATCH] add barrier and udelay to mctl_mem_matches function - -https://lore.kernel.org/all/ZWMv816r8YxPwsJO@BOB1/T/#mec26415158efa10e6f78c5c1a651bb834f8599c4 - -Signed-off-by: Patrick Yavitz ---- - arch/arm/mach-sunxi/dram_helpers.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/arch/arm/mach-sunxi/dram_helpers.c b/arch/arm/mach-sunxi/dram_helpers.c -index cdf2750f1c..03caaad28a 100644 ---- a/arch/arm/mach-sunxi/dram_helpers.c -+++ b/arch/arm/mach-sunxi/dram_helpers.c -@@ -10,6 +10,7 @@ - #include - #include - #include -+#include - - /* - * Wait up to 1s for value to be set in given part of reg. -@@ -34,8 +35,11 @@ bool mctl_mem_matches(u32 offset) - { - /* Try to write different values to RAM at two addresses */ - writel(0, CFG_SYS_SDRAM_BASE); -+ dsb(); -+ udelay(1000); - writel(0xaa55aa55, (ulong)CFG_SYS_SDRAM_BASE + offset); - dsb(); -+ udelay(1000); - /* Check if the same value is actually observed when reading back */ - return readl(CFG_SYS_SDRAM_BASE) == - readl((ulong)CFG_SYS_SDRAM_BASE + offset); --- -2.39.2 - diff --git a/patch/u-boot/v2024.01/board_bananapim4zero/006-sunxi-restore-modified-memory.patch b/patch/u-boot/v2024.01/board_bananapim4zero/006-sunxi-restore-modified-memory.patch new file mode 100644 index 0000000000..4e3f563099 --- /dev/null +++ b/patch/u-boot/v2024.01/board_bananapim4zero/006-sunxi-restore-modified-memory.patch @@ -0,0 +1,171 @@ +From a4fc93b5b28f8c733fcc54a0bc428481edd583ee Mon Sep 17 00:00:00 2001 +From: Andrey Skvortsov +Date: Tue, 5 Mar 2024 20:30:10 -0500 +Subject: [PATCH] sunxi: reorganize mctl_mem_matches_* functions + +mctl_mem_matches and mctl_mem_matches_base identical functions. To +avoid code duplication move them to dram_helpers and make +mctl_mem_matches use generic mctl_mem_matches_base. + +Signed-off-by: Andrey Skvortsov +Reviewed-by: Andre Przywara +--- + arch/arm/include/asm/arch-sunxi/dram.h | 1 + + arch/arm/mach-sunxi/dram_sunxi_dw.c | 14 -------------- + 2 files changed, 1 insertion(+), 14 deletions(-) + +diff --git a/arch/arm/include/asm/arch-sunxi/dram.h b/arch/arm/include/asm/arch-sunxi/dram.h +index 682daae6b1..9d21b49241 100644 +--- a/arch/arm/include/asm/arch-sunxi/dram.h ++++ b/arch/arm/include/asm/arch-sunxi/dram.h +@@ -40,5 +40,6 @@ + unsigned long sunxi_dram_init(void); + void mctl_await_completion(u32 *reg, u32 mask, u32 val); + bool mctl_mem_matches(u32 offset); ++bool mctl_mem_matches_base(u32 offset, ulong base); + + #endif /* _SUNXI_DRAM_H */ +diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-sunxi/dram_sunxi_dw.c +index 9382d3d0be..4dc1a19641 100644 +--- a/arch/arm/mach-sunxi/dram_sunxi_dw.c ++++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c +@@ -652,20 +652,6 @@ static int mctl_channel_init(uint16_t socid, struct dram_para *para) + return 0; + } + +-/* +- * Test if memory at offset offset matches memory at a certain base +- */ +-static bool mctl_mem_matches_base(u32 offset, ulong base) +-{ +- /* Try to write different values to RAM at two addresses */ +- writel(0, base); +- writel(0xaa55aa55, base + offset); +- dsb(); +- /* Check if the same value is actually observed when reading back */ +- return readl(base) == +- readl(base + offset); +-} +- + static void mctl_auto_detect_dram_size_rank(uint16_t socid, struct dram_para *para, ulong base, struct rank_para *rank) + { + /* detect row address bits */ +-- +2.39.2 + +From 1800c04c0212b87cebc6314cfd88d8b7e3f56970 Mon Sep 17 00:00:00 2001 +From: Andrey Skvortsov +Date: Tue, 5 Mar 2024 20:18:25 -0500 +Subject: [PATCH] sunxi: restore modified memory + +Current sunxi DRAM initialisation code does several test accesses to the +DRAM array to detect aliasing effects and so determine the correct +row/column configuration. This changes the DRAM content, which breaks +use cases like soft reset and Linux's ramoops mechanism. + +Fix this problem by saving and restoring the content of the DRAM cells +that is used for the test writes. + +Signed-off-by: Andrey Skvortsov +Reviewed-by: Andre Przywara +--- + arch/arm/mach-sunxi/dram_helpers.c | 35 ++++++++++++++++++++++++------ + 1 file changed, 28 insertions(+), 7 deletions(-) + +diff --git a/arch/arm/mach-sunxi/dram_helpers.c b/arch/arm/mach-sunxi/dram_helpers.c +index cdf2750f1c..83dbe4ca98 100644 +--- a/arch/arm/mach-sunxi/dram_helpers.c ++++ b/arch/arm/mach-sunxi/dram_helpers.c +@@ -5,8 +5,9 @@ + * (C) Copyright 2015 Hans de Goede + */ + +-#include ++#include + #include ++#include + #include + #include + #include +@@ -25,19 +26,39 @@ void mctl_await_completion(u32 *reg, u32 mask, u32 val) + } + + /* +- * Test if memory at offset offset matches memory at begin of DRAM ++ * Test if memory at offset matches memory at a certain base + * + * Note: dsb() is not available on ARMv5 in Thumb mode + */ + #ifndef CONFIG_MACH_SUNIV +-bool mctl_mem_matches(u32 offset) ++bool mctl_mem_matches_base(u32 offset, ulong base) + { ++ u32 val_base; ++ u32 val_offset; ++ bool ret; ++ ++ /* Save original values */ ++ val_base = readl(base); ++ val_offset = readl(base + offset); ++ + /* Try to write different values to RAM at two addresses */ +- writel(0, CFG_SYS_SDRAM_BASE); +- writel(0xaa55aa55, (ulong)CFG_SYS_SDRAM_BASE + offset); ++ writel(0, base); ++ writel(0xaa55aa55, base + offset); + dsb(); + /* Check if the same value is actually observed when reading back */ +- return readl(CFG_SYS_SDRAM_BASE) == +- readl((ulong)CFG_SYS_SDRAM_BASE + offset); ++ ret = readl(base) == readl(base + offset); ++ ++ /* Restore original values */ ++ writel(val_base, base); ++ writel(val_offset, base + offset); ++ return ret; ++} ++ ++/* ++ * Test if memory at offset matches memory at begin of DRAM ++ */ ++bool mctl_mem_matches(u32 offset) ++{ ++ return mctl_mem_matches_base(offset, CFG_SYS_SDRAM_BASE); + } + #endif +-- +2.39.2 + +From 4d6a96ec60255a18cbf0f79985b306de20c0a9c5 Mon Sep 17 00:00:00 2001 +From: Patrick Yavitz +Date: Tue, 5 Mar 2024 20:38:57 -0500 +Subject: [PATCH] mach-sunxi: dram_helpers: add delay to steady dram detection + +Signed-off-by: Patrick Yavitz +--- + arch/arm/mach-sunxi/dram_helpers.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm/mach-sunxi/dram_helpers.c b/arch/arm/mach-sunxi/dram_helpers.c +index 83dbe4ca98..df7845502d 100644 +--- a/arch/arm/mach-sunxi/dram_helpers.c ++++ b/arch/arm/mach-sunxi/dram_helpers.c +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + + /* + * Wait up to 1s for value to be set in given part of reg. +@@ -45,6 +46,7 @@ bool mctl_mem_matches_base(u32 offset, ulong base) + writel(0, base); + writel(0xaa55aa55, base + offset); + dsb(); ++ udelay(150); + /* Check if the same value is actually observed when reading back */ + ret = readl(base) == readl(base + offset); + +-- +2.39.2 +