From 634ec8f5dac0f22733dfb781d2e744ee5d89117a Mon Sep 17 00:00:00 2001 From: mei Date: Sat, 1 Jun 2019 00:05:46 +0800 Subject: [PATCH] patches clean up and fix lite2 usb3.0 port(works but only usb2.0 part) (#1390) * [sunxi-dev][h6]update orangepi lite2 dts file patch * [sunxi-dev][h6]update patch for sun50i-h6.dtsi * [sunxi-dev][h6] new operation voltage table of allwinner h6 The correct operation voltages are find out after many reboots and test (over 20+). the original 1.16v@1.64/1.8GHz was too high since standard cell voltage of 28nm@HPC is 0.9v, h6 got overheat very quickly over 110 Celsius and then system hangs, a power-cycle off is needed to reset soc. I use 'stress -c 4' to do pressure test, with a medium size passive heatsink on top of h6. The pressure test proves that the soc has about 4 watt power consuming that is much lesser than original 6~7.x watt when running at 1.8GHz(orangepi lite2 with usb Ethernet rtl8153 and usb hub, wifi is connected but not used). Soc runs much more stable and does not get overheat easily under heavy load with new opp table. * [sunxi-dev][h6] orangepi lite2 wifi fix bcm43455-fmac is buggy, reset to bcm4329-fmac --- ...0-general-h6-add-dma-i2c-ir-spi-uart.patch | 329 ++++++++++++++++ .../0012-general-h6-new-opp-table.patch | 69 ++++ .../sunxi-dev/board-h6-clock-higher.patch | 17 - ...rd-h6-orangepi-lite2-fix-missing-all.patch | 350 ++++++++++++++++++ ...d-h6-orangepi-lite2-fix-missing-wifi.patch | 34 -- ...ite2-fix-missing-regulator-always-on.patch | 19 - .../sunxi-dev/force-mmc0-bus-width-H6.patch | 12 - .../kernel/sunxi-dev/general-add-H6-DMA.patch | 20 - .../sunxi-dev/general-add-H6-I2Cs.patch | 75 ---- .../sunxi-dev/general-add-H6-IR-RX.patch | 33 -- .../sunxi-dev/general-add-H6-SPIs.patch | 60 --- .../sunxi-dev/general-add-H6-UARTs.patch | 93 ----- 12 files changed, 748 insertions(+), 363 deletions(-) create mode 100644 patch/kernel/sunxi-dev/0010-general-h6-add-dma-i2c-ir-spi-uart.patch create mode 100644 patch/kernel/sunxi-dev/0012-general-h6-new-opp-table.patch delete mode 100644 patch/kernel/sunxi-dev/board-h6-clock-higher.patch create mode 100644 patch/kernel/sunxi-dev/board-h6-orangepi-lite2-fix-missing-all.patch delete mode 100644 patch/kernel/sunxi-dev/board-h6-orangepi-lite2-fix-missing-wifi.patch delete mode 100644 patch/kernel/sunxi-dev/board-opilite2-fix-missing-regulator-always-on.patch delete mode 100644 patch/kernel/sunxi-dev/force-mmc0-bus-width-H6.patch delete mode 100644 patch/kernel/sunxi-dev/general-add-H6-DMA.patch delete mode 100644 patch/kernel/sunxi-dev/general-add-H6-I2Cs.patch delete mode 100644 patch/kernel/sunxi-dev/general-add-H6-IR-RX.patch delete mode 100644 patch/kernel/sunxi-dev/general-add-H6-SPIs.patch delete mode 100644 patch/kernel/sunxi-dev/general-add-H6-UARTs.patch diff --git a/patch/kernel/sunxi-dev/0010-general-h6-add-dma-i2c-ir-spi-uart.patch b/patch/kernel/sunxi-dev/0010-general-h6-add-dma-i2c-ir-spi-uart.patch new file mode 100644 index 0000000000..337864d1e5 --- /dev/null +++ b/patch/kernel/sunxi-dev/0010-general-h6-add-dma-i2c-ir-spi-uart.patch @@ -0,0 +1,329 @@ +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +index dc785da9c..141fd186b 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +@@ -113,6 +113,12 @@ + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + ++ opp@1640000000 { ++ opp-hz = /bits/ 64 <1640000000>; ++ opp-microvolt = <1160000 1160000 1160000>; ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ }; ++ + opp@1800000000 { + opp-hz = /bits/ 64 <1800000000>; + opp-microvolt = <1160000 1160000 1160000>; +@@ -254,6 +260,26 @@ + #reset-cells = <1>; + }; + ++ dma: dma-controller@3002000 { ++ compatible = "allwinner,sun8i-h3-dma"; ++ reg = <0x03002000 0x1000>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_DMA>; ++ resets = <&ccu RST_BUS_DMA>; ++ #dma-cells = <1>; ++ }; ++ ++ gic: interrupt-controller@3021000 { ++ compatible = "arm,gic-400"; ++ reg = <0x03021000 0x1000>, ++ <0x03022000 0x2000>, ++ <0x03024000 0x2000>, ++ <0x03026000 0x2000>; ++ interrupts = ; ++ interrupt-controller; ++ #interrupt-cells = <3>; ++ }; ++ + sid: efuse@3006000 { + compatible = "allwinner,sun50i-h6-sid"; + reg = <0x03006000 0x1000>; +@@ -279,6 +305,7 @@ + interrupt-controller; + #interrupt-cells = <3>; + ++ /omit-if-no-ref/ + ext_rgmii_pins: rgmii_pins { + pins = "PD0", "PD1", "PD2", "PD3", "PD4", + "PD5", "PD7", "PD8", "PD9", "PD10", +@@ -292,6 +319,24 @@ + function = "hdmi"; + }; + ++ i2c0_pins: i2c0 { ++ pins = "PD25", "PD26"; ++ function = "i2c0"; ++ pull = <1>; ++ }; ++ ++ i2c1_pins: i2c1 { ++ pins = "PH5", "PH6"; ++ function = "i2c1"; ++ pull = <1>; ++ }; ++ ++ i2c2_pins: i2c2 { ++ pins = "PD23", "PD24"; ++ function = "i2c2"; ++ pull = <1>; ++ }; ++ + mmc0_pins: mmc0-pins { + pins = "PF0", "PF1", "PF2", "PF3", + "PF4", "PF5"; +@@ -309,6 +354,7 @@ + bias-pull-up; + }; + ++ /omit-if-no-ref/ + mmc2_pins: mmc2-pins { + pins = "PC1", "PC4", "PC5", "PC6", + "PC7", "PC8", "PC9", "PC10", +@@ -318,6 +364,16 @@ + bias-pull-up; + }; + ++ spi0_pins: spi0 { ++ pins = "PC2", "PC3", "PC0", "PC5"; ++ function = "spi0"; ++ }; ++ ++ spi1_pins: spi1 { ++ pins = "PH5", "PH6", "PH4", "PH3"; ++ function = "spi1"; ++ }; ++ + uart0_ph_pins: uart0-ph { + pins = "PH0", "PH1"; + function = "uart0"; +@@ -332,17 +388,65 @@ + pins = "PG8", "PG9"; + function = "uart1"; + }; ++ ++ uart2_pins: uart2-pins { ++ pins = "PD19", "PD20"; ++ function = "uart2"; ++ }; ++ ++ uart2_rts_cts_pins: uart2-rts-cts-pins { ++ pins = "PD21", "PD22"; ++ function = "uart2"; ++ }; ++ ++ uart3_pins: uart3-pins { ++ pins = "PD23", "PD24"; ++ function = "uart3"; ++ }; ++ ++ uart3_rts_cts_pins: uart3-rts-cts-pins { ++ pins = "PD25", "PD26"; ++ function = "uart3"; ++ }; + }; + +- gic: interrupt-controller@3021000 { +- compatible = "arm,gic-400"; +- reg = <0x03021000 0x1000>, +- <0x03022000 0x2000>, +- <0x03024000 0x2000>, +- <0x03026000 0x2000>; +- interrupts = ; +- interrupt-controller; +- #interrupt-cells = <3>; ++ i2c0: i2c@5002000 { ++ compatible = "allwinner,sun6i-a31-i2c"; ++ reg = <0x05002000 0x400>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_I2C0>; ++ resets = <&ccu RST_BUS_I2C0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0_pins>; ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ i2c1: i2c@5002400 { ++ compatible = "allwinner,sun6i-a31-i2c"; ++ reg = <0x05002400 0x400>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_I2C1>; ++ resets = <&ccu RST_BUS_I2C1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c1_pins>; ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ i2c2: i2c@5002800 { ++ compatible = "allwinner,sun6i-a31-i2c"; ++ reg = <0x05002800 0x400>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_I2C2>; ++ resets = <&ccu RST_BUS_I2C2>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c2_pins>; ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; + }; + + mmc0: mmc@4020000 { +@@ -391,6 +495,38 @@ + #size-cells = <0>; + }; + ++ spi0: spi@5010000 { ++ compatible = "allwinner,sun8i-h3-spi"; ++ reg = <0x05010000 0x1000>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; ++ clock-names = "ahb", "mod"; ++ dmas = <&dma 22>, <&dma 22>; ++ dma-names = "rx", "tx"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi0_pins>; ++ resets = <&ccu RST_BUS_SPI0>; ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ spi1: spi@5011000 { ++ compatible = "allwinner,sun8i-h3-spi"; ++ reg = <0x05011000 0x1000>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; ++ clock-names = "ahb", "mod"; ++ dmas = <&dma 23>, <&dma 23>; ++ dma-names = "rx", "tx"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi1_pins>; ++ resets = <&ccu RST_BUS_SPI1>; ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ + uart0: serial@5000000 { + compatible = "snps,dw-apb-uart"; + reg = <0x05000000 0x400>; +@@ -511,6 +647,32 @@ + status = "disabled"; + }; + ++ ehci3: usb@5311000 { ++ compatible = "allwinner,sun50i-h6-ehci", "generic-ehci"; ++ reg = <0x05311000 0x100>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_OHCI3>, ++ <&ccu CLK_BUS_EHCI3>, ++ <&ccu CLK_USB_OHCI3>; ++ resets = <&ccu RST_BUS_OHCI3>, ++ <&ccu RST_BUS_EHCI3>; ++ phys = <&usb2phy 3>; ++ phy-names = "usb"; ++ status = "disabled"; ++ }; ++ ++ ohci3: usb@5311400 { ++ compatible = "allwinner,sun50i-h6-ohci", "generic-ohci"; ++ reg = <0x05311400 0x100>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_OHCI3>, ++ <&ccu CLK_USB_OHCI3>; ++ resets = <&ccu RST_BUS_OHCI3>; ++ phys = <&usb2phy 3>; ++ phy-names = "usb"; ++ status = "disabled"; ++ }; ++ + dwc3: dwc3@5200000 { + compatible = "snps,dwc3"; + reg = <0x05200000 0x10000>; +@@ -543,32 +705,6 @@ + status = "disabled"; + }; + +- ehci3: usb@5311000 { +- compatible = "allwinner,sun50i-h6-ehci", "generic-ehci"; +- reg = <0x05311000 0x100>; +- interrupts = ; +- clocks = <&ccu CLK_BUS_OHCI3>, +- <&ccu CLK_BUS_EHCI3>, +- <&ccu CLK_USB_OHCI3>; +- resets = <&ccu RST_BUS_OHCI3>, +- <&ccu RST_BUS_EHCI3>; +- phys = <&usb2phy 3>; +- phy-names = "usb"; +- status = "disabled"; +- }; +- +- ohci3: usb@5311400 { +- compatible = "allwinner,sun50i-h6-ohci", "generic-ohci"; +- reg = <0x05311400 0x100>; +- interrupts = ; +- clocks = <&ccu CLK_BUS_OHCI3>, +- <&ccu CLK_USB_OHCI3>; +- resets = <&ccu RST_BUS_OHCI3>; +- phys = <&usb2phy 3>; +- phy-names = "usb"; +- status = "disabled"; +- }; +- + hdmi: hdmi@6000000 { + compatible = "allwinner,sun50i-h6-dw-hdmi"; + reg = <0x06000000 0x10000>; +@@ -768,6 +904,29 @@ + pins = "PL0", "PL1"; + function = "s_i2c"; + }; ++ ++ r_ir_rx_pins: r-ir-rx { ++ pins = "PL9"; ++ function = "s_cir_rx"; ++ }; ++ ++ r_uart_pins: r-uart { ++ pins = "PL2", "PL3"; ++ function = "s_uart"; ++ }; ++ }; ++ ++ r_uart: serial@7080000 { ++ compatible = "snps,dw-apb-uart"; ++ reg = <0x07080000 0x400>; ++ interrupts = ; ++ reg-shift = <2>; ++ reg-io-width = <4>; ++ clocks = <&r_ccu CLK_R_APB2_UART>; ++ resets = <&r_ccu RST_R_APB2_UART>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&r_uart_pins>; ++ status = "disabled"; + }; + + r_i2c: i2c@7081400 { +@@ -782,6 +941,16 @@ + #address-cells = <1>; + #size-cells = <0>; + }; ++ ++ ir: ir@7040000 { ++ compatible = "allwinner,sun5i-a13-ir"; ++ clocks = <&r_ccu CLK_R_APB1_IR>, <&r_ccu CLK_IR>; ++ clock-names = "apb", "ir"; ++ resets = <&r_ccu RST_R_APB1_IR>; ++ interrupts = ; ++ reg = <0x07040000 0x400>; ++ status = "disabled"; ++ }; + }; + + thermal-zones { diff --git a/patch/kernel/sunxi-dev/0012-general-h6-new-opp-table.patch b/patch/kernel/sunxi-dev/0012-general-h6-new-opp-table.patch new file mode 100644 index 0000000000..1b431dfc64 --- /dev/null +++ b/patch/kernel/sunxi-dev/0012-general-h6-new-opp-table.patch @@ -0,0 +1,69 @@ +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +index 141fd186b..5356ca6f6 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +@@ -73,55 +73,55 @@ + + opp@480000000 { + opp-hz = /bits/ 64 <480000000>; +- opp-microvolt = <880000 880000 880000>; ++ opp-microvolt = <800000 800000 880000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp@720000000 { + opp-hz = /bits/ 64 <720000000>; +- opp-microvolt = <880000 880000 880000>; ++ opp-microvolt = <800000 800000 880000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp@816000000 { + opp-hz = /bits/ 64 <816000000>; +- opp-microvolt = <880000 880000 880000>; ++ opp-microvolt = <800000 800000 880000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp@888000000 { + opp-hz = /bits/ 64 <888000000>; +- opp-microvolt = <880000 880000 880000>; ++ opp-microvolt = <800000 800000 900000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp@1080000000 { + opp-hz = /bits/ 64 <1080000000>; +- opp-microvolt = <940000 940000 940000>; ++ opp-microvolt = <840000 840000 900000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp@1320000000 { + opp-hz = /bits/ 64 <1320000000>; +- opp-microvolt = <1000000 1000000 1000000>; ++ opp-microvolt = <880000 880000 900000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp@1488000000 { + opp-hz = /bits/ 64 <1488000000>; +- opp-microvolt = <1060000 1060000 1060000>; ++ opp-microvolt = <900000 900000 910000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp@1640000000 { + opp-hz = /bits/ 64 <1640000000>; +- opp-microvolt = <1160000 1160000 1160000>; ++ opp-microvolt = <905000 900000 920000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp@1800000000 { + opp-hz = /bits/ 64 <1800000000>; +- opp-microvolt = <1160000 1160000 1160000>; ++ opp-microvolt = <925000 920000 940000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + }; diff --git a/patch/kernel/sunxi-dev/board-h6-clock-higher.patch b/patch/kernel/sunxi-dev/board-h6-clock-higher.patch deleted file mode 100644 index c0455e456d..0000000000 --- a/patch/kernel/sunxi-dev/board-h6-clock-higher.patch +++ /dev/null @@ -1,17 +0,0 @@ -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -index dc785da9c..adc0dfcc5 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -@@ -113,6 +113,12 @@ - clock-latency-ns = <244144>; /* 8 32k periods */ - }; - -+ opp@1640000000 { -+ opp-hz = /bits/ 64 <1640000000>; -+ opp-microvolt = <1160000>; -+ clock-latency-ns = <244144>; /* 8 32k periods */ -+ }; -+ - opp@1800000000 { - opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <1160000 1160000 1160000>; diff --git a/patch/kernel/sunxi-dev/board-h6-orangepi-lite2-fix-missing-all.patch b/patch/kernel/sunxi-dev/board-h6-orangepi-lite2-fix-missing-all.patch new file mode 100644 index 0000000000..18a3b1048b --- /dev/null +++ b/patch/kernel/sunxi-dev/board-h6-orangepi-lite2-fix-missing-all.patch @@ -0,0 +1,350 @@ +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts +index e098a2475..6c481b547 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts +@@ -3,9 +3,344 @@ + * Copyright (C) 2018 Jagan Teki + */ + +-#include "sun50i-h6-orangepi.dtsi" ++/dts-v1/; ++ ++#include "sun50i-h6.dtsi" ++ ++#include + + / { + model = "OrangePi Lite2"; + compatible = "xunlong,orangepi-lite2", "allwinner,sun50i-h6"; ++ ++ aliases { ++ serial0 = &uart0; /* debug */ ++ serial1 = &uart1; /* BT-UART */ ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ connector { ++ compatible = "hdmi-connector"; ++ type = "a"; ++ ddc-supply = <®_ddc>; ++ ++ port { ++ hdmi_con_in: endpoint { ++ remote-endpoint = <&hdmi_out_con>; ++ }; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ power { ++ label = "orangepi:red:power"; ++ gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */ ++ default-state = "on"; ++ }; ++ ++ status { ++ label = "orangepi:green:status"; ++ gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */ ++ }; ++ }; ++ ++ reg_ddc: ddc-io { ++ compatible = "regulator-fixed"; ++ regulator-name = "ddc-io"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ enable-active-high; ++ gpio = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */ ++ }; ++ ++ reg_vcc5v: vcc5v { ++ /* board wide 5V supply directly from the DC jack */ ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc-5v"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ }; ++ ++ reg_usb_vbus: vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "usb-vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ startup-delay-us = <100000>; ++ gpio = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 USB0-DRVVBUS */ ++ enable-active-high; ++ }; ++ ++ wifi_pwrseq: wifi_pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ clocks = <&rtc 1>; ++ clock-names = "ext_clock"; ++ reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */ ++ post-power-on-delay-ms = <200>; ++ }; ++}; ++ ++&cpu0 { ++ cpu-supply = <®_dcdca>; ++}; ++ ++&de { ++ status = "okay"; ++}; ++ ++&hdmi { ++ status = "okay"; ++}; ++ ++&hdmi_out { ++ hdmi_out_con: endpoint { ++ remote-endpoint = <&hdmi_con_in>; ++ }; ++}; ++ ++&mmc0 { ++ vmmc-supply = <®_cldo1>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ ++ bus-width = <4>; ++ status = "okay"; ++}; ++ ++&mmc1 { ++ vmmc-supply = <®_cldo2>; ++ vqmmc-supply = <®_bldo3>; ++ mmc-pwrseq = <&wifi_pwrseq>; ++ bus-width = <4>; ++ non-removable; ++ status = "okay"; ++ ++ brcm: sdio-wifi@1 { ++ reg = <1>; ++ compatible = "brcm,bcm4329-fmac"; ++ interrupt-parent = <&r_pio>; ++ interrupts = <1 0 IRQ_TYPE_LEVEL_LOW>; /* PM0 */ ++ interrupt-names = "host-wake"; ++ }; ++}; ++ ++&pio { ++ vcc-pc-supply = <®_bldo2>; ++ vcc-pd-supply = <®_cldo1>; ++ vcc-pg-supply = <®_bldo3>; ++}; ++ ++&r_i2c { ++ status = "okay"; ++ ++ axp805: pmic@36 { ++ compatible = "x-powers,axp805", "x-powers,axp806"; ++ reg = <0x36>; ++ interrupt-parent = <&r_intc>; ++ interrupts = <0 IRQ_TYPE_LEVEL_LOW>; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ x-powers,self-working-mode; ++ vina-supply = <®_vcc5v>; ++ vinb-supply = <®_vcc5v>; ++ vinc-supply = <®_vcc5v>; ++ vind-supply = <®_vcc5v>; ++ vine-supply = <®_vcc5v>; ++ aldoin-supply = <®_vcc5v>; ++ bldoin-supply = <®_vcc5v>; ++ cldoin-supply = <®_vcc5v>; ++ ++ regulators { ++ reg_aldo1: aldo1 { ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-pl-led-ir"; ++ }; ++ ++ reg_aldo2: aldo2 { ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc33-audio-tv-ephy-mac"; ++ }; ++ ++ /* ALDO3 is shorted to CLDO1 */ ++ reg_aldo3: aldo3 { ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-1"; ++ }; ++ ++ reg_bldo1: bldo1 { ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc18-dram-bias-pll"; ++ }; ++ ++ reg_bldo2: bldo2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc-efuse-pcie-hdmi-pc"; ++ }; ++ ++ reg_bldo3: bldo3 { ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc-dcxoio"; ++ }; ++ ++ bldo4 { ++ /* unused */ ++ }; ++ ++ reg_cldo1: cldo1 { ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-2"; ++ }; ++ ++ reg_cldo2: cldo2 { ++ /* ++ * This regulator is connected with CLDO3. ++ * Before the kernel can support synchronized ++ * enable of coupled regulators, keep them ++ * both always on as a ugly hack. ++ */ ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-wifi-1"; ++ }; ++ ++ reg_cldo3: cldo3 { ++ /* ++ * This regulator is connected with CLDO2. ++ * See the comments for CLDO2. ++ */ ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-wifi-2"; ++ }; ++ ++ reg_dcdca: dcdca { ++ regulator-always-on; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1160000>; ++ regulator-name = "vdd-cpu"; ++ }; ++ ++ reg_dcdcc: dcdcc { ++ regulator-min-microvolt = <810000>; ++ regulator-max-microvolt = <1080000>; ++ regulator-name = "vdd-gpu"; ++ }; ++ ++ reg_dcdcd: dcdcd { ++ regulator-always-on; ++ regulator-min-microvolt = <960000>; ++ regulator-max-microvolt = <960000>; ++ regulator-name = "vdd-sys"; ++ }; ++ ++ reg_dcdce: dcdce { ++ regulator-always-on; ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-name = "vcc-dram"; ++ }; ++ ++ sw { ++ /* unused */ ++ }; ++ }; ++ }; ++}; ++ ++&spi0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi0_pins>; ++ status = "disabled"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_ph_pins>; ++ status = "okay"; ++}; ++ ++/* There's the BT part of the AP6255 connected to that UART */ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; ++ uart-has-rtscts; ++ status = "okay"; ++ ++ bluetooth { ++ compatible = "brcm,bcm4345c5"; ++ clocks = <&rtc 1>; ++ clock-names = "lpo"; ++ device-wakeup-gpios = <&r_pio 1 2 GPIO_ACTIVE_HIGH>; /* PM2 */ ++ host-wakeup-gpios = <&r_pio 1 1 GPIO_ACTIVE_HIGH>; /* PM1 */ ++ shutdown-gpios = <&r_pio 1 4 GPIO_ACTIVE_HIGH>; /* PM4 */ ++ max-speed = <1500000>; ++ }; ++}; ++ ++&uart3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart3_pins>, <&uart3_rts_cts_pins>; ++ uart-has-rtscts; ++ status = "disabled"; ++}; ++ ++&usb2otg { ++ /* ++ * This board doesn't have a controllable VBUS even though it ++ * does have an ID pin. Using it as anything but a USB host is ++ * unsafe. ++ */ ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&usb2phy { ++ usb0_id_det-gpios = <&pio 2 6 GPIO_ACTIVE_HIGH>; /* PC6 */ ++ usb0_vbus-supply = <®_vcc5v>; ++ usb3_vbus-supply = <®_vcc5v>; ++ status = "okay"; ++}; ++ ++&ehci0 { ++ status = "okay"; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&ehci3 { ++ status = "okay"; ++}; ++ ++&ohci3 { ++ status = "okay"; ++}; ++ ++&usb3phy { ++ phy-supply = <®_usb_vbus>; ++ status = "okay"; ++}; ++ ++&dwc3 { ++ status = "okay"; + }; diff --git a/patch/kernel/sunxi-dev/board-h6-orangepi-lite2-fix-missing-wifi.patch b/patch/kernel/sunxi-dev/board-h6-orangepi-lite2-fix-missing-wifi.patch deleted file mode 100644 index 6d2b69a033..0000000000 --- a/patch/kernel/sunxi-dev/board-h6-orangepi-lite2-fix-missing-wifi.patch +++ /dev/null @@ -1,34 +0,0 @@ -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts -index e098a24..669b242 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts -@@ -8,4 +8,29 @@ - / { - model = "OrangePi Lite2"; - compatible = "xunlong,orangepi-lite2", "allwinner,sun50i-h6"; -+ -+ wifi_pwrseq: wifi_pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ clocks = <&rtc 1>; -+ clock-names = "ext_clock"; -+ reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */ -+ post-power-on-delay-ms = <200>; -+ }; -+}; -+ -+&mmc1 { -+ vmmc-supply = <®_cldo2>; -+ vqmmc-supply = <®_bldo3>; -+ mmc-pwrseq = <&wifi_pwrseq>; -+ bus-width = <4>; -+ non-removable; -+ status = "okay"; -+ -+ ap6255: sdio_wifi@1 { -+ reg = <1>; -+ compatible = "brcm,bcm4329-fmac"; -+ interrupt-parent = <&r_pio>; -+ interrupts = <1 0 IRQ_TYPE_LEVEL_LOW>; /* PM0 */ -+ interrupt-names = "host-wake"; -+ }; - }; diff --git a/patch/kernel/sunxi-dev/board-opilite2-fix-missing-regulator-always-on.patch b/patch/kernel/sunxi-dev/board-opilite2-fix-missing-regulator-always-on.patch deleted file mode 100644 index 1369ab7c5b..0000000000 --- a/patch/kernel/sunxi-dev/board-opilite2-fix-missing-regulator-always-on.patch +++ /dev/null @@ -1,19 +0,0 @@ -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi -index b2526da..3297bf8 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi -@@ -146,12 +150,14 @@ - }; - - reg_cldo2: cldo2 { -+ regulator-always-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-wifi-1"; - }; - - reg_cldo3: cldo3 { -+ regulator-always-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc-wifi-2"; diff --git a/patch/kernel/sunxi-dev/force-mmc0-bus-width-H6.patch b/patch/kernel/sunxi-dev/force-mmc0-bus-width-H6.patch deleted file mode 100644 index 804ce6e4fb..0000000000 --- a/patch/kernel/sunxi-dev/force-mmc0-bus-width-H6.patch +++ /dev/null @@ -1,12 +0,0 @@ -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -index c4dae09..10a0e41 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -@@ -350,6 +448,7 @@ - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; -+ bus-width = <0x4>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; diff --git a/patch/kernel/sunxi-dev/general-add-H6-DMA.patch b/patch/kernel/sunxi-dev/general-add-H6-DMA.patch deleted file mode 100644 index c2010ae240..0000000000 --- a/patch/kernel/sunxi-dev/general-add-H6-DMA.patch +++ /dev/null @@ -1,20 +0,0 @@ -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -index c496a82..07301c2 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -@@ -181,6 +181,15 @@ - #reset-cells = <1>; - }; - -+ dma: dma-controller@3002000 { -+ compatible = "allwinner,sun8i-h3-dma"; -+ reg = <0x03002000 0x1000>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_DMA>; -+ resets = <&ccu RST_BUS_DMA>; -+ #dma-cells = <1>; -+ }; -+ - gic: interrupt-controller@3021000 { - compatible = "arm,gic-400"; - reg = <0x03021000 0x1000>, diff --git a/patch/kernel/sunxi-dev/general-add-H6-I2Cs.patch b/patch/kernel/sunxi-dev/general-add-H6-I2Cs.patch deleted file mode 100644 index dba504df5f..0000000000 --- a/patch/kernel/sunxi-dev/general-add-H6-I2Cs.patch +++ /dev/null @@ -1,75 +0,0 @@ -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -index bec8c4a..25d3be2 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -@@ -245,6 +258,24 @@ - drive-strength = <40>; - }; - -+ i2c0_pins: i2c0 { -+ pins = "PD25", "PD26"; -+ function = "i2c0"; -+ pull = <1>; -+ }; -+ -+ i2c1_pins: i2c1 { -+ pins = "PH5", "PH6"; -+ function = "i2c1"; -+ pull = <1>; -+ }; -+ -+ i2c2_pins: i2c2 { -+ pins = "PD23", "PD24"; -+ function = "i2c2"; -+ pull = <1>; -+ }; -+ - mmc0_pins: mmc0-pins { - pins = "PF0", "PF1", "PF2", "PF3", - "PF4", "PF5"; -@@ -268,6 +294,45 @@ - }; - }; - -+ i2c0: i2c@5002000 { -+ compatible = "allwinner,sun6i-a31-i2c"; -+ reg = <0x05002000 0x400>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_I2C0>; -+ resets = <&ccu RST_BUS_I2C0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c0_pins>; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ i2c1: i2c@5002400 { -+ compatible = "allwinner,sun6i-a31-i2c"; -+ reg = <0x05002400 0x400>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_I2C1>; -+ resets = <&ccu RST_BUS_I2C1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ i2c2: i2c@5002800 { -+ compatible = "allwinner,sun6i-a31-i2c"; -+ reg = <0x05002800 0x400>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_I2C2>; -+ resets = <&ccu RST_BUS_I2C2>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c2_pins>; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ - mmc0: mmc@4020000 { - compatible = "allwinner,sun50i-h6-mmc", - "allwinner,sun50i-a64-mmc"; diff --git a/patch/kernel/sunxi-dev/general-add-H6-IR-RX.patch b/patch/kernel/sunxi-dev/general-add-H6-IR-RX.patch deleted file mode 100644 index f68e31e881..0000000000 --- a/patch/kernel/sunxi-dev/general-add-H6-IR-RX.patch +++ /dev/null @@ -1,33 +0,0 @@ -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -index dc785da..2fb6fe9 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -@@ -768,6 +768,11 @@ - pins = "PL0", "PL1"; - function = "s_i2c"; - }; -+ -+ r_ir_rx_pins: r-ir-rx { -+ pins = "PL9"; -+ function = "s_cir_rx"; -+ }; - }; - - r_i2c: i2c@7081400 { -@@ -794,6 +794,16 @@ - resets = <&r_ccu RST_R_APB2_UART>; - status = "disabled"; - }; -+ -+ ir: ir@7040000 { -+ compatible = "allwinner,sun5i-a13-ir"; -+ clocks = <&r_ccu CLK_R_APB1_IR>, <&r_ccu CLK_IR>; -+ clock-names = "apb", "ir"; -+ resets = <&r_ccu RST_R_APB1_IR>; -+ interrupts = ; -+ reg = <0x07040000 0x400>; -+ status = "disabled"; -+ }; - }; - - thermal-zones { diff --git a/patch/kernel/sunxi-dev/general-add-H6-SPIs.patch b/patch/kernel/sunxi-dev/general-add-H6-SPIs.patch deleted file mode 100644 index 673233ee75..0000000000 --- a/patch/kernel/sunxi-dev/general-add-H6-SPIs.patch +++ /dev/null @@ -1,60 +0,0 @@ -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -index 9496030..0296eb8 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -@@ -268,6 +268,16 @@ - bias-pull-up; - }; - -+ spi0_pins: spi0 { -+ pins = "PC2", "PC3", "PC0", "PC5"; -+ function = "spi0"; -+ }; -+ -+ spi1_pins: spi1 { -+ pins = "PH5", "PH6", "PH4", "PH3"; -+ function = "spi1"; -+ }; -+ - uart0_ph_pins: uart0-ph { - pins = "PH0", "PH1"; - function = "uart0"; -@@ -370,6 +375,38 @@ - #size-cells = <0>; - }; - -+ spi0: spi@5010000 { -+ compatible = "allwinner,sun8i-h3-spi"; -+ reg = <0x05010000 0x1000>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; -+ clock-names = "ahb", "mod"; -+ dmas = <&dma 22>, <&dma 22>; -+ dma-names = "rx", "tx"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins>; -+ resets = <&ccu RST_BUS_SPI0>; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ spi1: spi@5011000 { -+ compatible = "allwinner,sun8i-h3-spi"; -+ reg = <0x05011000 0x1000>; -+ interrupts = ; -+ clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; -+ clock-names = "ahb", "mod"; -+ dmas = <&dma 23>, <&dma 23>; -+ dma-names = "rx", "tx"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi1_pins>; -+ resets = <&ccu RST_BUS_SPI1>; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ - uart0: serial@5000000 { - compatible = "snps,dw-apb-uart"; - reg = <0x05000000 0x400>; diff --git a/patch/kernel/sunxi-dev/general-add-H6-UARTs.patch b/patch/kernel/sunxi-dev/general-add-H6-UARTs.patch deleted file mode 100644 index 2e8a492296..0000000000 --- a/patch/kernel/sunxi-dev/general-add-H6-UARTs.patch +++ /dev/null @@ -1,93 +0,0 @@ -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -index c72da8c..41a057e 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi -@@ -128,6 +128,16 @@ - pins = "PH0", "PH1"; - function = "uart0"; - }; -+ -+ uart2_pins: uart2 { -+ pins = "PD19", "PD20"; -+ function = "uart2"; -+ }; -+ -+ uart3_pins: uart3 { -+ pins = "PD23", "PD24", "PD25", "PD26"; -+ function = "uart3"; -+ }; - }; - - uart0: serial@5000000 { -@@ -768,6 +768,11 @@ - pins = "PL9"; - function = "s_cir_rx"; - }; -+ -+ r_uart_pins: r-uart { -+ pins = "PL2", "PL3"; -+ function = "s_uart"; -+ }; - }; - - r_i2c: i2c@7081400 { -@@ -782,6 +912,17 @@ - #address-cells = <1>; - #size-cells = <0>; - }; -+ -+ r_uart: serial@7080000 { -+ compatible = "snps,dw-apb-uart"; -+ reg = <0x07080000 0x400>; -+ interrupts = ; -+ reg-shift = <2>; -+ reg-io-width = <4>; -+ clocks = <&r_ccu CLK_R_APB2_UART>; -+ resets = <&r_ccu RST_R_APB2_UART>; -+ status = "disabled"; -+ }; - }; - - thermal-zones { -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi -index b2526da..f31e14d 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi -@@ -197,6 +201,18 @@ - status = "okay"; - }; - -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart2_pins>; -+ status = "disabled"; -+}; -+ -+&uart3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart3_pins>; -+ status = "disabled"; -+}; -+ - &usb2otg { - dr_mode = "otg"; - status = "okay"; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts -index afee79f..c66f4dd 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts -@@ -323,8 +348,14 @@ - }; - }; - -+&r_uart { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&r_uart_pins>; -+ status = "disabled"; -+}; -+ - /delete-node/ &spi0; - - &uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_ph_pins>;