From 5a70a8a42bbba3452f70dbd0c0e2ecb5d79a2170 Mon Sep 17 00:00:00 2001 From: ColorfulRhino <131405023+ColorfulRhino@users.noreply.github.com> Date: Mon, 8 Apr 2024 18:53:41 +0200 Subject: [PATCH] board: cm3588-nas: Add detailed GPIO labels Reference was the official CM3588 NAS schematic revision 2309. Some GPIOs like USB, sdmmc or SPI-NOR are not listed. --- .../dt/rk3588-nanopc-cm3588-nas.dts | 134 ++++++++++-------- 1 file changed, 78 insertions(+), 56 deletions(-) diff --git a/patch/kernel/rockchip-rk3588-edge/dt/rk3588-nanopc-cm3588-nas.dts b/patch/kernel/rockchip-rk3588-edge/dt/rk3588-nanopc-cm3588-nas.dts index 47ad1e5aa2..99f3d84698 100644 --- a/patch/kernel/rockchip-rk3588-edge/dt/rk3588-nanopc-cm3588-nas.dts +++ b/patch/kernel/rockchip-rk3588-edge/dt/rk3588-nanopc-cm3588-nas.dts @@ -303,65 +303,87 @@ // "", "", "", ""; // }; -// &gpio1 { -// gpio-line-names = /* GPIO1 A0-A7 */ -// "HEADER_27", "HEADER_28", "", "", -// "", "", "", "HEADER_15", -// /* GPIO1 B0-B7 */ -// "HEADER_26", "HEADER_21", "HEADER_19", "HEADER_23", -// "HEADER_24", "HEADER_22", "", "", -// /* GPIO1 C0-C7 */ -// "", "", "", "", -// "", "", "", "", -// /* GPIO1 D0-D7 */ -// "", "", "", "", -// "", "", "HEADER_05", "HEADER_03"; -// }; +/* Signal labels [SIGNAL_LABEL] are from the official CM3588 NAS schematic revision 2309 */ +/* Some GPIOs like USB, sdmmc or SPI-NOR are not listed here */ +&gpio0 { + gpio-line-names = + /* GPIO0 A0-A7 */ + "", "", "", "", + "", "", "", "", + /* GPIO0 B0-B7 */ + "", "", "", "", + "", "", "", "", + /* GPIO0 C0-C7 */ + "", "", "", "", + "Pin 10 [UART0_RX_M0]", "Pin 08 [UART0_TX_M0/PWM4_M0]", "Pin 32 [PWM5_M1]", "", + /* GPIO0 D0-D7 */ + "", "", "", "", + "IR sensor [PWM3_IR_M0]", "User Button", "", ""; +}; -// &gpio2 { -// gpio-line-names = /* GPIO2 A0-A7 */ -// "", "", "", "", -// "", "", "", "", -// /* GPIO2 B0-B7 */ -// "", "", "", "", -// "", "", "", "", -// /* GPIO2 C0-C7 */ -// "", "CSI1_11", "CSI1_12", "", -// "", "", "", "", -// /* GPIO2 D0-D7 */ -// "", "", "", "", -// "", "", "", ""; -// }; +&gpio1 { + gpio-line-names = + /* GPIO1 A0-A7 */ + "Pin 27 [UART6_RX_M1]", "Pin 28 [UART6_TX_M1]", "", "", + "", "", "", "Pin 15", + /* GPIO1 B0-B7 */ + "Pin 26", "Pin 21 [SPI0_MISO_M2]", "Pin 19 [SPI0_MOSI_M2/UART4_RX_M2]", "Pin 23 [SPI0_CLK_M2/UART4_TX_M2]", + "Pin 24 [SPI0_CS0_M2/UART7_RX_M2]", "Pin 22 [SPI0_CS1_M0/UART7_TX_M2]", "", "CSI-Pin 14 [MIPI_CAM2_CLKOUT]", + /* GPIO1 C0-C7 */ + "", "", "", "", + "Headphone detect [HP_DET_L]", "", "", "", + /* GPIO1 D0-D7 */ + "", "", "", "Fan [PWM1_M1]", + "", "", "Pin 05 [I2C8_SCL_M2]", "Pin 03 [I2C8_SDA_M2]"; +}; -// &gpio3 { -// gpio-line-names = /* GPIO3 A0-A7 */ -// "HEADER_35", "HEADER_38", "HEADER_40", "HEADER_36", -// "HEADER_37", "", "DSI0_12", "", -// /* GPIO3 B0-B7 */ -// "HEADER_33", "DSI0_10", "HEADER_07", "HEADER_16", -// "HEADER_18", "HEADER_29", "HEADER_31", "HEADER_12", -// /* GPIO3 C0-C7 */ -// "DSI0_08", "DSI0_14", "HEADER_11", "HEADER_13", -// "", "", "", "", -// /* GPIO3 D0-D7 */ -// "", "", "", "", -// "", "DSI1_10", "", ""; -// }; +&gpio2 { + gpio-line-names = + /* GPIO2 A0-A7 */ + "", "", "", "", + "", "", "", "", + /* GPIO2 B0-B7 */ + "", "", "", "", + "", "", "", "", + /* GPIO2 C0-C7 */ + "", "CSI-Pin 11 [MIPI_CAM2_RESET_L]", "CSI-Pin 12 [MIPI_CAM2_PDN_L]", "", + "", "", "", "", + /* GPIO2 D0-D7 */ + "", "", "", "", + "", "", "", ""; +}; -// &gpio4 { -// gpio-line-names = /* GPIO4 A0-A7 */ -// "DSI1_08", "DSI1_14", "", "DSI1_12", -// "", "", "", "", -// /* GPIO4 B0-B7 */ -// "", "", "", "", -// "", "", "", "", -// /* GPIO4 C0-C7 */ -// "", "", "", "", -// "CSI0_11", "CSI0_12", "", "", -// /* GPIO4 D0-D7 */ -// "", "", "", "", -// "", "", "", ""; -// }; +&gpio3 { + gpio-line-names = + /* GPIO3 A0-A7 */ + "Pin 35 [SPI4_MISO_M1/PW M10_M0]", "Pin 38 [SPI4_MOSI_M1]", "Pin 40 [SPI4_CLK_M1/UART8_TX_M1]", "Pin 36 [SPI4_CS0_M1/UART8_RX_M1]", + "Pin 37 [SPI4_CS1_M1]", "", "DSI-Pin 12 [LCD_RST]", "Buzzer [PW M8_M0]", + /* GPIO3 B0-B7 */ + "Pin 33 [PW M9_M0]", "DSI-Pin 10 [PW M2_M1/LCD_BL]", "Pin 07", "Pin 16", + "Pin 18", "Pin 29 [UART3_TX_M1/PW M12_M0]", "Pin 31 [UART3_RX_M1/PW M13_M0]", "Pin 12", + /* GPIO3 C0-C7 */ + "DSI-Pin 08 [TP_INT_L]", "DSI-Pin 14 [TP_RST_L]", "Pin 11 [PWM14_M0]", "Pin 13 [PWM15_IR_M0]", + "", "", "", "DSI-Pin 06 [I2C5_SCL_M0_TP]", + /* GPIO3 D0-D7 */ + "DSI-Pin 05 [I2C5_SDA_M0_TP]", "", "", "", + "", "", "", ""; +}; + +&gpio4 { + gpio-line-names = + /* GPIO4 A0-A7 */ + "", "", "", "", + "", "", "", "", + /* GPIO4 B0-B7 */ + "", "", "", "", + "", "", "", "", + /* GPIO4 C0-C7 */ + "", "", "", "", + "", "", "", "", + /* GPIO4 D0-D7 */ + "", "", "", "", + "", "", "", ""; +}; &gpu { mali-supply = <&vdd_gpu_s0>;