diff --git a/config/boards/mekotronics-r58-4x4.csc b/config/boards/mekotronics-r58-4x4.conf similarity index 100% rename from config/boards/mekotronics-r58-4x4.csc rename to config/boards/mekotronics-r58-4x4.conf diff --git a/patch/kernel/rk35xx-vendor-6.1/rk3588-1100-r58-4x4-dts.patch b/patch/kernel/rk35xx-vendor-6.1/rk3588-1100-r58-4x4-dts.patch deleted file mode 100644 index 1e3c04aaae..0000000000 --- a/patch/kernel/rk35xx-vendor-6.1/rk3588-1100-r58-4x4-dts.patch +++ /dev/null @@ -1,2708 +0,0 @@ -From f74f4740e8fe549bba8a7084737640f11e7a16cd Mon Sep 17 00:00:00 2001 -From: balbes150 -Date: Mon, 21 Jul 2025 11:51:40 +0300 -Subject: [PATCH] 1 - -Signed-off-by: balbes150 ---- - arch/arm64/boot/dts/rockchip/Makefile | 1 + - .../rk3588-blueberry-r58-4X4-LT6911UXE-1.dtsi | 204 ++++ - .../rk3588-blueberry-r58-4X4-LT6911UXE-2.dtsi | 211 ++++ - .../rk3588-blueberry-r58-4X4-LT6911UXE-3.dtsi | 205 ++++ - ...k3588-blueberry-r58-4X4-linux-7_10inch.dts | 148 +++ - ...k3588-blueberry-r58-4X4-lvds-1280x800.dtsi | 155 +++ - ...8-blueberry-r58-4X4-mipi-CW070HDMP40P.dtsi | 349 ++++++ - .../rockchip/rk3588-blueberry-r58-4X4.dtsi | 1013 +++++++++++++++++ - 8 files changed, 2286 insertions(+) - create mode 100755 arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4-LT6911UXE-1.dtsi - create mode 100755 arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4-LT6911UXE-2.dtsi - create mode 100755 arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4-LT6911UXE-3.dtsi - create mode 100755 arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4-linux-7_10inch.dts - create mode 100755 arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4-lvds-1280x800.dtsi - create mode 100755 arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4-mipi-CW070HDMP40P.dtsi - create mode 100755 arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4.dtsi - -diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile -index a4bb53484..818c5856a 100644 ---- a/arch/arm64/boot/dts/rockchip/Makefile -+++ b/arch/arm64/boot/dts/rockchip/Makefile -@@ -400,6 +400,7 @@ - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-radxa-rock-5b+.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5-itx.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5t.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-r58-4x4.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-som3588-cat.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-smart-am60.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-turing-rk1.dtb -diff --git a/arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4-LT6911UXE-1.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4-LT6911UXE-1.dtsi -new file mode 100755 -index 000000000..34ff2b547 ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4-LT6911UXE-1.dtsi -@@ -0,0 +1,204 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd. -+ * -+ */ -+ -+#include "dt-bindings/usb/pd.h" -+ -+ -+#if 1 -+/* lt6911 01 hdmi in */ -+/ { -+ lt6911_1_dc: lt6911-1-dc { -+ compatible = "rockchip,dummy-codec"; -+ #sound-dai-cells = <0>; -+ }; -+ -+ lt6911_01-sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,format = "i2s"; -+ simple-audio-card,name = "rockchip,lt6911-01"; -+ simple-audio-card,bitclock-master = <&dailink1_master>; -+ simple-audio-card,frame-master = <&dailink1_master>; -+ status = "okay"; -+ simple-audio-card,cpu { -+ sound-dai = <&i2s2_2ch>; -+ }; -+ dailink1_master: simple-audio-card,codec { -+ sound-dai = <<6911_1_dc>; -+ }; -+ }; -+}; -+ -+ -+&i2s2_2ch { -+ status = "okay"; -+ pinctrl-0 = <&i2s2m1_sdi>; -+ rockchip,clk-trcm = <1>; -+}; -+ -+&mipi1_csi2 { -+ status = "okay"; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mipi1_csi2_input: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&csidphy1_out>; -+ }; -+ }; -+ -+ port@1 { -+ reg = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mipi1_csi2_output: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&cif_mipi1_in0>; -+ }; -+ }; -+ }; -+}; -+ -+&csi2_dcphy1 { -+ status = "okay"; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ port@0 { -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mipi_1_in_lt6911: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <<6911_1_out>; -+ data-lanes = <1 2 3 4>; -+ }; -+ }; -+ port@1 { -+ reg = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ csidphy1_out: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&mipi1_csi2_input>; -+ }; -+ }; -+ }; -+}; -+ -+&mipi_dcphy1 { -+ status = "okay"; -+}; -+ -+&i2c4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c4m0_xfer>; -+ status = "okay"; -+ -+ lt6911_1:lt6911_1@2b { -+ compatible = "lontium,lt6911uxe"; -+ status = "okay"; -+ reg = <0x2b>; -+ clocks = <&ext_cam_clk>; -+ clock-names = "xvclk"; -+ power-domains = <&power RK3588_PD_VI>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <<6911uxc_1_pin>; -+ interrupt-parent = <&gpio4>; -+ interrupts = ; -+ //power-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>; -+ reset-gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>; -+ plugin-det-gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>; -+ rockchip,camera-module-index = <0>; -+ rockchip,camera-module-facing = "back"; -+ rockchip,camera-module-name = "HDMI-MIPI2"; -+ rockchip,camera-module-lens-name = "LT6911UXE"; -+ port { -+ lt6911_1_out: endpoint { -+ remote-endpoint = <&mipi_1_in_lt6911>; -+ data-lanes = <1 2 3 4>; -+ }; -+ }; -+ }; -+}; -+ -+ -+&rkcif_mipi_lvds1 { -+ status = "okay"; -+ -+ port { -+ cif_mipi1_in0: endpoint { -+ remote-endpoint = <&mipi1_csi2_output>; -+ }; -+ }; -+}; -+ -+&rkcif_mipi_lvds1_sditf { -+ status = "okay"; -+ -+ port { -+ mipi_lvds1_sditf: endpoint { -+ remote-endpoint = <&isp0_vir1>; -+ }; -+ }; -+}; -+ -+&rkisp0_vir1 { -+ status = "okay"; -+ -+ port { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ isp0_vir1: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&mipi_lvds1_sditf>; -+ }; -+ }; -+}; -+ -+/* lt6911 01 hdmi in end*/ -+#endif -+ -+&rkcif { -+ status = "okay"; -+}; -+ -+&rkcif_mmu { -+ status = "okay"; -+}; -+ -+&rkisp0 { -+ status = "okay"; -+}; -+ -+&isp0_mmu { -+ status = "okay"; -+}; -+ -+ -+&pinctrl { -+ -+ hdmiin { -+ lt6911uxc_1_pin: lt6911uxc-1-pin { -+ rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,// HDMIRX_DET_LT6911 -+ <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, // LT6911UXC_INT -+ <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; // LT6911_RST -+ }; -+ -+ -+ }; -+}; -\ No newline at end of file -diff --git a/arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4-LT6911UXE-2.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4-LT6911UXE-2.dtsi -new file mode 100755 -index 000000000..b418a7bd2 ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4-LT6911UXE-2.dtsi -@@ -0,0 +1,211 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd. -+ * -+ */ -+ -+#include "dt-bindings/usb/pd.h" -+ -+ -+ -+#if 1 -+/* lt6911 02 hdmi in */ -+/ { -+#if 1 -+ lt6911_2_dc: lt6911-2-dc { -+ compatible = "rockchip,dummy-codec"; -+ status = "okay"; -+ #sound-dai-cells = <0>; -+ }; -+ -+ lt6911_02-sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,format = "i2s"; -+ simple-audio-card,name = "rockchip,lt6911-02"; -+ simple-audio-card,bitclock-master = <&dailink2_master>; -+ simple-audio-card,frame-master = <&dailink2_master>; -+ status = "okay"; -+ simple-audio-card,cpu { -+ sound-dai = <&i2s3_2ch>; -+ }; -+ dailink2_master: simple-audio-card,codec { -+ sound-dai = <<6911_2_dc>; -+ }; -+ }; -+#endif -+ -+}; -+ -+&i2s3_2ch { -+ status = "okay"; -+ pinctrl-0 = <&i2s3_sdi>; -+ rockchip,clk-trcm = <1>; -+}; -+ -+&mipi0_csi2 { -+ status = "okay"; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mipi0_csi2_input: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&csi_dphy0_out>; -+ }; -+ }; -+ -+ port@1 { -+ reg = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mipi0_csi2_output: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&cif_mipi0_in0>; -+ }; -+ }; -+ }; -+}; -+ -+&csi2_dcphy0 { -+ status = "okay"; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ port@0 { -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mipi_2_in_lt6911: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <<6911_2_out>; -+ data-lanes = <1 2 3 4>; -+ }; -+ }; -+ port@1 { -+ reg = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ csi_dphy0_out: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&mipi0_csi2_input>; -+ }; -+ }; -+ }; -+}; -+ -+&mipi_dcphy0 { -+ status = "okay"; -+}; -+ -+&i2c7 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c7m2_xfer>; -+ status = "okay"; -+ -+ lt6911_2:lt6911_2@2b { -+ compatible = "lontium,lt6911uxe"; -+ status = "okay"; -+ reg = <0x2b>; -+ clocks = <&ext_cam_clk>; -+ clock-names = "xvclk"; -+ power-domains = <&power RK3588_PD_VI>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <<6911uxc_2_pin>; -+ interrupt-parent = <&gpio3>; -+ interrupts = ; -+ //power-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>; -+ reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>; -+ plugin-det-gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>; -+ rockchip,camera-module-index = <1>; -+ rockchip,camera-module-facing = "back"; -+ rockchip,camera-module-name = "HDMI-MIPI2"; -+ rockchip,camera-module-lens-name = "LT6911UXE1"; -+ port { -+ lt6911_2_out: endpoint { -+ remote-endpoint = <&mipi_2_in_lt6911>; -+ data-lanes = <1 2 3 4>; -+ }; -+ }; -+ }; -+}; -+ -+ -+&rkcif_mipi_lvds { -+ status = "okay"; -+ -+ port { -+ cif_mipi0_in0: endpoint { -+ remote-endpoint = <&mipi0_csi2_output>; -+ }; -+ }; -+}; -+ -+&rkcif_mipi_lvds_sditf { -+ status = "okay"; -+ -+ port { -+ mipi_lvds_sditf: endpoint { -+ remote-endpoint = <&isp0_vir0>; -+ }; -+ }; -+}; -+ -+&rkisp0_vir0 { -+ status = "okay"; -+ -+ port { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ isp0_vir0: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&mipi_lvds_sditf>; -+ }; -+ }; -+}; -+ -+/* lt6911 02 hdmi in end*/ -+#endif -+ -+ -+ -+&rkcif { -+ status = "okay"; -+}; -+ -+&rkcif_mmu { -+ status = "okay"; -+}; -+ -+&rkisp0 { -+ status = "okay"; -+}; -+ -+&isp0_mmu { -+ status = "okay"; -+}; -+ -+ -+&pinctrl { -+ -+ hdmiin { -+ -+ lt6911uxc_2_pin: lt6911uxc-2-pin { -+ rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>,// HDMIRX_DET_LT6911 -+ <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>, // LT6911UXC_INT -+ <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; // LT6911_RST -+ }; -+ -+ -+ }; -+}; -\ No newline at end of file -diff --git a/arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4-LT6911UXE-3.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4-LT6911UXE-3.dtsi -new file mode 100755 -index 000000000..6d3fbda91 ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4-LT6911UXE-3.dtsi -@@ -0,0 +1,205 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd. -+ * -+ */ -+ -+#include "dt-bindings/usb/pd.h" -+ -+ -+ -+#if 1 -+/* lt6911 03 hdmi in (4 x lane ) */ -+/ { -+ lt6911_3_dc: lt6911-3-dc { -+ compatible = "rockchip,dummy-codec"; -+ #sound-dai-cells = <0>; -+ }; -+ -+ lt6911_03-sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,format = "i2s"; -+ simple-audio-card,name = "rockchip,lt6911-03"; -+ simple-audio-card,bitclock-master = <&dailink3_master>; -+ simple-audio-card,frame-master = <&dailink3_master>; -+ status = "okay"; -+ simple-audio-card,cpu { -+ sound-dai = <&i2s1_8ch>; -+ }; -+ dailink3_master: simple-audio-card,codec { -+ sound-dai = <<6911_3_dc>; -+ }; -+ }; -+}; -+ -+&i2s1_8ch { -+ status = "okay"; -+ pinctrl-0 = <&i2s1m0_lrck -+ &i2s1m0_sclk -+ &i2s1m0_sdi0>; -+}; -+&mipi2_csi2 { -+ status = "okay"; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mipi2_csi2_input: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&csidphy0_out>; -+ }; -+ }; -+ -+ port@1 { -+ reg = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mipi2_csi2_output: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&cif_mipi2_in0>; -+ }; -+ }; -+ }; -+}; -+ -+&csi2_dphy0 { -+ status = "okay"; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ port@0 { -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mipi_in_lt6911: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <<6911_out>; -+ data-lanes = <1 2 3 4>; -+ }; -+ }; -+ port@1 { -+ reg = <1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ csidphy0_out: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&mipi2_csi2_input>; -+ }; -+ }; -+ }; -+}; -+ -+&csi2_dphy0_hw { -+ status = "okay"; -+}; -+ -+&i2c2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c2m0_xfer>; -+ status = "okay"; -+ -+ lt6911:lt6911@2b { -+ compatible = "lontium,lt6911uxe"; -+ status = "okay"; -+ reg = <0x2b>; -+ clocks = <&ext_cam_clk>; -+ clock-names = "xvclk"; -+ power-domains = <&power RK3588_PD_VI>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <<6911uxc_3_pin>; -+ interrupt-parent = <&gpio3>; -+ interrupts = ; -+ //power-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>; -+ reset-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; -+ plugin-det-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>; -+ rockchip,camera-module-index = <2>; -+ rockchip,camera-module-facing = "back"; -+ rockchip,camera-module-name = "HDMI-MIPI2"; -+ rockchip,camera-module-lens-name = "LT6911UXE2"; -+ port { -+ lt6911_out: endpoint { -+ remote-endpoint = <&mipi_in_lt6911>; -+ data-lanes = <1 2 3 4>; -+ }; -+ }; -+ }; -+}; -+ -+&rkcif_mipi_lvds2 { -+ status = "okay"; -+ -+ port { -+ cif_mipi2_in0: endpoint { -+ remote-endpoint = <&mipi2_csi2_output>; -+ }; -+ }; -+}; -+ -+&rkcif_mipi_lvds2_sditf { -+ status = "okay"; -+ -+ port { -+ mipi_lvds2_sditf: endpoint { -+ remote-endpoint = <&isp0_vir2>; -+ }; -+ }; -+}; -+ -+ -+&rkisp0_vir2 { -+ status = "okay"; -+ -+ port { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ isp0_vir2: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&mipi_lvds2_sditf>; -+ }; -+ }; -+}; -+ -+/* lt6911 03 hdmi in end (4 x lane ) */ -+ -+#endif -+ -+ -+&rkcif { -+ status = "okay"; -+}; -+ -+&rkcif_mmu { -+ status = "okay"; -+}; -+ -+&rkisp0 { -+ status = "okay"; -+}; -+ -+&isp0_mmu { -+ status = "okay"; -+}; -+ -+ -+&pinctrl { -+ -+ hdmiin { -+ lt6911uxc_3_pin: lt6911uxc-3-pin { -+ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>,// HDMIRX_DET_LT6911 -+ <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>, // LT6911UXC_INT -+ <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; // LT6911_RST -+ }; -+ -+ }; -+}; -\ No newline at end of file -diff --git a/arch/arm64/boot/dts/rockchip/rk3588-r58-4x4.dts b/arch/arm64/boot/dts/rockchip/rk3588-r58-4x4.dts -new file mode 100755 -index 000000000..2f6260ed4 ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3588-r58-4x4.dts -@@ -0,0 +1,148 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd. -+ * -+ */ -+ -+/dts-v1/; -+ -+#include "rk3588-blueberry-r58-4X4.dtsi" -+#include "rk3588-linux.dtsi" -+//#include "rk3588-blueberry-r58-4X4-LT6911UXE.dtsi" -+#include "rk3588-blueberry-r58-4X4-LT6911UXE-1.dtsi" -+#include "rk3588-blueberry-r58-4X4-LT6911UXE-2.dtsi" -+#include "rk3588-blueberry-r58-4X4-LT6911UXE-3.dtsi" -+//#include "rk3588-blueberry-r58-4X4-mipi-CW070HDMP40P.dtsi" -+//#include "rk3588-blueberry-r58-4X4-lvds-1280x800.dtsi" -+/ { -+ model = "RK3588 R58_4X4 Board"; -+ compatible = "rockchip,rk3588-R58-4X4-v10-linux", "rockchip,rk3588"; -+ -+ fan{ -+ compatible = "pwm-fan"; -+ #cooling-cells = <2>; -+ pwms = <&pwm5 0 50000 0>; -+ cooling-levels = <0 50 100 150 200 255>; -+ rockchip,temp-trips = < -+ 60000 1 -+ 65000 2 -+ 70000 3 -+ 75000 4 -+ 80000 5 -+ >; -+ enable-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&fan_enable_gpio>; -+ }; -+ -+ backlight_mipi: backlight_mipi { -+ compatible = "pwm-backlight"; -+ pwms = <&pwm14 0 25000 0>; -+ brightness-levels = < -+ 0 20 20 21 21 22 22 23 -+ 23 24 24 25 25 26 26 27 -+ 27 28 28 29 29 30 30 31 -+ 31 32 32 33 33 34 34 35 -+ 35 36 36 37 37 38 38 39 -+ 40 41 42 43 44 45 46 47 -+ 48 49 50 51 52 53 54 55 -+ 56 57 58 59 60 61 62 63 -+ 64 65 66 67 68 69 70 71 -+ 72 73 74 75 76 77 78 79 -+ 80 81 82 83 84 85 86 87 -+ 88 89 90 91 92 93 94 95 -+ 96 97 98 99 100 101 102 103 -+ 104 105 106 107 108 109 110 111 -+ 112 113 114 115 116 117 118 119 -+ 120 121 122 123 124 125 126 127 -+ 128 129 130 131 132 133 134 135 -+ 136 137 138 139 140 141 142 143 -+ 144 145 146 147 148 149 150 151 -+ 152 153 154 155 156 157 158 159 -+ 160 161 162 163 164 165 166 167 -+ 168 169 170 171 172 173 174 175 -+ 176 177 178 179 180 181 182 183 -+ 184 185 186 187 188 189 190 191 -+ 192 193 194 195 196 197 198 199 -+ 200 201 202 203 204 205 206 207 -+ 208 209 210 211 212 213 214 215 -+ 216 217 218 219 220 221 222 223 -+ 224 225 226 227 228 229 230 231 -+ 232 233 234 235 236 237 238 239 -+ 240 241 242 243 244 245 246 247 -+ 248 249 250 251 252 253 254 255 -+ >; -+ power-supply = <&vcc5v_nome>; -+ default-brightness-level = <100>; -+ }; -+ -+ backlight_lvds: backlight_lvds { -+ compatible = "pwm-backlight"; -+ pwms = <&pwm10 0 25000 0>; -+ brightness-levels = < -+ 0 20 20 21 21 22 22 23 -+ 23 24 24 25 25 26 26 27 -+ 27 28 28 29 29 30 30 31 -+ 31 32 32 33 33 34 34 35 -+ 35 36 36 37 37 38 38 39 -+ 40 41 42 43 44 45 46 47 -+ 48 49 50 51 52 53 54 55 -+ 56 57 58 59 60 61 62 63 -+ 64 65 66 67 68 69 70 71 -+ 72 73 74 75 76 77 78 79 -+ 80 81 82 83 84 85 86 87 -+ 88 89 90 91 92 93 94 95 -+ 96 97 98 99 100 101 102 103 -+ 104 105 106 107 108 109 110 111 -+ 112 113 114 115 116 117 118 119 -+ 120 121 122 123 124 125 126 127 -+ 128 129 130 131 132 133 134 135 -+ 136 137 138 139 140 141 142 143 -+ 144 145 146 147 148 149 150 151 -+ 152 153 154 155 156 157 158 159 -+ 160 161 162 163 164 165 166 167 -+ 168 169 170 171 172 173 174 175 -+ 176 177 178 179 180 181 182 183 -+ 184 185 186 187 188 189 190 191 -+ 192 193 194 195 196 197 198 199 -+ 200 201 202 203 204 205 206 207 -+ 208 209 210 211 212 213 214 215 -+ 216 217 218 219 220 221 222 223 -+ 224 225 226 227 228 229 230 231 -+ 232 233 234 235 236 237 238 239 -+ 240 241 242 243 244 245 246 247 -+ 248 249 250 251 252 253 254 255 -+ >; -+ //power-supply = <&vcc5v_nome>; -+ default-brightness-level = <100>; -+ }; -+ -+}; -+ -+//���� -+&pwm5 { -+ pinctrl-0 = <&pwm5m1_pins>; -+ status = "okay"; -+}; -+ -+&pwm14 { -+ pinctrl-0 = <&pwm14m0_pins>; -+ status = "okay"; -+}; -+ -+&pwm10 { -+ pinctrl-0 = <&pwm10m0_pins>; -+ status = "okay"; -+}; -+ -+ -+ -+&pinctrl { -+ -+ fan_enable_gpio { -+ fan_enable_gpio: fan_enable_gpio{ -+ rockchip,pins = -+ <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4-lvds-1280x800.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4-lvds-1280x800.dtsi -new file mode 100755 -index 000000000..be5a20f98 ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4-lvds-1280x800.dtsi -@@ -0,0 +1,155 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd. -+ * -+ */ -+ -+#include "dt-bindings/usb/pd.h" -+ -+&dsi1 { -+ status = "okay"; -+ //rockchip,lane-rate = <1000>; -+ dsi1_panel: panel@0 { -+ status = "okay"; -+ compatible = "simple-panel-dsi"; -+ reg = <0>; -+ backlight = <&backlight_lvds>; -+ enable-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>; -+ reset-delay-ms = <10>; -+ enable-delay-ms = <10>; -+ prepare-delay-ms = <10>; -+ unprepare-delay-ms = <10>; -+ disable-delay-ms = <60>; -+ dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | -+ MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_NO_EOT_PACKET)>; -+ dsi,format = ; -+ dsi,lanes = <4>; -+ -+ panel-init-sequence = [ -+ ]; -+ -+ panel-exit-sequence = [ -+ ]; -+ -+ display-timings { -+ native-mode = <&timing1>; -+ // //hfp, hs, hbp,hact,htotal,vfp, vs, vbp, vact,vtotal,pixclk_khz -+ //struct video_timing video_1920x1080_60Hz ={88, 44, 148,1920, 2200, 4, 5, 36, 1080, 1125, 148500}; -+ //struct video_timing video_1280x720_60Hz ={110,40, 220,1280, 1650, 5, 5, 20, 720, 750, 74250}; -+ //struct video_timing video_1280x800_60Hz ={72,128, 200,1280, 1680, 3, 6, 22, 800, 831, 83500}; -+ //struct video_timing video_1280x800_60Hz ={75,10, 75,1280, 1440, 10, 3, 10, 800, 823, 68000}; -+ //struct video_timing video_1280x800_60Hz ={20,10, 20,1280, 1330, 5, 2, 5, 800, 812, 65000}; -+ timing1: timing1 { -+ clock-frequency = <71100000>; -+ hactive = <1280>; -+ vactive = <800>; -+ hback-porch = <120>; -+ hfront-porch = <20>; -+ vback-porch = <11>; -+ vfront-porch = <11>; -+ hsync-len = <20>; -+ vsync-len = <1>; -+ hsync-active = <0>; -+ vsync-active = <0>; -+ de-active = <0>; -+ pixelclk-active = <0>; -+ }; -+ /*timing1: timing1 { -+ clock-frequency = <65000000>; -+ hactive = <1280>; -+ vactive = <800>; -+ hback-porch = <20>; -+ hfront-porch = <20>; -+ vback-porch = <5>; -+ vfront-porch = <5>; -+ hsync-len = <10>; -+ vsync-len = <2>; -+ hsync-active = <0>; -+ vsync-active = <0>; -+ de-active = <0>; -+ pixelclk-active = <0>; -+ }; -+*//* -+ timing1: timing1 { -+ clock-frequency = <68000000>; -+ hactive = <1280>; -+ vactive = <800>; -+ hback-porch = <75>; -+ hfront-porch = <75>; -+ vback-porch = <10>; -+ vfront-porch = <10>; -+ hsync-len = <10>; -+ vsync-len = <3>; -+ hsync-active = <0>; -+ vsync-active = <0>; -+ de-active = <0>; -+ pixelclk-active = <0>; -+ };*/ -+ -+/* -+ timing1: timing1 { -+ clock-frequency = <83500000>; -+ hactive = <1280>; -+ vactive = <800>; //<2160>; -+ hback-porch = <200>; -+ hfront-porch = <72>; -+ hsync-len = <128>; -+ vback-porch = <22>; -+ vfront-porch = <3>; -+ vsync-len = <6>; -+ hsync-active = <0>; -+ vsync-active = <0>; -+ de-active = <0>; -+ pixelclk-active = <0>; -+ };*/ -+ }; -+ -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ panel_in_dsi: endpoint { -+ remote-endpoint = <&dsi_out_panel>; -+ }; -+ }; -+ }; -+ }; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@1 { -+ reg = <1>; -+ dsi_out_panel: endpoint { -+ remote-endpoint = <&panel_in_dsi>; -+ }; -+ }; -+ }; -+ -+}; -+ -+&dsi1 { -+ status = "okay"; -+}; -+ -+&mipi_dcphy1 { -+ status = "okay"; -+}; -+ -+&dsi1_in_vp2 { -+ status = "disabled"; -+}; -+ -+&dsi1_in_vp3 { -+ status = "okay"; -+}; -+ -+&route_dsi1 { -+ status = "okay"; -+ connect = <&vp3_out_dsi1>; -+}; -+ -diff --git a/arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4-mipi-CW070HDMP40P.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4-mipi-CW070HDMP40P.dtsi -new file mode 100755 -index 000000000..a8e4dbbfc ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4-mipi-CW070HDMP40P.dtsi -@@ -0,0 +1,349 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd. -+ * -+ */ -+ -+#include "dt-bindings/usb/pd.h" -+ -+ -+ -+&dsi0 { -+ status = "okay"; -+ //rockchip,lane-rate = <1000>; -+ dsi0_panel: panel@0 { -+ status = "okay"; -+ compatible = "simple-panel-dsi"; -+ reg = <0>; -+ backlight = <&backlight_mipi>; -+ //power-supply = <&vcc3v3_mipi_lcd_power>; -+ reset-gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>; -+ enable-gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>; -+ reset-delay-ms = <80>; -+ enable-delay-ms = <20>; -+ init-delay-ms = <100>; -+ prepare-delay-ms = <10>; -+ unprepare-delay-ms = <10>; -+ disable-delay-ms = <60>; -+ dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | -+ MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_NO_EOT_PACKET)>; -+ dsi,format = ; -+ dsi,lanes = <4>; -+ -+ panel-init-sequence = [ -+ 29 00 04 FF 98 81 03 -+ -+ //GIP_1 -+ -+ 23 00 02 01 00 -+ 23 00 02 02 00 -+ 23 00 02 03 72 //STVA 3H -+ 23 00 02 04 00 //STVB -+ 23 00 02 05 00 //STVC -+ 23 00 02 06 09 //STVA_Rise -+ 23 00 02 07 00 //STVB_Rise -+ 23 00 02 08 00 //STVC_Rise -+ 23 00 02 09 00 //STVA_non overlap 2.5us=14 -+ 23 00 02 0a 00 -+ 23 00 02 0b 00 -+ 23 00 02 0c 00 -+ 23 00 02 0d 00 -+ 23 00 02 0e 00 -+ 23 00 02 0f 00 //CLKA_non overlap 2.5us=14 -+ 23 00 02 10 00 -+ 23 00 02 11 00 -+ 23 00 02 12 00 -+ 23 00 02 13 00 -+ 23 00 02 14 00 -+ 23 00 02 15 00 -+ 23 00 02 16 00 -+ 23 00 02 17 00 -+ 23 00 02 18 00 -+ 23 00 02 19 00 -+ 23 00 02 1a 00 -+ 23 00 02 1b 00 -+ 23 00 02 1c 00 -+ 23 00 02 1d 00 -+ 23 00 02 1e 40 //CLKA 40自動反 C0手動反(X8參考CLKB) -+ 23 00 02 1f 80 -+ 23 00 02 20 05 //CLKA_Rise -+ 23 00 02 21 02 //CLKA_Fall -+ 23 00 02 22 00 -+ 23 00 02 23 00 -+ 23 00 02 24 00 -+ 23 00 02 25 00 -+ 23 00 02 26 00 -+ 23 00 02 27 00 -+ 23 00 02 28 33 //CLK Phase_NUM=8 -+ 23 00 02 29 22 //CLK overlap 3H -+ 23 00 02 2a 00 -+ 23 00 02 2b 00 -+ 23 00 02 2c 00 -+ 23 00 02 2d 00 -+ 23 00 02 2e 00 -+ 23 00 02 2f 00 -+ 23 00 02 30 00 -+ 23 00 02 31 00 -+ 23 00 02 32 00 -+ 23 00 02 33 00 -+ 23 00 02 34 04 //VDD1&2 non-overlap 04:2.62us -+ 23 00 02 35 00 -+ 23 00 02 36 00 -+ 23 00 02 37 00 -+ 23 00 02 38 3C //VDD1&2 toggle 1sec -+ 23 00 02 39 00 -+ 23 00 02 3a 00 -+ 23 00 02 3b 00 -+ 23 00 02 3c 00 -+ 23 00 02 3d 00 -+ 23 00 02 3e 00 -+ 23 00 02 3f 00 -+ 23 00 02 40 00 -+ 23 00 02 41 00 -+ 23 00 02 42 00 -+ 23 00 02 43 00 -+ 23 00 02 44 00 -+ -+ -+ //GIP_2 -+ 23 00 02 50 10 //STV_1 2 -+ 23 00 02 51 32 //STV_3 4 -+ 23 00 02 52 54 //STV_5 6 -+ 23 00 02 53 76 //STV_7 8 -+ 23 00 02 54 98 //STV_9 10 -+ 23 00 02 55 ba //STV_11 12 -+ 23 00 02 56 10 //CLK_1.2 -+ 23 00 02 57 32 //CLK_3 4 -+ 23 00 02 58 54 //CLK_5 6 -+ 23 00 02 59 76 //CLK_7 8 -+ 23 00 02 5a 98 //CLK_9 10 -+ 23 00 02 5b ba //CLK_11 12 -+ 23 00 02 5c dc //CLK_13 14 -+ 23 00 02 5d fe //CLK_15 16 -+ -+ //GIP_3 -+ 23 00 02 5e 00 -+ 23 00 02 5f 01 //FW_CGOUT_L[1] FW -+ 23 00 02 60 00 //FW_CGOUT_L[2] BW -+ 23 00 02 61 15 //FW_CGOUT_L[3] GPWR1 -+ 23 00 02 62 14 //FW_CGOUT_L[4] GPWR2 -+ 23 00 02 63 0E //FW_CGOUT_L[5] CLK1_R -+ 23 00 02 64 0F //FW_CGOUT_L[6] CLK2_R -+ 23 00 02 65 0C //FW_CGOUT_L[7] CLK3_R -+ 23 00 02 66 0D //FW_CGOUT_L[8] CLK4_R -+ 23 00 02 67 06 //FW_CGOUT_L[9] STV1_R (STVA_1) -+ 23 00 02 68 02 //FW_CGOUT_L[10] -+ 23 00 02 69 02 //FW_CGOUT_L[11] -+ 23 00 02 6a 02 //FW_CGOUT_L[12] -+ 23 00 02 6b 02 //FW_CGOUT_L[13] -+ 23 00 02 6c 02 //FW_CGOUT_L[14] -+ 23 00 02 6d 02 //FW_CGOUT_L[15] -+ 23 00 02 6e 07 //FW_CGOUT_L[16] STV2_R (STVA_3) -+ 23 00 02 6f 02 //FW_CGOUT_L[17] VGL -+ 23 00 02 70 02 //FW_CGOUT_L[18] VGL -+ 23 00 02 71 02 //FW_CGOUT_L[19] VGL -+ 23 00 02 72 02 //FW_CGOUT_L[20] -+ 23 00 02 73 02 //FW_CGOUT_L[21] -+ 23 00 02 74 02 //FW_CGOUT_L[22] -+ -+ 23 00 02 75 01 //BW_CGOUT_L[1] FW -+ 23 00 02 76 00 //BW_CGOUT_L[2] BW -+ 23 00 02 77 14 //BW_CGOUT_L[3] GPWR1 -+ 23 00 02 78 15 //BW_CGOUT_L[4] GPWR2 -+ 23 00 02 79 0E //BW_CGOUT_L[5] CLK1_R -+ 23 00 02 7a 0F //BW_CGOUT_L[6] CLK2_R -+ 23 00 02 7b 0C //BW_CGOUT_L[7] CLK3_R -+ 23 00 02 7c 0D //BW_CGOUT_L[8] CLK4_R -+ 23 00 02 7d 06 //BW_CGOUT_L[9] STV1_R -+ 23 00 02 7e 02 //BW_CGOUT_L[10] -+ 23 00 02 7f 02 //BW_CGOUT_L[11] -+ 23 00 02 80 02 //BW_CGOUT_L[12] -+ 23 00 02 81 02 //BW_CGOUT_L[13] -+ 23 00 02 82 02 //BW_CGOUT_L[14] -+ 23 00 02 83 02 //BW_CGOUT_L[15] -+ 23 00 02 84 07 //BW_CGOUT_L[16] STV2_R -+ 23 00 02 85 02 //BW_CGOUT_L[17] VGL -+ 23 00 02 86 02 //BW_CGOUT_L[18] VGL -+ 23 00 02 87 02 //BW_CGOUT_L[19] VGL -+ 23 00 02 88 02 //BW_CGOUT_L[20] -+ 23 00 02 89 02 //BW_CGOUT_L[21] -+ 23 00 02 8A 02 //BW_CGOUT_L[22] -+ -+ -+ -+ //CMD_Page 4 -+ 29 00 04 FF 98 81 04 -+ -+ 23 00 02 6E 2A //di_pwr_reg=0 for power mode 2A //VGH clamp 15V -+ 23 00 02 6F 35 //reg vcl + pumping ratio VGH=3x VGL=-3x -+ 23 00 02 3A 24 //POWER SAVING -+ 23 00 02 8D 14 //VGL clamp -10V -+ 23 00 02 87 BA //ESD -+ 23 00 02 26 76 -+ 23 00 02 B2 D1 -+ 23 00 02 B5 27 //GMA BIAS -+ 23 00 02 31 75 //SRC BIAS -+ 23 00 02 30 03 //SRC OUTPUT BIAS -+ 23 00 02 3B 98 //PUMP SHIFT CLK -+ 23 00 02 35 1F //HZ_opt -+ 23 00 02 33 14 //Blanking frame 設定為GND -+ 23 00 02 7A 0F -+ 23 00 02 38 01 -+ 23 00 02 39 00 -+ -+ -+ -+ //CMD_Page 1 -+ 29 00 04 FF 98 81 01 -+ 23 00 02 22 0A //BGR SS -+ 23 00 02 31 00 //Column inversion -+ 23 00 02 53 45 //VCOM1 41 44 45 4A -+ 23 00 02 55 4E //VCOM2 4E -+ 23 00 02 50 C7 //VREG1OUT=5.1V -+ 23 00 02 51 C2 //VREG2OUT=-5.1V -+ 23 00 02 60 25 //SDT=2.5us 蚕22蜊傖25 -+ 23 00 02 63 00 -+ -+ -+ -+ -+ -+ -+ //============Gamma START============= -+ -+ //Pos 29 00 02 -+ 23 00 02 A0 00 -+ 23 00 02 A1 16 -+ 23 00 02 A2 26 -+ 23 00 02 A3 16 -+ 23 00 02 A4 19 -+ 23 00 02 A5 2B -+ 23 00 02 A6 1E -+ 23 00 02 A7 20 -+ 23 00 02 A8 93 -+ 23 00 02 A9 20 -+ 23 00 02 AA 2C -+ 23 00 02 AB 87 -+ 23 00 02 AC 1F -+ 23 00 02 AD 1F -+ 23 00 02 AE 53 -+ 23 00 02 AF 27 -+ 23 00 02 B0 2A -+ 23 00 02 B1 52 -+ 23 00 02 B2 5B -+ 23 00 02 B3 23 -+ -+ -+ -+ -+ //Neg 29 00 02 -+ 23 00 02 C0 00 -+ 23 00 02 C1 11 -+ 23 00 02 C2 1E -+ 23 00 02 C3 0F -+ 23 00 02 C4 12 -+ 23 00 02 C5 26 -+ 23 00 02 C6 1C -+ 23 00 02 C7 1E -+ 23 00 02 C8 87 -+ 23 00 02 C9 19 -+ 23 00 02 CA 26 -+ 23 00 02 CB 7F -+ 23 00 02 CC 20 -+ 23 00 02 CD 22 -+ 23 00 02 CE 58 -+ 23 00 02 CF 2A -+ 23 00 02 D0 2E -+ 23 00 02 D1 50 -+ 23 00 02 D2 5D -+ 23 00 02 D3 23 -+ -+ -+ -+ //29 00 04 FF 98 81 04 -+ //29 00 02 2F 01 -+ -+ //============ Gamma END=========== -+ -+ -+ //CMD_Page 0 -+ 29 00 04 FF 98 81 00 -+ 23 00 02 35 00 -+ 05 78 01 11 -+ //Delay 120 -+ 05 14 01 29 -+ //Delay 20 -+ -+ ]; -+ -+ panel-exit-sequence = [ -+ 05 00 01 28 -+ 05 00 01 10 -+ ]; -+ -+ display-timings { -+ native-mode = <&timing0>; -+ timing0: timing0 { -+ clock-frequency = <72000000>; //159391260 159747840 -+ hactive = <800>; -+ vactive = <1280>; -+ hback-porch = <60>; -+ hfront-porch = <40>; -+ hsync-len = <4>; -+ vback-porch = <25>; -+ vfront-porch = <30>; -+ vsync-len = <4>; -+ hsync-active = <1>; -+ vsync-active = <1>; -+ de-active = <0>; -+ pixelclk-active = <0>; -+ }; -+ }; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ panel_in_dsi0: endpoint { -+ remote-endpoint = <&dsi0_out_panel>; -+ }; -+ }; -+ }; -+ }; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@1 { -+ reg = <1>; -+ dsi0_out_panel: endpoint { -+ remote-endpoint = <&panel_in_dsi0>; -+ }; -+ }; -+ }; -+ -+}; -+ -+&dsi0 { -+ status = "okay"; -+}; -+ -+&mipi_dcphy0 { -+ status = "okay"; -+}; -+ -+&dsi0_in_vp2 { -+ status = "okay"; -+}; -+ -+&dsi0_in_vp3 { -+ status = "disabled"; -+}; -+ -+&route_dsi0 { -+ status = "okay"; -+ connect = <&vp2_out_dsi0>; -+}; -diff --git a/arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4.dtsi -new file mode 100755 -index 000000000..814c9262d ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3588-blueberry-r58-4X4.dtsi -@@ -0,0 +1,1013 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd. -+ * -+ */ -+ -+#include "dt-bindings/usb/pd.h" -+#include "rk3588.dtsi" -+#include "rk3588-hugsun.dtsi" -+#include "rk3588-rk806-single.dtsi" -+ -+/ { -+ /* If hdmirx node is disabled, delete the reserved-memory node here. */ -+ reserved-memory { -+ #address-cells = <2>; -+ #size-cells = <2>; -+ ranges; -+ -+ /* Reserve 256MB memory for hdmirx-controller@fdee0000 */ -+ cma { -+ compatible = "shared-dma-pool"; -+ reusable; -+ reg = <0x0 (256 * 0x100000) 0x0 (256 * 0x100000)>; -+ linux,cma-default; -+ }; -+ }; -+ -+ hdmiin-sound { -+ compatible = "rockchip,hdmi"; -+ rockchip,mclk-fs = <128>; -+ rockchip,format = "i2s"; -+ rockchip,bitclock-master = <&hdmirx_ctrler>; -+ rockchip,frame-master = <&hdmirx_ctrler>; -+ rockchip,card-name = "rockchip,hdmiin"; -+ rockchip,cpu = <&i2s7_8ch>; -+ rockchip,codec = <&hdmirx_ctrler 0>; -+ rockchip,jack-det; -+ }; -+ -+ es8388_sound: es8388-sound { -+ status = "okay"; -+ compatible = "rockchip,multicodecs-card"; -+ rockchip,card-name = "rockchip-es8388"; -+ hp-det-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; -+ spk-con-gpio = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>; -+ hp-con-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; -+ rockchip,format = "i2s"; -+ rockchip,mclk-fs = <256>; -+ rockchip,cpu = <&i2s0_8ch>; -+ rockchip,codec = <&es8388>; -+ rockchip,audio-routing = -+ "Headphone", "LOUT1", -+ "Headphone", "ROUT1", -+ "Speaker", "LOUT2", -+ "Speaker", "ROUT2", -+ "Headphone", "Headphone Power", -+ "Headphone", "Headphone Power", -+ "Speaker", "Speaker Power", -+ "Speaker", "Speaker Power", -+ "LINPUT1", "Main Mic", -+ "LINPUT2", "Main Mic", -+ "RINPUT1", "Headset Mic", -+ "RINPUT2", "Headset Mic"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&hp_det>; -+ }; -+ -+ rk_headset: rk-headset { -+ status = "disabled"; -+ compatible = "rockchip_headset"; -+ headset_gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; -+ //pinctrl-names = "default"; -+ //pinctrl-0 = <&hp_det>; -+ io-channels = <&saradc 3>; -+ }; -+ -+ leds: leds { -+ compatible = "gpio-leds"; -+ /* lt9211_bl: lt9211-bl { -+ gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>; -+ default-state = "on"; -+ }; -+ */ -+ hdd_led: hdd-led { -+ gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; -+ default-state = "off"; -+ }; -+ -+ work_4g: work-4g { -+ gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; -+ default-state = "on"; -+ }; -+ }; -+ -+ gpio_keys: gpio-keys { -+ compatible = "gpio-keys"; -+ autorepeat; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwrbtn>; -+ -+ power { -+ debounce-interval = <100>; -+ gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_LOW>; -+ label = "GPIO Key Power"; -+ linux,code = ; -+ wakeup-source; -+ }; -+ }; -+ -+ pcie30_avdd0v75: pcie30-avdd0v75 { -+ compatible = "regulator-fixed"; -+ regulator-name = "pcie30_avdd0v75"; -+ regulator-boot-on; -+ regulator-always-on; -+ regulator-min-microvolt = <750000>; -+ regulator-max-microvolt = <750000>; -+ vin-supply = <&vdd_0v75_s0>; -+ }; -+ -+ pcie30_avdd1v8: pcie30-avdd1v8 { -+ compatible = "regulator-fixed"; -+ regulator-name = "pcie30_avdd1v8"; -+ regulator-boot-on; -+ regulator-always-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ vin-supply = <&avcc_1v8_s0>; -+ }; -+ -+ vcc12v_dcin: vcc12v-dcin { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc12v_dcin"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <12000000>; -+ regulator-max-microvolt = <12000000>; -+ }; -+ -+ vcc5v0_sys: vcc5v0-sys { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc5v0_sys"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&vcc12v_dcin>; -+ }; -+ -+ vcc5v_nome: vcc5v0-nome-regulator { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc5v0_host"; -+ regulator-boot-on; -+ regulator-always-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ enable-active-high; -+ gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD_PWR_EN -+ vin-supply = <&vcc5v0_sys>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vcc5v0_nome_en>; -+ }; -+ -+ vcc5v0_host: vcc5v0-host-regulator { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc5v0_host"; -+ regulator-boot-on; -+ regulator-always-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ enable-active-high; -+ gpio = <&gpio2 RK_PA6 GPIO_ACTIVE_HIGH>; //USB_HOST_PWREN_H_GPIO2_A6 -+ vin-supply = <&vcc5v0_sys>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vcc5v0_host_en>; -+ }; -+ -+ -+ vcc5v_usb3_20: vcc5v0-usb3_20-regulator { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc5v0_host"; -+ regulator-boot-on; -+ regulator-always-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ enable-active-high; -+ gpio = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>; //USB_POWER_EN -+ vin-supply = <&vcc5v0_sys>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vcc5v0_usb3_20_en>; -+ }; -+ -+ vcc5v1_usb30: vcc5v1-usb30-regulator { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc5v0_host"; -+ regulator-boot-on; -+ regulator-always-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ enable-active-high; -+ gpio = <&gpio2 RK_PA7 GPIO_ACTIVE_HIGH>; //USB_HOST_PWREN_H_GPIO2_A7 -+ vin-supply = <&vcc5v0_sys>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vcc5v1_usb30_en>; -+ }; -+ -+ vcc5v0_otg: vcc5v0-otg-regulator { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc5v0_otg"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ enable-active-high; -+ gpio = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; -+ vin-supply = <&vcc5v0_sys>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vcc5v0_otg_en>; -+ }; -+ -+ vcc3v3_pcie30: vcc3v3-pcie30 { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc3v3_pcie30"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ enable-active-high; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&vcc3v3_pcie30_en>; -+ gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; //PCIE30x4_PWREN_H -+ startup-delay-us = <10000>; -+ vin-supply = <&vcc12v_dcin>; -+ }; -+ -+ vcc3v3_pcie2x1l1: vcc3v3-pcie2x1l1{ -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc3v3_pcie2x1l1"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ enable-active-high; -+ gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; -+ startup-delay-us = <10000>; -+ vin-supply = <&vcc12v_dcin>; -+ }; -+ -+ vcc_sd: sd-regulator { -+ compatible = "regulator-fixed"; -+ gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc_pwr>; -+ regulator-always-on; -+ regulator-boot-on; -+ enable-active-high; -+ regulator-name = "vcc_sd"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ vin-supply = <&vcc12v_dcin>; -+ }; -+ -+ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_1v1_nldo_s3"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1100000>; -+ regulator-max-microvolt = <1100000>; -+ vin-supply = <&vcc5v0_sys>; -+ }; -+ -+ ext_cam_clk: external-camera-clock { -+ compatible = "fixed-clock"; -+ clock-frequency = <24000000>; -+ clock-output-names = "CLK_CAMERA_24MHZ"; -+ #clock-cells = <0>; -+ }; -+ -+ wireless_bluetooth: wireless-bluetooth { -+ compatible = "bluetooth-platdata"; -+ clocks = <&hym8563>; -+ clock-names = "ext_clock"; -+ uart_rts_gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>; -+ pinctrl-names = "default", "rts_gpio"; -+ pinctrl-0 = <&uart6m1_rtsn>, <&bt_gpio>; -+ pinctrl-1 = <&uart6_gpios>; -+ BT,reset_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; -+ BT,wake_gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; -+ BT,wake_host_irq = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; -+ status = "okay"; -+ }; -+ -+ wireless_wlan: wireless-wlan { -+ compatible = "wlan-platdata"; -+ wifi_chip_type = "ap6275p"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&wifi_host_wake_irq>, <&wifi_poweren_gpio>; -+ WIFI,host_wake_irq = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>; -+ WIFI,poweren_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; -+ status = "okay"; -+ }; -+}; -+ -+ -+&dp0 { -+ status = "okay"; -+}; -+ -+&dp0_in_vp1 { -+ status = "okay"; -+}; -+ -+&dp0_sound{ -+ status = "okay"; -+}; -+ -+&route_dp0 { -+ status = "okay"; -+ connect = <&vp1_out_dp0>; -+}; -+ -+&hdmi0 { -+ enable-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; -+ cec-enable = "true"; -+ status = "okay"; -+}; -+ -+&hdmi0_in_vp0 { -+ status = "okay"; -+}; -+ -+&hdmi0_sound { -+ status = "okay"; -+}; -+ -+&hdptxphy_hdmi0 { -+ status = "okay"; -+}; -+ -+&route_hdmi0 { -+ status = "okay"; -+ logo,uboot = "logo.bmp"; -+ logo,kernel = "logo_kernel.bmp"; -+ -+ connect = <&vp0_out_hdmi0>; -+}; -+ -+// hdmi rx start -+/* Should work with at least 128MB cma reserved above. */ -+&hdmirx_ctrler { -+ status = "okay"; -+ #sound-dai-cells = <1>; -+ /* Effective level used to trigger HPD: 0-low, 1-high */ -+ hpd-trigger-level = <1>; -+ hdmirx-det-gpios = <&gpio1 RK_PD1 GPIO_ACTIVE_LOW>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&hdmim2_rx_cec -+ &hdmim2_rx_hpdin -+ &hdmim2_rx_sda -+ &hdmim2_rx_scl -+ &hdmirx_det>; -+}; -+ -+&i2c0 { -+ status = "okay"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c0m2_xfer>; -+ -+ vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: rk8602@42 { -+ compatible = "rockchip,rk8602"; -+ reg = <0x42>; -+ vin-supply = <&vcc5v0_sys>; -+ regulator-compatible = "rk860x-reg"; -+ regulator-name = "vdd_cpu_big0_s0"; -+ regulator-min-microvolt = <550000>; -+ regulator-max-microvolt = <1050000>; -+ regulator-ramp-delay = <2300>; -+ rockchip,suspend-voltage-selector = <1>; -+ regulator-boot-on; -+ regulator-always-on; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: rk8603@43 { -+ compatible = "rockchip,rk8603"; -+ reg = <0x43>; -+ vin-supply = <&vcc5v0_sys>; -+ regulator-compatible = "rk860x-reg"; -+ regulator-name = "vdd_cpu_big1_s0"; -+ regulator-min-microvolt = <550000>; -+ regulator-max-microvolt = <1050000>; -+ regulator-ramp-delay = <2300>; -+ rockchip,suspend-voltage-selector = <1>; -+ regulator-boot-on; -+ regulator-always-on; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+}; -+ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1m4_xfer>; -+ status = "okay"; -+#if 1 -+ lt9211: lt9211@2d { //5A -+ compatible = "mipi2lvds,lt9211"; -+ reg = <0x2d>; -+ reset_gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; -+ ledpwd-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>; //control lvds backlight -+ pinctrl-names = "default"; -+ pinctrl-0 = <<9211_gpio>; -+ status = "okay"; -+ }; -+#endif -+}; -+ -+&i2c2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c2m0_xfer>; -+ status = "okay"; -+ -+ vdd_npu_s0: vdd_npu_mem_s0: rk8602@42 { -+ compatible = "rockchip,rk8602"; -+ reg = <0x42>; -+ vin-supply = <&vcc5v0_sys>; -+ regulator-compatible = "rk860x-reg"; -+ regulator-name = "vdd_npu_s0"; -+ regulator-min-microvolt = <550000>; -+ regulator-max-microvolt = <950000>; -+ regulator-ramp-delay = <2300>; -+ rockchip,suspend-voltage-selector = <1>; -+ regulator-boot-on; -+ regulator-always-on; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+}; -+ -+&i2c3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c3m0_xfer>; -+ status = "okay"; -+ -+ es8388: es8388@10 { -+ status = "okay"; -+ #sound-dai-cells = <0>; -+ compatible = "everest,es8388", "everest,es8323"; -+ reg = <0x10>; -+ clocks = <&mclkout_i2s0>; -+ clock-names = "mclk"; -+ assigned-clocks = <&mclkout_i2s0>; -+ assigned-clock-rates = <12288000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s0_mclk>; -+ }; -+}; -+ -+&i2c4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c4m0_xfer>; -+ status = "okay"; -+ /* -+ gt9xx@5d { -+ status = "okay"; -+ compatible = "goodix,gt9xx"; -+ reg = <0x5d>; -+ tp-size = <89>; -+ touch-gpio = <&gpio3 RK_PC5 IRQ_TYPE_LEVEL_LOW>; //TP_INT GPIO4_D1 -+ reset-gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //TP_RST GPIO4_D4 -+ max-x = <1280>; -+ max-y = <800>; -+ };*/ -+ gt9147:gt9147@14 { -+ compatible = "goodix,gt9xx"; -+ reg = <0x14>; -+ //pinctrl-names = "default"; -+ //pinctrl-0 = <&tp_gpio>; -+ interrupt-parent = <&gpio3>; -+ irq-gpios = <&gpio3 RK_PC5 IRQ_TYPE_EDGE_BOTH>; // FALLING RISING -+ reset-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; -+ interrupt-gpios = <&gpio3 RK_PC5 IRQ_TYPE_LEVEL_HIGH>; -+#if 1 -+ goodix,driver-send-cfg = <1>; -+ goodix,cfg-group0 = [ -+ 42 20 03 00 05 0A C5 00 01 08 -+ 28 05 50 32 03 05 00 00 00 00 -+ 00 00 00 00 00 00 00 8B 2B 0E -+ 20 1E 2B 09 00 00 02 9B 02 2C -+ 00 00 00 00 00 03 64 32 00 00 -+ 00 14 32 94 D5 02 07 00 00 04 -+ AB 16 00 92 1A 00 7C 1F 00 66 -+ 26 00 58 2D 00 58 00 00 00 00 -+ 00 00 00 00 00 00 00 00 00 00 -+ 00 00 00 00 00 00 00 00 00 00 -+ 00 00 00 00 00 00 00 00 00 00 -+ 00 00 02 04 06 08 0A 0C 0E 10 -+ 12 14 16 18 1A 1C 00 00 00 00 -+ 00 00 00 00 00 00 00 00 00 00 -+ 00 00 00 02 04 06 08 0A 0C 0F -+ 10 12 13 16 18 1C 1D 1E 1F 20 -+ 21 22 24 26 FF FF FF FF 00 00 -+ 00 00 00 00 00 00 00 00 00 00 -+ 00 00 00 00 B3 01]; -+#endif -+ touchscreen-max-id = <11>; -+ touchscreen-size-x = <800>; -+ touchscreen-size-y = <1280>; -+ touchscreen-max-w = <512>; -+ touchscreen-max-p = <512>; -+ goodix,int-sync = <1>; -+ status = "okay"; -+ }; -+ -+}; -+ -+&i2c6 { -+ status = "okay"; -+ usbc0: fusb302@22 { -+ compatible = "fcs,fusb302"; -+ reg = <0x22>; -+ interrupt-parent = <&gpio4>; -+ interrupts = ; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&usbc0_int>; -+ vbus-supply = <&vcc5v0_otg>; -+ status = "okay"; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ usbc0_role_sw: endpoint@0 { -+ remote-endpoint = <&dwc3_0_role_switch>; -+ }; -+ }; -+ }; -+ -+ usb_con: connector { -+ compatible = "usb-c-connector"; -+ label = "USB-C"; -+ data-role = "dual"; -+ power-role = "dual"; -+ try-power-role = "sink"; -+ op-sink-microwatt = <1000000>; -+ sink-pdos = -+ ; -+ source-pdos = -+ ; -+ -+ altmodes { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ altmode@0 { -+ reg = <0>; -+ svid = <0xff01>; -+ vdo = <0xffffffff>; -+ }; -+ }; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ usbc0_orien_sw: endpoint { -+ remote-endpoint = <&usbdp_phy0_orientation_switch>; -+ }; -+ }; -+ -+ port@1 { -+ reg = <1>; -+ dp_altmode_mux: endpoint { -+ remote-endpoint = <&usbdp_phy0_dp_altmode_mux>; -+ }; -+ }; -+ }; -+ }; -+ }; -+ -+ hym8563: hym8563@51 { -+ compatible = "haoyu,hym8563"; -+ reg = <0x51>; -+ #clock-cells = <0>; -+ clock-frequency = <32768>; -+ clock-output-names = "hym8563"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&hym8563_int>; -+ interrupt-parent = <&gpio0>; -+ interrupts = ; //RTCIC_INT_L_GPIO0_B2 -+ wakeup-source; -+ }; -+}; -+ -+&i2s0_8ch { -+ status = "okay"; -+ pinctrl-0 = <&i2s0_lrck -+ &i2s0_sclk -+ &i2s0_sdi0 -+ &i2s0_sdo0>; -+}; -+ -+//hdmi01 sound -+&i2s5_8ch { -+ status = "okay"; -+}; -+ -+//hdmi02 sound -+&i2s6_8ch { -+ status = "disabled"; -+}; -+ -+//hdmiin sound -+&i2s7_8ch { -+ status = "okay"; -+}; -+ -+&spdif_tx2 { -+ status = "okay"; -+}; -+ -+&spdif_tx5 { -+ status = "okay"; -+}; -+ -+//wifi -+&pcie2x1l0 { -+ reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; -+ rockchip,skip-scan-in-resume; -+ status = "okay"; -+}; -+ -+&combphy1_ps { -+ status = "okay"; -+}; -+ -+/*for RTL8125B(S)_BG(S)_BI*/ -+&pcie2x1l1 { -+ reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ vpcie3v3-supply = <&vcc3v3_pcie2x1l1>; -+ pinctrl-0 = <&pcie30x2m1_pins>; -+ status = "okay"; -+}; -+ -+&pcie30x2m1_pins{ -+ rockchip,pins = -+ /* pcie30x2_clkreqn_m1 */ -+ <4 RK_PA6 4 &pcfg_pull_none>, -+ /* pcie30x2_perstn_m1 */ -+ //<4 RK_PB0 4 &pcfg_pull_none>, -+ /* pcie30x2_waken_m1 */ -+ <4 RK_PA7 4 &pcfg_pull_none>; -+}; -+ -+&combphy2_psu { -+ status = "okay"; -+}; -+/* -+//4G -+&pcie2x1l2 { -+ reset-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; -+ rockchip,skip-scan-in-resume; -+ status = "okay"; -+}; -+ -+&combphy0_ps { -+ status = "okay"; -+}; -+*/ -+ -+&pcie30phy { -+ rockchip,pcie30-phymode = ; -+ status = "okay"; -+}; -+ -+ -+//m.2 -+&pcie3x4 { -+ reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; -+ vpcie3v3-supply = <&vcc3v3_pcie30>; -+ status = "okay"; -+}; -+ -+ -+&rk806single { -+ pinctrl-names = "default", "pmic-power-off"; -+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, <&rk806_dvs2_null>, <&rk806_dvs3_null>; -+ pinctrl-1 = <&rk806_dvs1_slp>, <&rk806_dvs2_null>, <&rk806_dvs3_null>; -+ -+ regulators { -+ avcc_1v8_s0: PLDO_REG1 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "avcc_1v8_s0"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ }; -+}; -+ -+&vdd_log_s0 { //fox.luo@2022.05.26 don't wake up -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <750000>; -+ }; -+}; -+ -+&rockchip_suspend { -+ status = "okay"; -+ rockchip,sleep-debug-en = <1>; -+ rockchip,virtual-poweroff = <1>; -+ rockchip,sleep-mode-config = < -+ (0 -+ | RKPM_SLP_ARMOFF_DDRPD -+ ) -+ >; -+ rockchip,wakeup-config = < -+ (0 -+ | RKPM_CPU0_WKUP_EN -+ | RKPM_GPIO_WKUP_EN -+ ) -+ >; -+}; -+ -+&sata0 { -+ status = "okay"; -+}; -+ -+&uart1 { -+ status = "okay"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1m0_xfer>; -+}; -+ -+&uart6 { -+ status = "okay"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart6m1_xfer &uart6m1_ctsn>; -+}; -+ -+&sdhci { -+ bus-width = <8>; -+ no-sdio; -+ no-sd; -+ non-removable; -+ max-frequency = <200000000>; -+ mmc-hs400-1_8v; -+ mmc-hs400-enhanced-strobe; -+ status = "okay"; -+}; -+ -+&sdmmc { -+ max-frequency = <150000000>; -+ no-sdio; -+ no-mmc; -+ bus-width = <4>; -+ cap-mmc-highspeed; -+ cap-sd-highspeed; -+ disable-wp; -+ sd-uhs-sdr104; -+ vqmmc-supply = <&vccio_sd_s0>; -+ status = "okay"; -+}; -+ -+//type-c0 -+&u2phy0 { -+ status = "okay"; -+}; -+ -+&u2phy1 { -+ status = "okay"; -+}; -+ -+//usb2.0 host0 -+&u2phy2 { -+ status = "okay"; -+}; -+ -+//usb2.0 host1 -+&u2phy3 { -+ status = "okay"; -+}; -+ -+&u2phy0_otg { -+ rockchip,typec-vbus-det; -+ status = "okay"; -+}; -+ -+&u2phy1_otg { -+ phy-supply = <&vcc5v0_host>; -+ status = "okay"; -+}; -+ -+&u2phy2_host { -+ phy-supply = <&vcc5v0_host>; -+ status = "okay"; -+}; -+ -+&u2phy3_host { -+ phy-supply = <&vcc5v0_host>; -+ status = "okay"; -+}; -+ -+&usb_host0_ehci { -+ status = "okay"; -+}; -+ -+&usb_host0_ohci { -+ status = "okay"; -+}; -+ -+&usb_host1_ehci { -+ status = "okay"; -+}; -+ -+&usb_host1_ohci { -+ status = "okay"; -+}; -+ -+&usbdp_phy0 { -+ orientation-switch; -+ svid = <0xff01>; -+ sbu1-dc-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; -+ sbu2-dc-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>; -+ status = "okay"; -+ -+ port { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ usbdp_phy0_orientation_switch: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&usbc0_orien_sw>; -+ }; -+ -+ usbdp_phy0_dp_altmode_mux: endpoint@1 { -+ reg = <1>; -+ remote-endpoint = <&dp_altmode_mux>; -+ }; -+ }; -+}; -+ -+&usbdp_phy0_dp { -+ status = "okay"; -+}; -+ -+&usbdp_phy0_u3 { -+ status = "okay"; -+}; -+ -+&usbdp_phy1 { -+ rockchip,dp-lane-mux = < 0 1 2 3 >; -+ status = "okay"; -+}; -+ -+&usbdp_phy1_dp { -+ status = "okay"; -+}; -+ -+&usbdp_phy1_u3 { -+ maximum-speed = "high-speed"; -+ status = "okay"; -+}; -+ -+&usbdrd3_0 { -+ status = "okay"; -+}; -+ -+&usbdrd3_1 { -+ status = "okay"; -+}; -+ -+&usbdrd_dwc3_0 { -+ dr_mode = "otg"; -+ usb-role-switch; -+ status = "okay"; -+ port { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ dwc3_0_role_switch: endpoint@0 { -+ reg = <0>; -+ remote-endpoint = <&usbc0_role_sw>; -+ }; -+ }; -+}; -+ -+&usbdrd_dwc3_1 { -+ dr_mode = "host"; -+ maximum-speed = "high-speed"; -+ status = "okay"; -+}; -+ -+&usbhost3_0 { -+ status = "disabled"; -+}; -+ -+&usbhost_dwc3_0 { -+ status = "disabled"; -+}; -+ -+&vdd_vdenc_s0 { -+ regulator-init-microvolt = <750000>; -+}; -+ -+ -+&pinctrl { -+ -+ hdmirx { -+ hdmirx_det: hdmirx_det { -+ rockchip,pins = <1 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ wireless-bluetooth { -+ uart6_gpios: uart6-gpios { -+ rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ bt_gpio: bt-gpio { -+ rockchip,pins = -+ <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, -+ <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>, -+ <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ }; -+ -+ wireless-wlan { -+ wifi_host_wake_irq: wifi-host-wake-irq { -+ rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ -+ wifi_poweren_gpio: wifi-poweren-gpio { -+ rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ buttons { -+ pwrbtn: pwrbtn { -+ rockchip,pins = <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ hym8563 { -+ hym8563_int: hym8563-int { -+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ RTL8125B { -+ RTL8125B_isolate: RTL8125B-isolate { -+ rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ pcie { -+ vcc3v3_pcie30_en: vcc3v3-pcie30-en { -+ rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ -+ }; -+ -+ sdmmc-pwr { -+ sdmmc_pwr: sdmmc-pwr { -+ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ usb { -+ vcc5v0_host_en: vcc5v0-host-en { -+ rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ vcc5v0_nome_en: vcc5v0-nome-en { -+ rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ vcc5v0_usb3_20_en: vcc5v0-usb3_20-en { -+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ vcc5v1_usb30_en: vcc5v1-usb30-en { -+ rockchip,pins = <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ usb-typec { -+ usbc0_int: usbc0-int { -+ rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ -+ vcc5v0_otg_en: vcc5v0-otg-en { -+ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ lt9211 { -+ lt9211_gpio: lt9211-gpio{ -+ rockchip,pins = -+ <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>, -+ <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ headphone { -+ hp_det: hp-det { -+ rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/rockchip/rk3588-hugsun.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-hugsun.dtsi -new file mode 100755 -index 000000000..ce0dfd2cc ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3588-hugsun.dtsi -@@ -0,0 +1,332 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "rk3588-cpu-swap.dtsi" -+ -+/ { -+ adc_keys: adc-keys { -+ compatible = "adc-keys"; -+ io-channels = <&saradc 1>; -+ io-channel-names = "buttons"; -+ keyup-threshold-microvolt = <1800000>; -+ poll-interval = <100>; -+ -+ vol-up-key { -+ label = "volume up"; -+ linux,code = ; -+ press-threshold-microvolt = <17000>; -+ }; -+ -+ vol-down-key { -+ label = "volume down"; -+ linux,code = ; -+ press-threshold-microvolt = <417000>; -+ }; -+ -+ }; -+ -+ hdmi0_sound: hdmi0-sound { -+ status = "disabled"; -+ compatible = "rockchip,hdmi"; -+ rockchip,mclk-fs = <128>; -+ rockchip,card-name = "rockchip-hdmi0"; -+ rockchip,cpu = <&i2s5_8ch>; -+ rockchip,codec = <&hdmi0>; -+ rockchip,jack-det; -+ }; -+ -+ hdmi1_sound: hdmi1-sound { -+ status = "disabled"; -+ compatible = "rockchip,hdmi"; -+ rockchip,mclk-fs = <128>; -+ rockchip,card-name = "rockchip-hdmi1"; -+ rockchip,cpu = <&i2s6_8ch>; -+ rockchip,codec = <&hdmi1>; -+ rockchip,jack-det; -+ }; -+ -+ dp0_sound: dp0-sound { -+ status = "disabled"; -+ compatible = "rockchip,hdmi"; -+ rockchip,card-name= "rockchip-dp0"; -+ rockchip,mclk-fs = <512>; -+ rockchip,cpu = <&spdif_tx2>; -+ rockchip,codec = <&dp0 1>; -+ rockchip,jack-det; -+ }; -+ -+ dp1_sound: dp1-sound { -+ status = "disabled"; -+ compatible = "rockchip,hdmi"; -+ rockchip,card-name= "rockchip-dp1"; -+ rockchip,mclk-fs = <512>; -+ rockchip,cpu = <&spdif_tx5>; -+ rockchip,codec = <&dp1 1>; -+ rockchip,jack-det; -+ }; -+ -+ -+ test-power { -+ status = "okay"; -+ }; -+}; -+ -+&av1d_mmu { -+ status = "okay"; -+}; -+ -+&avsd { -+ status = "okay"; -+}; -+ -+&CPU_SLEEP { -+ status = "disabled"; -+}; -+ -+&cluster0_opp_table { -+ /delete-node/ opp-408000000; -+ /delete-node/ opp-600000000; -+ /delete-node/ opp-816000000; -+ /delete-node/ opp-1008000000; -+}; -+ -+&cluster1_opp_table { -+ /delete-node/ opp-408000000; -+ /delete-node/ opp-600000000; -+ /delete-node/ opp-816000000; -+ /delete-node/ opp-1008000000; -+}; -+ -+&cluster2_opp_table { -+ /delete-node/ opp-408000000; -+ /delete-node/ opp-600000000; -+ /delete-node/ opp-816000000; -+ /delete-node/ opp-1008000000; -+}; -+ -+&cpu_l0 { -+ cpu-supply = <&vdd_cpu_lit_s0>; -+ mem-supply = <&vdd_cpu_lit_mem_s0>; -+}; -+ -+&cpu_b0 { -+ cpu-supply = <&vdd_cpu_big0_s0>; -+ mem-supply = <&vdd_cpu_big0_mem_s0>; -+}; -+ -+&cpu_b2 { -+ cpu-supply = <&vdd_cpu_big1_s0>; -+ mem-supply = <&vdd_cpu_big1_mem_s0>; -+}; -+ -+&display_subsystem { -+ clocks = <&hdptxphy_hdmi0>, <&hdptxphy_hdmi1>; -+ clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll"; -+}; -+ -+&gpu_opp_table { -+ /delete-node/ opp-198000000; -+ /delete-node/ opp-297000000; -+ /delete-node/ opp-396000000; -+ /delete-node/ opp-500000000; -+ /delete-node/ opp-1000000000; -+ -+}; -+ -+&gpu { -+ mali-supply = <&vdd_gpu_s0>; -+ mem-supply = <&vdd_gpu_mem_s0>; -+ status = "okay"; -+}; -+ -+&iep { -+ status = "okay"; -+}; -+ -+&iep_mmu { -+ status = "okay"; -+}; -+ -+&jpegd { -+ status = "okay"; -+}; -+ -+&jpegd_mmu { -+ status = "okay"; -+}; -+ -+&jpege_ccu { -+ status = "okay"; -+}; -+ -+&jpege0 { -+ status = "okay"; -+}; -+ -+&jpege0_mmu { -+ status = "okay"; -+}; -+ -+&jpege1 { -+ status = "okay"; -+}; -+ -+&jpege1_mmu { -+ status = "okay"; -+}; -+ -+&jpege2 { -+ status = "okay"; -+}; -+ -+&jpege2_mmu { -+ status = "okay"; -+}; -+ -+&jpege3 { -+ status = "okay"; -+}; -+ -+&jpege3_mmu { -+ status = "okay"; -+}; -+ -+&mpp_srv { -+ status = "okay"; -+}; -+ -+&rga3_core0 { -+ status = "okay"; -+}; -+ -+&rga3_0_mmu { -+ status = "okay"; -+}; -+ -+&rga3_core1 { -+ status = "okay"; -+}; -+ -+&rga3_1_mmu { -+ status = "okay"; -+}; -+ -+&rga2 { -+ status = "okay"; -+}; -+ -+&rknpu { -+ rknpu-supply = <&vdd_npu_s0>; -+ mem-supply = <&vdd_npu_mem_s0>; -+ status = "okay"; -+}; -+ -+&rknpu_mmu { -+ status = "okay"; -+}; -+ -+&rkvdec_ccu { -+ status = "okay"; -+}; -+ -+&rkvdec0 { -+ status = "okay"; -+}; -+ -+&rkvdec0_mmu { -+ status = "okay"; -+}; -+ -+&rkvdec1 { -+ status = "okay"; -+}; -+ -+&rkvdec1_mmu { -+ status = "okay"; -+}; -+ -+&rkvenc_ccu { -+ status = "okay"; -+}; -+ -+&rkvenc0 { -+ venc-supply = <&vdd_vdenc_s0>; -+ mem-supply = <&vdd_vdenc_mem_s0>; -+ status = "okay"; -+}; -+ -+&rkvenc0_mmu { -+ status = "okay"; -+}; -+ -+&rkvenc1 { -+ venc-supply = <&vdd_vdenc_s0>; -+ mem-supply = <&vdd_vdenc_mem_s0>; -+ status = "okay"; -+}; -+ -+&rkvenc1_mmu { -+ status = "okay"; -+}; -+ -+&saradc { -+ status = "okay"; -+ vref-supply = <&avcc_1v8_s0>; -+}; -+ -+&tsadc { -+ status = "okay"; -+}; -+ -+&vdpu { -+ status = "okay"; -+}; -+ -+&vdpu_mmu { -+ status = "okay"; -+}; -+ -+&vepu { -+ status = "okay"; -+}; -+ -+&vop { -+ assigned-clocks = <&cru ACLK_VOP>; -+ assigned-clock-rates = <800000000>; -+ status = "okay"; -+}; -+ -+&vop_mmu { -+ status = "okay"; -+}; -+ -+/* vp0 & vp1 splice for 8K output */ -+&vp0 { -+ rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>; -+ rockchip,primary-plane = ; -+}; -+ -+&vp1 { -+ rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>; -+ rockchip,primary-plane = ; -+}; -+ -+&vp2 { -+ rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART2)>; -+ rockchip,primary-plane = ; -+}; -+ -+&vp3 { -+ rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>; -+ rockchip,primary-plane = ; -+}; -\ No newline at end of file -+}; --- -Created with Armbian build tools https://github.com/armbian/build diff --git a/patch/kernel/rk35xx-vendor-6.1/rk3588-1110-r58-4x4-gpu-dts.patch b/patch/kernel/rk35xx-vendor-6.1/rk3588-1110-r58-4x4-gpu-dts.patch deleted file mode 100644 index 4fe38f8a5b..0000000000 --- a/patch/kernel/rk35xx-vendor-6.1/rk3588-1110-r58-4x4-gpu-dts.patch +++ /dev/null @@ -1,15 +0,0 @@ ---- a/arch/arm64/boot/dts/rockchip/rk3588-hugsun.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3588-hugsun.dtsi -@@ -146,6 +146,11 @@ - &gpu { - mali-supply = <&vdd_gpu_s0>; - mem-supply = <&vdd_gpu_mem_s0>; -+ status = "disabled"; -+}; -+ -+&gpu_panthor { -+ mali-supply = <&vdd_gpu_s0>; - status = "okay"; - }; - -