From 5921322e6a437102652b04fca469bc31867b654d Mon Sep 17 00:00:00 2001 From: Patrick Yavitz Date: Sun, 15 Jun 2025 08:49:38 -0400 Subject: [PATCH] Add board NanoPi R3S LTS The LTS variant has an HDMI port. Signed-off-by: Patrick Yavitz --- config/boards/nanopi-r3s-lts.conf | 31 ++++++++++ .../dt/rk3566-nanopi-r3s-lts.dts | 59 +++++++++++++++++++ .../dt/rk3566-nanopi-r3s-lts.dts | 59 +++++++++++++++++++ 3 files changed, 149 insertions(+) create mode 100644 config/boards/nanopi-r3s-lts.conf create mode 100644 patch/kernel/archive/rockchip64-6.12/dt/rk3566-nanopi-r3s-lts.dts create mode 100644 patch/kernel/archive/rockchip64-6.15/dt/rk3566-nanopi-r3s-lts.dts diff --git a/config/boards/nanopi-r3s-lts.conf b/config/boards/nanopi-r3s-lts.conf new file mode 100644 index 0000000000..0598f8ca58 --- /dev/null +++ b/config/boards/nanopi-r3s-lts.conf @@ -0,0 +1,31 @@ +# Rockchip RK3566 quad core 2GB RAM eMMC 2x GbE USB3 HDMI +BOARD_NAME="NanoPi R3S LTS" +BOARDFAMILY="rk35xx" +BOARD_MAINTAINER="pyavitz" +BOOTCONFIG="nanopi-r3s-rk3566_defconfig" +KERNEL_TARGET="current,edge" +KERNEL_TEST_TARGET="current,edge" +BOOT_FDT_FILE="rockchip/rk3566-nanopi-r3s-lts.dtb" +IMAGE_PARTITION_TABLE="gpt" +BOOT_SCENARIO="spl-blobs" + + +function post_family_config__use_mainline_uboot() { + if [[ "$BRANCH" != "current" && "$BRANCH" != "edge" ]]; then + return 0 + fi + unset BOOT_FDT_FILE # boot.scr will use whatever u-boot detects and sets 'fdtfile' to + unset BOOTFS_TYPE # mainline u-boot can boot ext4 directly + BOOTCONFIG="nanopi-r3s-rk3566_defconfig" + BOOTSOURCE="https://github.com/u-boot/u-boot" + BOOTBRANCH="tag:v2025.04" + BOOTPATCHDIR="v2025.04" + + UBOOT_TARGET_MAP="BL31=$RKBIN_DIR/$BL31_BLOB ROCKCHIP_TPL=$RKBIN_DIR/$DDR_BLOB;;u-boot-rockchip.bin" + + unset uboot_custom_postprocess write_uboot_platform write_uboot_platform_mtd + + function write_uboot_platform() { + dd if=$1/u-boot-rockchip.bin of=$2 seek=64 conv=notrunc status=none + } +} diff --git a/patch/kernel/archive/rockchip64-6.12/dt/rk3566-nanopi-r3s-lts.dts b/patch/kernel/archive/rockchip64-6.12/dt/rk3566-nanopi-r3s-lts.dts new file mode 100644 index 0000000000..e3305f4044 --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.12/dt/rk3566-nanopi-r3s-lts.dts @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) 2020 Rockchip Electronics Co., Ltd. + * Copyright (c) 2024 FriendlyElec Computer Tech. Co., Ltd. + * (http://www.friendlyelec.com) + */ + +/dts-v1/; + +#include "rk3566-nanopi-r3s.dts" + +/ { + compatible = "friendlyarm,nanopi-r3s-lts", "rockchip,rk3566"; + model = "FriendlyElec NanoPi R3S LTS"; + + hdmi-con { + compatible = "hdmi-connector"; + type = "d"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; +}; + +&hdmi { + avdd-0v9-supply = <&vdda_0v9>; + avdd-1v8-supply = <&vcca1v8_image>; + status = "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&hdmi_sound { + status = "okay"; +}; + +&i2s0_8ch { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = ; + remote-endpoint = <&hdmi_in_vp0>; + }; +}; diff --git a/patch/kernel/archive/rockchip64-6.15/dt/rk3566-nanopi-r3s-lts.dts b/patch/kernel/archive/rockchip64-6.15/dt/rk3566-nanopi-r3s-lts.dts new file mode 100644 index 0000000000..e3305f4044 --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.15/dt/rk3566-nanopi-r3s-lts.dts @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) 2020 Rockchip Electronics Co., Ltd. + * Copyright (c) 2024 FriendlyElec Computer Tech. Co., Ltd. + * (http://www.friendlyelec.com) + */ + +/dts-v1/; + +#include "rk3566-nanopi-r3s.dts" + +/ { + compatible = "friendlyarm,nanopi-r3s-lts", "rockchip,rk3566"; + model = "FriendlyElec NanoPi R3S LTS"; + + hdmi-con { + compatible = "hdmi-connector"; + type = "d"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; +}; + +&hdmi { + avdd-0v9-supply = <&vdda_0v9>; + avdd-1v8-supply = <&vcca1v8_image>; + status = "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&hdmi_sound { + status = "okay"; +}; + +&i2s0_8ch { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = ; + remote-endpoint = <&hdmi_in_vp0>; + }; +};