From 524fffa2efb9dbfb00f36bbe19d20c8d65185eb4 Mon Sep 17 00:00:00 2001 From: zador-blood-stained Date: Sat, 14 Oct 2017 21:49:08 +0300 Subject: [PATCH] Update A64 ATF patches --- .../set-lpddr3-dram-voltage.patch | 13 ------ .../set-lpddr3-dram-voltage.patch | 13 ------ .../add-SRAM-mapping-for-SCPI.patch | 0 .../set-lpddr3-dram-voltage.patch | 19 +++++++++ .../set-lpddr3-dram-voltage.patch | 19 +++++++++ .../enable-a53-errata-workaround.patch | 0 .../enable-additional-regulators.patch | 41 +++++++++++++++++++ .../set-rsb-to-nonsec.patch | 0 8 files changed, 79 insertions(+), 26 deletions(-) delete mode 100644 patch/atf/atf-sun50iw1/board_pine64so/set-lpddr3-dram-voltage.patch delete mode 100644 patch/atf/atf-sun50iw1/board_pinebook-a64/set-lpddr3-dram-voltage.patch rename patch/atf/{atf-sun50iw1 => atf-sunxi64}/add-SRAM-mapping-for-SCPI.patch (100%) create mode 100644 patch/atf/atf-sunxi64/board_pine64so/set-lpddr3-dram-voltage.patch create mode 100644 patch/atf/atf-sunxi64/board_pinebook-a64/set-lpddr3-dram-voltage.patch rename patch/atf/{atf-sun50iw1 => atf-sunxi64}/enable-a53-errata-workaround.patch (100%) create mode 100644 patch/atf/atf-sunxi64/enable-additional-regulators.patch rename patch/atf/{atf-sun50iw1 => atf-sunxi64}/set-rsb-to-nonsec.patch (100%) diff --git a/patch/atf/atf-sun50iw1/board_pine64so/set-lpddr3-dram-voltage.patch b/patch/atf/atf-sun50iw1/board_pine64so/set-lpddr3-dram-voltage.patch deleted file mode 100644 index d19db6c57d..0000000000 --- a/patch/atf/atf-sun50iw1/board_pine64so/set-lpddr3-dram-voltage.patch +++ /dev/null @@ -1,13 +0,0 @@ -diff --git a/plat/sun50iw1p1/sunxi_power.c b/plat/sun50iw1p1/sunxi_power.c -index 5aa63fe4..95bef606 100644 ---- a/plat/sun50iw1p1/sunxi_power.c -+++ b/plat/sun50iw1p1/sunxi_power.c -@@ -126,7 +126,7 @@ static int axp803_initial_setup(void) - ret = sunxi_rsb_read(0x24); /* read DCDC5 register */ - if ((ret & 0x7f) == 0x26) { /* check for 1.24V value */ - NOTICE("PMIC: fixing DRAM voltage from 1.24V to 1.36V\n"); -- sunxi_rsb_write(0x24, 0x2c); -+ sunxi_rsb_write(0x24, 0x25); - } - - sunxi_rsb_write(0x15, 0x1a); /* DLDO1 = VCC3V3_HDMI voltage = 3.3V */ diff --git a/patch/atf/atf-sun50iw1/board_pinebook-a64/set-lpddr3-dram-voltage.patch b/patch/atf/atf-sun50iw1/board_pinebook-a64/set-lpddr3-dram-voltage.patch deleted file mode 100644 index d19db6c57d..0000000000 --- a/patch/atf/atf-sun50iw1/board_pinebook-a64/set-lpddr3-dram-voltage.patch +++ /dev/null @@ -1,13 +0,0 @@ -diff --git a/plat/sun50iw1p1/sunxi_power.c b/plat/sun50iw1p1/sunxi_power.c -index 5aa63fe4..95bef606 100644 ---- a/plat/sun50iw1p1/sunxi_power.c -+++ b/plat/sun50iw1p1/sunxi_power.c -@@ -126,7 +126,7 @@ static int axp803_initial_setup(void) - ret = sunxi_rsb_read(0x24); /* read DCDC5 register */ - if ((ret & 0x7f) == 0x26) { /* check for 1.24V value */ - NOTICE("PMIC: fixing DRAM voltage from 1.24V to 1.36V\n"); -- sunxi_rsb_write(0x24, 0x2c); -+ sunxi_rsb_write(0x24, 0x25); - } - - sunxi_rsb_write(0x15, 0x1a); /* DLDO1 = VCC3V3_HDMI voltage = 3.3V */ diff --git a/patch/atf/atf-sun50iw1/add-SRAM-mapping-for-SCPI.patch b/patch/atf/atf-sunxi64/add-SRAM-mapping-for-SCPI.patch similarity index 100% rename from patch/atf/atf-sun50iw1/add-SRAM-mapping-for-SCPI.patch rename to patch/atf/atf-sunxi64/add-SRAM-mapping-for-SCPI.patch diff --git a/patch/atf/atf-sunxi64/board_pine64so/set-lpddr3-dram-voltage.patch b/patch/atf/atf-sunxi64/board_pine64so/set-lpddr3-dram-voltage.patch new file mode 100644 index 0000000000..6e200f5103 --- /dev/null +++ b/patch/atf/atf-sunxi64/board_pine64so/set-lpddr3-dram-voltage.patch @@ -0,0 +1,19 @@ +diff --git a/plat/sun50iw1p1/sunxi_power.c b/plat/sun50iw1p1/sunxi_power.c +index db79047..fb1b108 100644 +--- a/plat/sun50iw1p1/sunxi_power.c ++++ b/plat/sun50iw1p1/sunxi_power.c +@@ -261,12 +261,8 @@ static int pmic_setup(void) + * changes. This should be further confined once we are able to + * reliably detect a Pine64 board. + */ +- ret = sunxi_pmic_read(0x24); /* read DCDC5 register */ +- if ((ret & 0x7f) == 0x26) { /* check for 1.24V value */ +- NOTICE("PMIC: fixing DRAM voltage from 1.24V to 1.36V\n"); +- sunxi_pmic_write(0x24, 0x2c); +- } +- ++ sunxi_pmic_write(0x24, 0x25); ++ + sunxi_pmic_write(0x15, 0x1a); /* DLDO1 = VCC3V3_HDMI voltage = 3.3V */ + + sunxi_pmic_write(0x16, 0x12); /* DLDO2 = VCC2V5_EDP voltage = 2.5V */ diff --git a/patch/atf/atf-sunxi64/board_pinebook-a64/set-lpddr3-dram-voltage.patch b/patch/atf/atf-sunxi64/board_pinebook-a64/set-lpddr3-dram-voltage.patch new file mode 100644 index 0000000000..6e200f5103 --- /dev/null +++ b/patch/atf/atf-sunxi64/board_pinebook-a64/set-lpddr3-dram-voltage.patch @@ -0,0 +1,19 @@ +diff --git a/plat/sun50iw1p1/sunxi_power.c b/plat/sun50iw1p1/sunxi_power.c +index db79047..fb1b108 100644 +--- a/plat/sun50iw1p1/sunxi_power.c ++++ b/plat/sun50iw1p1/sunxi_power.c +@@ -261,12 +261,8 @@ static int pmic_setup(void) + * changes. This should be further confined once we are able to + * reliably detect a Pine64 board. + */ +- ret = sunxi_pmic_read(0x24); /* read DCDC5 register */ +- if ((ret & 0x7f) == 0x26) { /* check for 1.24V value */ +- NOTICE("PMIC: fixing DRAM voltage from 1.24V to 1.36V\n"); +- sunxi_pmic_write(0x24, 0x2c); +- } +- ++ sunxi_pmic_write(0x24, 0x25); ++ + sunxi_pmic_write(0x15, 0x1a); /* DLDO1 = VCC3V3_HDMI voltage = 3.3V */ + + sunxi_pmic_write(0x16, 0x12); /* DLDO2 = VCC2V5_EDP voltage = 2.5V */ diff --git a/patch/atf/atf-sun50iw1/enable-a53-errata-workaround.patch b/patch/atf/atf-sunxi64/enable-a53-errata-workaround.patch similarity index 100% rename from patch/atf/atf-sun50iw1/enable-a53-errata-workaround.patch rename to patch/atf/atf-sunxi64/enable-a53-errata-workaround.patch diff --git a/patch/atf/atf-sunxi64/enable-additional-regulators.patch b/patch/atf/atf-sunxi64/enable-additional-regulators.patch new file mode 100644 index 0000000000..ca168370c8 --- /dev/null +++ b/patch/atf/atf-sunxi64/enable-additional-regulators.patch @@ -0,0 +1,41 @@ +diff --git a/plat/sun50iw1p1/sunxi_power.c b/plat/sun50iw1p1/sunxi_power.c +index 0c2487e..db79047 100644 +--- a/plat/sun50iw1p1/sunxi_power.c ++++ b/plat/sun50iw1p1/sunxi_power.c +@@ -217,6 +217,9 @@ static int pmic_setup(void) + { + int ret; + ++ /* Set DCDC2/CPU voltage to 1.1V */ ++ sunxi_pmic_write(0x21, 60); ++ + ret = sunxi_pmic_read(0x20); + if (ret != 0x0e && ret != 0x11) { + int voltage = (ret & 0x1f) * 10 + 16; +@@ -242,9 +245,9 @@ static int pmic_setup(void) + return -3; + } + +- if ((ret & 0xc9) != 0xc9) { ++ if ((ret & 0xd9) != 0xd9) { + /* Enable DC1SW to power PHY, DLDO4 for WiFi and DLDO1 for HDMI */ +- ret = sunxi_pmic_write(0x12, ret | 0xc8); ++ ret = sunxi_pmic_write(0x12, ret | 0xd8); + if (ret < 0) { + NOTICE("PMIC: error %d enabling DC1SW/DLDO4/DLDO1\n", ret); + return -4; +@@ -266,6 +269,14 @@ static int pmic_setup(void) + + sunxi_pmic_write(0x15, 0x1a); /* DLDO1 = VCC3V3_HDMI voltage = 3.3V */ + ++ sunxi_pmic_write(0x16, 0x12); /* DLDO2 = VCC2V5_EDP voltage = 2.5V */ ++ sunxi_pmic_write(0x1c, 0xa); /* FLDO1 = VCC1V2_EDP voltage = 1.2V */ ++ sunxi_pmic_write(0x91, 0x1a); /* GPIO0LDO voltage = 3.3V */ ++ sunxi_pmic_write(0x90, 0x3); /* Enable GPIO0LDO */ ++ ret = sunxi_pmic_read(0x13); ++ /* Enable FLDO1 to power up eDP bridge */ ++ ret = sunxi_pmic_write(0x13, ret | 0x4); ++ + return 0; + } + diff --git a/patch/atf/atf-sun50iw1/set-rsb-to-nonsec.patch b/patch/atf/atf-sunxi64/set-rsb-to-nonsec.patch similarity index 100% rename from patch/atf/atf-sun50iw1/set-rsb-to-nonsec.patch rename to patch/atf/atf-sunxi64/set-rsb-to-nonsec.patch